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/freebsd-src/sys/dts/powerpc/
H A Dp3041si.dtsi4 * Copyright 2010-2011 Freescale Semiconductor Inc.
35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
102 #address-cells = <1>;
103 #size-cells = <0>;
108 bus-frequency = <749999996>;
109 next-level-cache = <&L2_0>;
110 L2_0: l2-cache {
[all …]
H A Dp2041si.dtsi35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
101 #address-cells = <1>;
102 #size-cells = <0>;
107 bus-frequency = <749999996>;
108 next-level-cache = <&L2_0>;
109 L2_0: l2-cache {
110 next-level-cache = <&cpc>;
[all …]
H A Dp5020si.dtsi4 * Copyright 2010-2011 Freescale Semiconductor Inc.
35 /dts-v1/;
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
108 #address-cells = <1>;
109 #size-cells = <0>;
114 bus-frequency = <799999998>;
115 next-level-cache = <&L2_0>;
116 L2_0: l2-cache {
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
[all …]
H A Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
[all …]
H A Dfsl,fman-dtsec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,fman-dtse
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dqoriq-qman-portals.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2011-2016 Freescale Semiconductor Inc.
10 #address-cells = <1>;
11 #size-cells = <1>;
12 compatible = "simple-bus";
14 qportal0: qman-portal@0 {
16 * bootloader fix-ups are expected to provide the
17 * "fsl,bman-portal-<hardware revision>" compatible
19 compatible = "fsl,qman-portal";
22 cell-index = <0>;
[all …]
H A Dqoriq-fman3-0.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2012-2015 Freescale Semiconductor Inc.
9 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #address-cells = <1>;
13 #size-cell
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/powerpc/fsl/
H A Ddma.txt4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
21 - cell-index : DMA channel index starts at 0.
[all …]
/freebsd-src/sys/contrib/device-tree/src/powerpc/fsl/
H A Dt4240si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
59 compatible = "fsl,t4240-pci
[all...]
H A Dqoriq-qman1-portals.dtsi4 * Copyright 2011 - 2014 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 compatible = "simple-bus";
40 qportal0: qman-portal@0 {
41 compatible = "fsl,qman-portal";
44 cell-index = <0x0>;
46 qportal1: qman-portal@4000 {
47 compatible = "fsl,qman-portal";
50 cell-index = <1>;
[all …]
H A Dqoriq-fman-1.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <1>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x60 0xc>;
46 ptimer-handle = <&ptp_timer1>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x1>;
55 compatible = "fsl,fman-v2-port-oh";
[all …]
H A Dqoriq-fman-0.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <0>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x40 0xc>;
46 ptimer-handle = <&ptp_timer0>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x1>;
55 compatible = "fsl,fman-v2-port-oh";
[all …]
H A Db4860si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 /include/ "b4si-post.dtsi"
39 compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
45 #address-cells = <2>;
46 #size-cells = <2>;
47 fsl,iommu-parent = <&pamu0>;
51 #address-cells = <2>;
52 #size-cells = <2>;
53 cell-index = <1>;
57 #address-cells = <2>;
[all …]
H A Dqoriq-fman3-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <1>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x820 0x10>;
46 ptimer-handle = <&ptp_timer1>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x2>;
55 compatible = "fsl,fman-v3-port-oh";
[all …]
H A Dqoriq-fman3-0.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <0>;
44 clock-names = "fmanclk";
45 fsl,qman-channel-range = <0x800 0x10>;
46 ptimer-handle = <&ptp_timer0>;
49 compatible = "fsl,fman-muram";
54 cell-index = <0x2>;
55 compatible = "fsl,fman-v3-port-oh";
[all …]
/freebsd-src/sys/contrib/device-tree/src/powerpc/
H A Dfsp2.dts12 /dts-v1/;
15 #address-cells = <2>;
16 #size-cells = <1>;
19 dcr-parent = <&{/cpus/cpu@0}>;
28 #address-cells = <1>;
29 #size-cells = <0>;
35 clock-frequency = <0>; /* Filled in by cuboot */
36 timebase-frequency = <0>; /* Filled in by cuboot */
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
[all …]
H A Dasp834x-redboot.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 compatible = "analogue-and-micro,asp8347e";
13 #address-cells = <1>;
14 #size-cells = <1>;
24 #address-cells = <1>;
25 #size-cells = <0>;
30 d-cache-line-size = <32>;
31 i-cache-line-size = <32>;
32 d-cache-size = <32768>;
[all …]
H A Dmpc8349emitxgp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC8349E-mITX-GP Device Tree Source
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
24 #address-cells = <1>;
25 #size-cells = <0>;
30 d-cache-line-size = <32>;
31 i-cache-line-size = <32>;
32 d-cache-size = <32768>;
[all …]
H A Dmpc8610_hpcd.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <32768>; // L1
[all …]
H A Dmpc836x_rdk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2007-2008 MontaVista Software, Inc.
11 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
[all …]
H A Dtqm8540.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
[all …]
H A Dsbc8548-post.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #address-cells = <1>;
13 #size-cells = <1>;
16 bus-frequency = <0>;
17 compatible = "simple-bus";
19 ecm-law@0 {
20 compatible = "fsl,ecm-law";
22 fsl,num-laws = <10>;
26 compatible = "fsl,mpc8548-ecm", "fsl,ecm";
29 interrupt-parent = <&mpic>;
[all …]
H A Dmpc8349emitx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC8349E-mITX Device Tree Source
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
34 d-cache-size = <32768>;
[all …]
H A Dmpc8313erdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <16384>;
34 i-cache-size = <16384>;
[all …]

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