| /freebsd-src/sys/contrib/device-tree/Bindings/gpio/ |
| H A D | gpio-stp-xway.txt | 6 to drive the 2 LSBs of the cascade automatically.
19 shift register cascade.
21 in the shift register cascade.
22 - lantiq,dsl : The dsl core can control the 2 LSBs of the gpio cascade. This 2 bit
24 - lantiq,phy1 : The gphy1 core can control 3 bits of the gpio cascade.
25 - lantiq,phy2 : The gphy2 core can control 3 bits of the gpio cascade.
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| H A D | gpio-stp-xway.yaml | 13 and Ethernet PHYs to drive some bytes of the cascade automatically.
39 shift register cascade.
47 in the shift register cascade.
54 The dsl core can control the 2 LSBs of the gpio cascade. This 2 bit
68 The gphy core can control 3 bits of the gpio cascade. In the xRX200 family
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| H A D | gpio-mm-lantiq.txt | 20 shift register cascade.
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| /freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegAllocGreedy.h | 70 // Cascade - Eviction loop prevention. See
72 unsigned Cascade = 0; member
106 unsigned getCascade(Register Reg) const { return Info[Reg].Cascade; } in getCascade()
108 void setCascade(Register Reg, unsigned Cascade) { in setCascade() argument
110 Info[Reg].Cascade = Cascade; in setCascade()
114 unsigned Cascade = getCascade(Reg); in getOrAssignNewCascade() local
115 if (!Cascade) { in getOrAssignNewCascade()
116 Cascade = NextCascade++; in getOrAssignNewCascade()
117 setCascade(Reg, Cascade); in getOrAssignNewCascade()
123 unsigned Cascade = getCascade(Reg); getCascadeOrCurrentNext() local
[all...] |
| H A D | RegAllocEvictionAdvisor.cpp | 141 /// Cascade numbers are used to prevent infinite loops if this function is a
195 // Find VirtReg's cascade number. This will be unassigned if VirtReg was never in canEvictInterferenceBasedOnCost()
196 // involved in an eviction before. If a cascade number was assigned, deny in canEvictInterferenceBasedOnCost()
197 // evicting anything with the same or a newer cascade number. This prevents in canEvictInterferenceBasedOnCost()
200 // This works out so a register without a cascade number is allowed to evict in canEvictInterferenceBasedOnCost()
202 unsigned Cascade = RA.getExtraInfo().getCascadeOrCurrentNext(VirtReg.reg()); in canEvictInterferenceBasedOnCost()
238 // Only evict older cascades or live ranges without a cascade. in canEvictInterferenceBasedOnCost()
240 if (Cascade == IntfCascade) in canEvictInterferenceBasedOnCost()
243 if (Cascade < IntfCascade) { in canEvictInterferenceBasedOnCost()
201 unsigned Cascade = RA.getExtraInfo().getCascadeOrCurrentNext(VirtReg.reg()); canEvictInterferenceBasedOnCost() local
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| /freebsd-src/sys/contrib/device-tree/Bindings/mips/ |
| H A D | cpu_irq.txt | 7 platforms internal interrupt controller cascade.
9 Below is an example of a platform describing the cascade inside the devicetree
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| /freebsd-src/sys/contrib/device-tree/Bindings/leds/ |
| H A D | leds-el15203000.txt | 18 - cascade pattern
19 - inversed cascade pattern
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| /freebsd-src/sys/contrib/device-tree/src/powerpc/ |
| H A D | klondike.dts | 65 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
77 interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */
89 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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| H A D | bluestone.dts | 67 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
79 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
91 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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| H A D | arches.dts | 76 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
88 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
100 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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| H A D | redwood.dts | 67 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
79 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
91 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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| H A D | eiger.dts | 71 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
83 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
95 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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| H A D | taishan.dts | 73 interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */
86 interrupts = <0x3 0x4 0x2 0x4>; /* cascade */
98 interrupts = <0x5 0x4 0x4 0x4>; /* cascade */
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| H A D | icon.dts | 70 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
82 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
94 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
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| /freebsd-src/lib/libpmc/pmu-events/arch/x86/cascadelakex/ |
| H A D | floating-point.json | 88 …products formerly named Cooper Lake and is not supported on products formerly named Cascade Lake.",
98 …products formerly named Cooper Lake and is not supported on products formerly named Cascade Lake.",
108 …products formerly named Cooper Lake and is not supported on products formerly named Cascade Lake.",
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| /freebsd-src/sys/dev/ic/ |
| H A D | i8237.h | 6 #define DMA37MD_CASCADE 0xc0 /* cascade mode */
|
| /freebsd-src/sys/contrib/device-tree/Bindings/timer/ |
| H A D | renesas,tpu.txt | 5 This implementation support only cascade mode.
|
| H A D | renesas,8bit-timer.txt | 6 This implement only supported cascade mode.
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| H A D | renesas,tpu.yaml | 15 This implementation supports only cascade mode.
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| H A D | renesas,rz-mtu3.yaml | 39 - Cascade connection operation available
76 MTU1 and MTU2 operate independently, and cascade connection 32-bit phase
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| /freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | google,goldfish-pic.txt | 12 Example for mips when used in cascade mode:
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| H A D | mti,cpu-interrupt-controller.yaml | 14 platforms internal interrupt controller cascade.
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| /freebsd-src/sys/contrib/device-tree/Bindings/sound/ |
| H A D | nvidia,tegra210-peq.yaml | 10 The Parametric Equalizer (PEQ) is a cascade of biquad filters with
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| /freebsd-src/contrib/ntp/include/ |
| H A D | ssl_applink.c | 60 #endif /* OpenSSL version cascade */ in ssl_applink()
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| /freebsd-src/tools/test/stress2/misc/ |
| H A D | nfs8.sh | 29 # Test scenario for a lock cascade problem with sending SIGSTOP to processes
|