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/freebsd-src/sys/contrib/device-tree/Bindings/mmc/
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cells":
30 "#size-cells":
33 # Card Detection.
34 # If none of these properties are supplied, the host native card
35 # detect will be used. Only one of them should be provided.
[all …]
H A Dsynopsys-dw-mshc-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: mmc-controller.yaml#
13 - Ulf Hansson <ulf.hansson@linaro.org>
20 reset-names:
23 clock-frequency:
29 fifo-depth:
36 card-detect-delay:
[all …]
H A Dexynos-dw-mshc.txt7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
25 - "axis,artpec8-dw-mshc": for controllers with ARTPEC-8 specific
28 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
32 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
[all …]
H A Dsamsung,exynos-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Jaehoon Chung <jh80.chung@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - enum:
19 - axis,artpec8-dw-mshc
20 - samsung,exynos4210-dw-mshc
21 - samsung,exynos4412-dw-mshc
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H A Dsynopsys-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
16 - altr,socfpga-dw-mshc
17 - img,pistachio-dw-mshc
18 - snps,dw-mshc
31 bus interface unit clock and the card interface unit clock.
33 clock-names:
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5260-xyref5260.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
27 stdout-path = "serial2:115200n8";
31 compatible = "fixed-clock";
32 clock-frequency = <24000000>;
33 clock-output-names = "fin_pll";
34 #clock-cells = <0>;
37 ioclk_pcm: clock-pcm-ext {
38 compatible = "fixed-clock";
39 clock-frequency = <2048000>;
[all …]
H A Dexynos5410-smdk5410.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
27 stdout-path = "serial2:115200n8";
31 compatible = "fixed-clock";
32 clock-frequency = <24000000>;
33 clock-output-names = "fin_pll";
34 #clock-cells = <0>;
37 pmic_ap_clk: pmic-ap-clk {
39 compatible = "fixed-clock";
[all …]
H A Dexynos5410-odroidxu.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos54xx-odroidxu-leds.dtsi"
20 compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5";
34 stdout-path = "serial2:115200n8";
38 pinctrl-0 = <&emmc_nrst_pin>;
[all …]
H A Dexynos3250-artik5-eval.dts1 // SPDX-License-Identifier: GPL-2.0
12 /dts-v1/;
13 #include "exynos3250-artik5.dtsi"
17 compatible = "samsung,artik5-eval", "samsung,artik5",
26 cap-sd-highspeed;
27 disable-wp;
28 vqmmc-supply = <&ldo3_reg>;
29 card-detect-delay = <200>;
30 clock-frequency = <100000000>;
31 max-frequency = <100000000>;
[all …]
H A Dexynos5250-smdk5250.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/maxim,max77686.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
31 stdout-path = "serial2:115200n8";
34 vdd: fixed-regulator-vdd {
35 compatible = "regulator-fixed";
36 regulator-name = "vdd-supply";
37 regulator-min-microvolt = <1800000>;
[all …]
H A Dexynos5420-smdk5420.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
31 stdout-path = "serial2:115200n8";
34 fixed-rate-clocks {
36 compatible = "samsung,exynos5420-oscclk";
37 clock-frequency = <24000000>;
41 vdd: regulator-0 {
[all …]
/freebsd-src/share/man/man4/
H A Dmrsas.445 .Bd -ragged -offset indent
53 .Bd -literal -offset indent
59 driver will detect LSI's next generation (6Gb/s and 12Gb/s) PCI Express
71 A simple management interface is also provided on a per-controller basis via the
94 drivers can detect and manage the LSI MegaRAID SAS 2208/2308/3008/3108 series of
104 driver will detect these controllers.
107 section to know more about driver priority for MR-Fusion devices.
110 will provide a priority of (-30) (between
119 Solid-state drives (SSD) get ATA TRIM support with
122 This may require configuring SSD as Non-RAID drive
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos7-espresso.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "samsung,exynos7-espresso", "samsung,exynos7";
26 stdout-path = &serial_2;
34 usb30_vbus_reg: regulator-usb30 {
35 compatible = "regulator-fixed";
36 regulator-name = "VBUS_5V";
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/st/
H A Dste-ux500-samsung-gavini.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Beam GT-I8530 also known as Gavini.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8500.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
H A Dste-ux500-samsung-kyle.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung Galaxy Amp SGH-I407 also known as Kyle.
10 /dts-v1/;
11 #include "ste-db8500.dtsi"
12 #include "ste-ab8505.dtsi"
13 #include "ste-dbx5x0-pinctrl.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/leds/common.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288-veyron-sdmmc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
15 sdcard-supply = <&vccio_sd>;
24 sdmmc_bus4: sdmmc-bus4 {
31 sdmmc_clk: sdmmc-clk {
35 sdmmc_cmd: sdmmc-cmd {
43 * think there's a card inserted
45 sdmmc_cd_disabled: sdmmc-cd-disabled {
50 sdmmc_cd_pin: sdmmc-cd-pin {
57 vcc9-supply = <&vcc_5v>;
61 regulator-name = "vccio_sd";
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/renesas/
H A Dr8a7745-iwg22d-sodimm.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZG1E SODIMM carrier board
9 * SSI-SGTL5000
31 /dts-v1/;
32 #include "r8a7745-iwg22m.dtsi"
33 #include <dt-bindings/pwm/pwm.h>
36 model = "iWave Systems RainboW-G22D-SODIMM board based on RZ/G1E";
47 stdout-path = "serial3:115200n8";
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-orangepi-5-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/usb/pd.h>
17 compatible = "xunlong,orangepi-
[all...]
H A Drk3326-anbernic-rg351m.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/rockchip.h>
21 stdout-path = "serial2:115200n8";
25 compatible = "pwm-backlight";
26 power-supply = <&vcc_bl>;
31 * LED is a tri-state. Driven high it is red, driven low it is
[all …]
H A Drk3588-evb1-v10.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/usb/pd.h>
17 compatible = "rockchip,rk3588-evb1-v1
[all...]
H A Drk3588-quartzpro64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/usb/pd.h>
26 stdout-pat
[all...]
H A Dpx30-engicam-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
15 vcc5v0_sys: vcc5v0-sys {
16 compatible = "regulator-fixed";
17 regulator-name = "vcc5v0_sys"; /* +5V */
18 regulator-always-on;
19 regulator-boot-on;
20 regulator-min-microvolt = <5000000>;
21 regulator-max-microvolt = <5000000>;
24 sdio_pwrseq: sdio-pwrseq {
25 compatible = "mmc-pwrseq-simple";
[all …]
/freebsd-src/sys/contrib/device-tree/src/arc/
H A Daxs10x_mb.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <1>;
18 interrupt-parent = <&mb_intc>;
20 creg_rst: reset-controller@11220 {
21 compatible = "snps,axs10x-reset";
22 #reset-cells = <1>;
27 compatible = "snps,axs10x-i2s-pll-clock";
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6dl-b1x5pv2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
6 // Copyright 2018-2021 General Electric Company
7 // Copyright 2018-2021 Collabora
9 #include <dt-bindings/input/input.h>
10 #include "imx6dl-qmx6.dtsi"
14 stdout-path = &uart3;
20 operating-points = <
25 fsl,soc-operating-points = <
26 /* ARM kHz SOC-PU uV */
33 operating-points = <
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/
H A Dpinctrl-st.txt3 Each multi-function pin is controlled, driven and routed through the
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
23 | |----> [gpio-bank (... )]
24 |_________|----> [gpio-bank (n + 7)]
28 [irqN]----> [gpio-bank (n)]
33 - compatible : should be "st,stih407-<pio-block>-pinctrl"
[all …]

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