| /freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | ti,gpmc-child.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 24 gpmc,sync-clk-ps: 28 # Chip-select signal timings corresponding to GPMC_CONFIG2: 29 gpmc,cs-on-ns: 33 gpmc,cs-rd-off-ns: [all …]
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| H A D | omap-gpmc.txt | 7 - compatible: Should be set to one of the following: 9 ti,omap2420-gpmc (omap2420) 10 ti,omap2430-gpmc (omap2430) 11 ti,omap3430-gpmc (omap3430 & omap3630) 12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x) 13 ti,am3352-gpmc (am335x devices) 15 - reg: A resource specifier for the register space 17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is 19 - #address-cells: Must be set to 2 to allow memory address translation 20 - #size-cells: Must be set to 1 to allow CS address passing [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | omap2420-n8x0-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 stdout-path = &uart3; 16 compatible = "i2c-cbus-gpio"; 21 #address-cells = <1>; 22 #size-cells = <0>; 25 interrupt-parent = <&gpio4>; 34 clock-frequency = <400000>; 44 clock-frequency = <400000>; 50 /* gpio-irq for dma: 26 */ 53 #address-cells = <1>; [all …]
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| H A D | omap3-gta04a5one.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com> 6 #include "omap3-gta04a5.dts" 13 gpmc_pins: gpmc-pins { 14 pinctrl-single,pins = < 45 pinctrl-names = "default"; 46 pinctrl-0 = <&gpmc_pins>; 48 /delete-node/ nand@0,0; 52 #address-cells = <1>; 53 #size-cells = <1>; [all …]
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| H A D | omap3-igep.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 /dts-v1/; 19 stdout-path = &uart3; 23 compatible = "ti,omap-twl4030"; 28 vdd33: regulator-vdd33 { 29 compatible = "regulator-fixed"; 30 regulator-name = "vdd33"; 31 regulator-always-on; 37 gpmc_pins: gpmc-pins { 38 pinctrl-single,pins = < [all …]
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| H A D | omap3-n950-n9.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff) 13 cpu0-supply = <&vcc>; 23 compatible = "regulator-fixed"; 24 regulator-name = "VEMMC"; 25 regulator-min-microvolt = <2900000>; 26 regulator-max-microvolt = <2900000>; 28 startup-delay-us = <150>; 29 enable-active-high; 33 compatible = "regulator-fixed"; [all …]
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| H A D | omap3-n900.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi> 7 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-binding [all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm/axis/ |
| H A D | artpec6.dtsi | 2 * Device Tree Source for the Axis ARTPEC-6 SoC 4 * This file is dual-licensed: you can use it either under the terms 43 #include <dt-bindings/interrupt-controller/arm-gic.h> 44 #include <dt-bindings/dma/nbpfaxi.h> 45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h> 48 #address-cells = <1>; 49 #size-cells = <1>; 51 interrupt-parent = <&intc>; 54 #address-cells = <1>; 55 #size-cells = <0>; [all …]
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| /freebsd-src/sys/dev/cas/ |
| H A D | if_casreg.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 30 * from: FreeBSD: if_gemreg.h 174987 2007-12-30 01:32:03Z marius 43 #define CAS_INF_BURST 0x0008 /* infinite burst enable */ 84 * Bits 0-9 of CAS_STATUS auto-clear when read. CAS_CLEAR_ALIAS specifies 85 * which of bits 0-9 auto-clear when reading CAS_STATUS_ALIAS. 116 #define CAS_BIM_CONF_BD64_DIS 0x00000004 /* 64-bit mode disable */ 118 #define CAS_BIM_CONF_BUS32_WIDE 0x00000010 /* PCI bus is 32-bit (ro). */ 126 #define CAS_BIM_DIAG_BRST_SM 0x0000007f /* burst ctrl. state machine */ 161 * interrupt bits for CAS_INTMASK[2-4], CAS_STATUS[2-4], CAS_CLEAR_ALIAS[2-4] [all …]
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| /freebsd-src/sys/contrib/ena-com/ |
| H A D | ena_eth_com.h | 1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 4 * Copyright (c) 2015-2023 Amazon.com, Inc. or its affiliates. 44 #define ENA_LLQ_HEADER (128UL - ENA_LLQ_ENTRY_DESC_CHUNK_SIZE) 45 #define ENA_LLQ_LARGE_HEADER (256UL - ENA_LLQ_ENTRY_DESC_CHUNK_SIZE) 50 /* For LLQ, header buffer - pushed to the device mem space */ 102 ENA_REG_WRITE32(io_cq->bu in ena_com_free_q_entries() [all...] |
| H A D | ena_eth_com.c | 1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 4 * Copyright (c) 2015-2023 Amazon.com, Inc. or its affiliates. 43 head_masked = io_cq->head & (io_cq->q_depth - 1); in ena_com_get_next_rx_cdesc() 44 expected_phase = io_cq->phas in ena_com_get_next_rx_cdesc() [all...] |
| /freebsd-src/share/man/man4/ |
| H A D | dc.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors 41 .Bd -ragged -offset indent 49 .Bd -literal -offset indent 93 .Bl -tag -width ".Cm 10baseT/UTP" 101 Note: the built-in NWAY autonegotiation on the original PNIC 82c168 114 .Cm full-duplex 117 .Cm full-duplex 119 .Cm half-duplex 126 .Cm full-duplex 129 .Cm full-duplex [all …]
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| /freebsd-src/sys/netinet/tcp_stacks/ |
| H A D | tcp_rack.h | 1 /*- 2 * Copyright (c) 2016-2020 Netflix, Inc. 31 #define RACK_DEFERRED 0x000004/* We can't use this for RTT calc - not used */ 36 #define RACK_TLP 0x000080/* segment sent as tail-loss-probe */ 45 #define RACK_MUST_RXT 0x010000/* We must retransmit this rsm (non-sack/mtu chg)*/ 67 r_rtr_cnt : 8; /* Retran count, index this -1 to get time */ 83 uint64_t r_ack_arrival; /* This is the time of ack-arrival (if SACK'd) */ 85 uint8_t r_bas; /* The burst size (burst a [all...] |
| /freebsd-src/sys/dev/ath/ |
| H A D | if_ath_tdma.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 44 * by the driver - eg, calls to ath_hal_gettsf32(). 136 struct ath_hal *ah = sc->sc_ah; in ath_tdma_settimers() 141 bt.bt_nextdba = (nexttbtt<<3) - sc->sc_tdmadbaprep; in ath_tdma_settimers() 142 bt.bt_nextswba = (nexttbtt<<3) - sc->sc_tdmaswbaprep; in ath_tdma_settimers() 163 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_TDMA_TIMER_SET)) { in ath_tdma_settimers() 171 t.sc_tdmadbaprep = htobe32(sc->sc_tdmadbaprep); in ath_tdma_settimers() 172 t.sc_tdmaswbaprep = htobe32(sc->sc_tdmaswbaprep); in ath_tdma_settimers() [all …]
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| /freebsd-src/sys/netinet/cc/ |
| H A D | cc_htcp.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2007-2008 6 * Copyright (c) 2009-2010 Lawrence Stewart <lstewart@freebsd.org> 42 * An implementation of the H-TCP congestion control algorithm for FreeBSD, 43 * based on the Internet Draft "draft-leith-tc [all...] |
| /freebsd-src/sys/contrib/alpine-hal/ |
| H A D | al_hal_nb_regs.h | 1 /*- 10 found at http://www.gnu.org/licenses/gpl-2.0.html 101 /* [0x6c] Read-only that reflects CPU Cluster Local GIC base high address */ 103 /* [0x70] Read-only that reflects CPU Cluster Local GIC base low address */ 105 /* [0x74] Read-only that reflects the device's IOGIC base high address. */ 107 /* [0x78] Read-only that reflects IOGIC base low address */ 480 /* Value read in the Cluster ID Affinity Level-1 field, bits[15:8], of the Multiprocessor Affinity 485 /* Value read in the Cluster ID Affinity Level-2 field, bits[23:16], of the Multiprocessor Affinity 512 By default, CPU0 only exits poreset when the CPUs cluster exits power-on-reset and then kicks other… 513 …t by primary CPU as part of the initialization process will initiate power-on-reset to this specif… [all …]
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| /freebsd-src/sys/dev/dpaa2/ |
| H A D | dpaa2_swp.c | 1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause AND BSD-2-Clause 4 * Copyright © 2014-2016 Freescale Semiconductor, Inc. 5 * Copyright © 2016-2019 NXP 35 * drivers/soc/fsl/dpio/qbman-portal.c 42 * Copyright © 2021-2022 Dmitry Salychev 198 mtx_init(&p->lock, "swp_sleep_lock", NULL, MTX_DEF); in dpaa2_swp_init_portal() 200 p->cfg.mem_backed = false; in dpaa2_swp_init_portal() 201 p->cfg.writes_cinh = true; in dpaa2_swp_init_portal() 203 p->desc = desc; in dpaa2_swp_init_portal() [all …]
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| /freebsd-src/contrib/ntp/ |
| H A D | CommitLog-4.1.0 | 1 2001-08-01 Harlan Stenn <stenn@whimsy.udel.edu> 5 2001-07-27 Harlan Stenn <stenn@whimsy.udel.edu> 19 2001-07-10 Harlan Stenn <stenn@whimsy.udel.edu> 21 * configure.in: 4.0.99m-rc3 23 2001-07-06 Harlan Stenn <stenn@whimsy.udel.edu> 28 2001-07-04 Harlan Stenn <stenn@whimsy.udel.edu> 33 * configure.in (rt library check): Don't look for -lrt under 34 Linux. Under glibc-2.1.2 and -2.2.2 (at least), the POSIX- 35 compatibility real-time library does strange things with threads 39 2001-06-30 Harlan Stenn <stenn@whimsy.udel.edu> [all …]
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| /freebsd-src/sys/dev/ath/ath_hal/ |
| H A D | ah.h | 1 /*- 2 * SPDX-License-Identifier: ISC 4 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 5 * Copyright (c) 2002-2008 Atheros Communications, Inc. 26 * structure for use with the device. Hardware-related operations that 67 * error occurs--i.e. you cannot check it for success. 81 HAL_EEWRITE = 11, /* Attempt to change write-locked EEPROM */ 84 HAL_ESELFTEST = 14, /* Hardware self-test failed */ 106 HAL_CAP_PSPOLL = 10, /* hardware has working PS-Poll support */ 112 HAL_CAP_TPC = 16, /* per-packet tx power control */ [all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-binding [all...] |
| /freebsd-src/sys/dev/qlnx/qlnxe/ |
| H A D | fcoe_common.h | 2 * Copyright (c) 2017-2018 Cavium, Inc. 38 * The fcoe storm task context protection-information of Ystorm 60 * The fcoe storm task context protection-information of Ystorm 185 struct fcoe_slow_sgl_ctx dix_sgl /* DIX slow-SGL data base */; 202 …__le32 num_pbf_zero_write /* The amount of bytes that PBF should dummy write - Relevant for protec… 204 __le32 data_2_trns_rem /* Entire SGL-buffer remainder */; 210 __le16 ox_id /* OX-ID. Used in Target mode only */; 211 __le16 rx_id /* RX-ID. Used in Target mode only */; 358 __le32 data_offset /* data-offset */; 359 __le32 reserved /* High data-offset */; [all …]
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| /freebsd-src/contrib/pam_modules/pam_passwdqc/ |
| H A D | wordset_4k.c | 6 * I've replaced two 7-character words to save space. 732 "burst", 4074 "wrap",
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| /freebsd-src/sys/dev/e1000/ |
| H A D | e1000_regs.h | 2 SPDX-License-Identifier: BSD-3-Clause 4 Copyright (c) 2001-2020, Intel Corporation 38 #define E1000_CTRL 0x00000 /* Device Control - RW */ 39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */ 40 #define E1000_STATUS 0x00008 /* Device Status - RO */ 41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */ 42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */ 43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */ 44 #define E1000_FLA 0x0001C /* Flash Access - RW */ 45 #define E1000_MDIC 0x00020 /* MDI Control - RW */ [all …]
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| /freebsd-src/sys/dev/ath/ath_hal/ar5211/ |
| H A D | ar5211reg.h | 1 /*- 2 * SPDX-License-Identifier: ISC 4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 5 * Copyright (c) 2002-2006 Atheros Communications, Inc. 62 /* Shadow copies with read-and-clear access */ 148 #define AR_D0_LCL_IFS 0x1040 /* DCU-specific IFS settings */ 149 #define AR_D1_LCL_IFS 0x1044 /* DCU-specific IFS settings */ 150 #define AR_D2_LCL_IFS 0x1048 /* DCU-specific IFS settings */ 151 #define AR_D3_LCL_IFS 0x104c /* DCU-specific IFS settings */ 152 #define AR_D4_LCL_IFS 0x1050 /* DCU-specific IFS settings */ [all …]
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| /freebsd-src/contrib/ncurses/doc/ |
| H A D | ncurses-intro.doc | 5 by Eric S. Raymond and Zeyd M. Ben-Halim 31 o Low-Level Capability Access 71 + Variable-Sized Fields 84 o Inter-Field Navigation Requests 85 o Intra-Field Navigation Requests 117 The curses package is a subroutine library for terminal-independent 118 screen-painting and input-event handling which presents a high level 128 the advantage of (a) back-portability to character-cell terminals, and 129 (b) simplicity. For an application that does not require bit-mapped 137 provide screen-handling for the vi editor; these used the termcap [all …]
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