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/freebsd-src/contrib/file/magic/Magdir/
H A Dblender10 # URL: http://fileformats.archiveteam.org/wiki/BLEND
12 # Reference: http://mark0.net/download/triddefs_xml.7z/defs/b/blend.trid.xml
19 !:ext blend
21 #!:ext blend/blender
H A Dcompress77 # trees.blend http://fileformats.archiveteam.org/wiki/BLEND
82 !:ext gz/tgz/tpz/ipk/vbox-extpack/svgz/blend/dia/gnucash/rdata/xoj
/freebsd-src/sys/contrib/device-tree/Bindings/display/xlnx/
H A Dxlnx,zynqmp-dpsub.yaml56 - const: blend
187 reg-names = "dp", "blend", "av_buf", "aud";
/freebsd-src/lib/libpmc/pmu-events/arch/x86/amdzen4/
H A Dfloating-point.json185 "BriefDescription": "Retired scalar floating-point blend ops.",
251 "BriefDescription": "Retired vector floating-point blend ops.",
503 "BriefDescription": "Retired 128-bit packed floating-point blend ops.",
581 "BriefDescription": "Retired 256-bit packed floating-point blend ops.",
/freebsd-src/sys/contrib/device-tree/Bindings/mfd/
H A Dstericsson,db8500-prcmu.yaml175 description: Blit Blend Rotate and Rescale (B2R2), and Multi-Channel
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86ShuffleDecode.h103 /// Decode a BLEND immediate mask into a shuffle mask.
H A DX86ShuffleDecode.cpp317 // If there are more than 8 elements in the vector, then any immediate blend in DecodeBLENDMask()
/freebsd-src/lib/libpmc/pmu-events/arch/x86/amdzen2/
H A Dmemory.json6 … vector stores by manipulating vector elements in registers using shuffle/blend/swap instructions …
/freebsd-src/stand/common/
H A Dgfx_fb.c1275 * blend = alpha * fg + (1.0 - alpha) * bg.
1281 uint16_t blend, h, l; in alpha_blend()
1288 blend = (alpha * fg + (0xFF - alpha) * bg); in alpha_blend()
1290 h = blend >> 8; in alpha_blend()
1291 l = blend & 0xFF; in alpha_blend()
1301 * blend = alpha * fg + (1.0 - alpha) * bg.
1278 uint16_t blend, h, l; alpha_blend() local
/freebsd-src/sys/dev/drm2/
H A Ddrm_mode.h128 /* Planes blend with or override other bits on the CRTC */
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp1613 // when we have a 256bit-wide blend with immediate. in X86TargetLowering()
3612 /// Return true if every element in Mask, is an in-place blend/select mask or is in canWidenShuffleElements()
5885 // loops converting between OR and BLEND shuffles due to in getFauxShuffleMask()
6693 // See if this build_vector can be lowered as a blend with zero. in LowerAsSplatVectorLoad()
6713 // Let the shuffle legalizer deal with blend operations. in findEltLoadSrc()
8091 // Convert to blend(fsub,fadd). in LowerToHorizontalOp()
8839 // and blend the FREEZE-UNDEF operands back in. in LowerBUILD_VECTOR()
9459 /// that it is also not lane-crossing. It may however involve a blend from the in IsElementEquivalent()
9958 // Don't bother if we can blend instead. in getAVX512TruncNode()
10004 // X86 has dedicated unpack instructions that can handle specific blend
12722 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v2f64, V1, V2, Mask, lowerV2F64Shuffle() local
12799 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v2i64, V1, V2, Mask, lowerV2I64Shuffle() local
12942 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v4f32, V1, V2, Mask, lowerV4F32Shuffle() local
13110 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v4i32, V1, V2, Mask, lowerV4I32Shuffle() local
13819 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v8i16, V1, V2, Mask, lowerV8I16Shuffle() local
14218 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v16i8, V1, V2, Mask, lowerV16I8Shuffle() local
14261 if (SDValue Blend = lowerShuffleAsBitBlend(DL, MVT::v16i8, V1, V2, Mask, DAG)) lowerV16I8Shuffle() local
14857 if (SDValue Blend = lowerShuffleAsBlend(DL, VT, V1, V2, Mask, Zeroable, lowerV2X128Shuffle() local
15752 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v4f64, V1, V2, Mask, lowerV4F64Shuffle() local
15829 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v4i64, V1, V2, Mask, lowerV4I64Shuffle() local
15937 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v8f32, V1, V2, Mask, lowerV8F32Shuffle() local
16084 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v8i32, V1, V2, Mask, lowerV8I32Shuffle() local
16214 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v16i16, V1, V2, Mask, lowerV16I16Shuffle() local
16337 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v32i8, V1, V2, Mask, lowerV32I8Shuffle() local
16662 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v8f64, V1, V2, Mask, lowerV8F64Shuffle() local
16698 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v16f32, V1, V2, Mask, lowerV16F32Shuffle() local
16706 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v16f32, V1, V2, Mask, lowerV16F32Shuffle() local
16802 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v8i64, V1, V2, Mask, lowerV8I64Shuffle() local
16899 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v16i32, V1, V2, Mask, lowerV16I32Shuffle() local
16959 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v32i16, V1, V2, Mask, lowerV32I16Shuffle() local
17032 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v64i8, V1, V2, Mask, lowerV64I8Shuffle() local
50223 SDValue Blend = DAG.getSelect(DL, VT, ML->getMask(), VecLd, combineMaskedLoadConstantMask() local
50246 SDValue Blend = DAG.getSelect(DL, VT, ML->getMask(), NewML, combineMaskedLoadConstantMask() local
50268 if (SDValue Blend = combineMaskedLoadConstantMask(Mld, DAG, DCI)) combineMaskedLoad() local
[all...]
H A DX86InterleavedAccess.cpp253 // The first one is vpshufed and the second is a type of "blend" shuffle.
255 // correct offset. We are creating a vpsuffed + blend sequence between two
H A DX86.td577 // using the wrong blend type.
578 def TuningNoDomainDelayBlend : SubtargetFeature<"no-bypass-delay-blend",
580 "Has no bypass delay when using the 'wrong' blend type">;
H A DX86TargetTransformInfo.cpp1235 { ISD::SHL, MVT::v2i64, { 2, 4, 4, 6 } }, // Shift each lane + blend. in getArithmeticInstrCost()
1236 { ISD::SHL, MVT::v4i64, { 6, 7,11,15 } }, // Shift each lane + blend + split. in getArithmeticInstrCost()
1242 { ISD::SRL, MVT::v4i32, { 6, 7,12,16 } }, // Shift each lane + blend. in getArithmeticInstrCost()
1243 { ISD::SRL, MVT::v8i32, { 14, 14,26,34 } }, // Shift each lane + blend + split. in getArithmeticInstrCost()
1244 { ISD::SRL, MVT::v2i64, { 2, 4, 4, 6 } }, // Shift each lane + blend. in getArithmeticInstrCost()
1245 { ISD::SRL, MVT::v4i64, { 6, 7,11,15 } }, // Shift each lane + blend + split. in getArithmeticInstrCost()
1251 { ISD::SRA, MVT::v4i32, { 6, 7,12,16 } }, // Shift each lane + blend. in getArithmeticInstrCost()
1252 { ISD::SRA, MVT::v8i32, { 14, 14,26,34 } }, // Shift each lane + blend + split. in getArithmeticInstrCost()
1253 { ISD::SRA, MVT::v2i64, { 5, 6,10,14 } }, // Shift each lane + blend. in getArithmeticInstrCost()
1254 { ISD::SRA, MVT::v4i64, { 12, 12,22,30 } }, // Shift each lane + blend in getArithmeticInstrCost()
[all...]
H A DX86ISelLowering.h202 /// Blend where the selector is an immediate.
205 /// Dynamic (non-constant condition) vector blend where only the sign bits
/freebsd-src/lib/libpmc/pmu-events/arch/x86/amdzen3/
H A Dmemory.json6 … vector stores by manipulating vector elements in registers using shuffle/blend/swap instructions …
/freebsd-src/crypto/openssl/crypto/sha/asm/
H A Dkeccak1600-avx512.pl50 # relying heavily on blend instructions. There were lots of them,
102 # 20 blend instructions for 3 permutations. The result is 13% faster
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorOps.cpp132 /// Implement vselect in terms of XOR, AND, OR when blend is not
1277 // lanes into the appropriate locations, a blend of zero into the high bits, in ExpandSIGN_EXTEND_VECTOR_INREG()
1299 // Build up a zero vector to blend into this one. in ExpandZERO_EXTEND_VECTOR_INREG()
1414 // on platforms which do not support blend natively. in ExpandBITREVERSE()
/freebsd-src/lib/libpmc/pmu-events/arch/x86/skylakex/
H A Dpipeline.json942Blend Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS) in order …
/freebsd-src/lib/libpmc/pmu-events/arch/x86/skylake/
H A Dpipeline.json942Blend Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS) in order …
/freebsd-src/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A Dpipeline.json942Blend Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS) in order …
/freebsd-src/lib/libpmc/pmu-events/arch/x86/icelakex/
H A Dpipeline.json1048Blend Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS) in order …
/freebsd-src/lib/libpmc/pmu-events/arch/x86/icelake/
H A Dpipeline.json1086Blend Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS) in order …
/freebsd-src/lib/libpmc/pmu-events/arch/x86/tigerlake/
H A Dpipeline.json1028Blend Uops issued by the Resource Allocation Table (RAT) to the reservation station (RS) in order …
/freebsd-src/contrib/llvm-project/clang/lib/Basic/Targets/
H A DX86.h595 // 300=386, 400=486, 500=Pentium, 600=Blend (default) in MicrosoftX86_32TargetInfo()

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