| /freebsd-src/sys/contrib/device-tree/Bindings/clock/ |
| H A D | brcm,iproc-clocks.txt | 4 Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - compatible:
14 Should have a value of the form "brcm,<soc>-<pll>". For example, GENPLL on
15 Cygnus has a compatible string of "brcm,cygnus-genpll"
17 - #clock-cells:
20 - reg:
24 - clocks:
28 - clock-output-names:
34 #clock-cells = <0>;
35 compatible = "fixed-clock";
[all …]
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| H A D | brcm,iproc-clocks.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/brcm,iproc-clocks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ray Jui <rjui@broadcom.com>
11 - Scott Branden <sbranden@broadcom.com>
25 - brcm,bcm63138-armpll
26 - brcm,cygnus-armpll
27 - brcm,cygnus-genpll
28 - brcm,cygnus-lcpll0
[all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/spi/ |
| H A D | brcm,spi-bcm-qspi.txt | 4 BRCMSTB (BCM7XXX), Cygnus, NSP and NS2. The Broadcom Master SPI hw IP consits
9 io with 3-byte and 4-byte addressing support.
18 - #address-cells:
21 - #size-cells:
24 - compatible:
26 "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi" : MSPI+BSPI on BRCMSTB SoCs
27 "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi" : Second Instance of MSPI
29 "brcm,spi-bcm7425-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
31 "brcm,spi-bcm7429-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
33 "brcm,spi-bcm7435-qspi", "brcm,spi-bcm-qspi", "brcm,spi-brcmstb-mspi" : Second Instance of MSPI
[all …]
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| H A D | brcm,spi-bcm-qspi.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/spi/brcm,spi-bcm-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kamal Dasu <kdasu.kdev@gmail.com>
11 - Rafał Miłecki <rafal@milecki.pl>
15 BRCMSTB (BCM7XXX), Cygnus, NSP and NS2. The Broadcom Master SPI hw IP consists
20 io with 3-byte and 4-byte addressing support.
28 - $ref: spi-controller.yaml#
33 - description: Second Instance of MSPI BRCMSTB SoCs
[all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/arm/bcm/ |
| H A D | brcm,cygnus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/bcm/brcm,cygnus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom Cygnus
10 - Ray Jui <rjui@broadcom.com>
11 - Scott Branden <sbranden@broadcom.com>
18 - enum:
19 - brcm,bcm11300
20 - brcm,bcm11320
[all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | brcm,iproc-sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/brcm,iproc-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ray Jui <ray.jui@broadcom.com>
11 - Scott Branden <scott.branden@broadcom.com>
12 - Nicolas Saenz Julienne <nsaenz@kernel.org>
15 - $ref: mmc-controller.yaml#
20 - brcm,bcm2835-sdhci
21 - brcm,bcm2711-emmc2
[all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm911360k.dts | 33 /dts-v1/;
35 #include "bcm-cygnus.dtsi"
38 model = "Cygnus SVK (BCM911360K)";
39 compatible = "brcm,bcm11360", "brcm,cygnus";
46 stdout-path = "serial0:115200n8";
|
| H A D | bcm-cygnus.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
40 compatible = "brcm,cygnus";
41 model = "Broadcom Cygnus SoC";
42 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
[all …]
|
| H A D | bcm958300k.dts | 33 /dts-v1/;
35 #include "bcm-cygnus.dtsi"
39 model = "Cygnus SVK (BCM958300K)";
40 compatible = "brcm,bcm58300", "brcm,cygnus";
47 stdout-path = "serial0:115200n8";
67 nand-on-flash-bbt;
69 #address-cells = <1>;
70 #size-cells = <1>;
72 nand-ecc-strength = <24>;
73 nand-ecc-step-size = <1024>;
[all …]
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| H A D | bcm958305k.dts | 33 /dts-v1/;
35 #include "bcm-cygnus.dtsi"
39 model = "Cygnus Wireless Audio (BCM958305K)";
40 compatible = "brcm,bcm58305", "brcm,cygnus";
47 stdout-path = "serial0:115200n8";
75 nand-on-flash-bbt;
77 #address-cells = <1>;
78 #size-cells = <1>;
80 nand-ecc-strength = <24>;
81 nand-ecc-step-size = <1024>;
[all …]
|
| H A D | bcm911360_entphn.dts | 33 /dts-v1/;
35 #include "bcm-cygnus.dtsi"
36 #include "dt-bindings/input/input.h"
39 model = "Cygnus Enterprise Phone (BCM911360_ENTPHN)";
40 compatible = "brcm,bcm11360", "brcm,cygnus";
47 stdout-path = "serial0:115200n8";
50 gpio-keys {
51 compatible = "gpio-keys";
53 button-hook {
74 assigned-clocks =
[all …]
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| H A D | bcm-nsp.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 compatible = "arm,cortex-a9";
59 next-level-cache = <&L2>;
[all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | brcm,iproc-gpio.txt | 5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
23 - reg:
[all …]
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| /freebsd-src/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | brcm,iproc-static-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/brcm,iproc-static-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
17 const: brcm,iproc-static-adc
19 adc-syscon:
25 "#io-channel-cells":
31 clock-names:
40 - compatible
[all …]
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| /freebsd-src/sys/contrib/device-tree/src/arm64/broadcom/northstar2/ |
| H A D | ns2.dtsi | 35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cell
[all...] |
| /freebsd-src/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | brcm,brcmnand.txt | 3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
4 flash chips. It has a memory-mapped register interface for both control
11 iProc/Cygnus. Its history includes several similar (but not fully register
15 - compatible : May contain an SoC-specific compatibility string (see below)
16 to account for any SoC-specific hardware bits that may be
21 string, like "brcm,brcmnand-v7.0"
23 brcm,brcmnand-v2.1
24 brcm,brcmnand-v2.2
25 brcm,brcmnand-v4.0
26 brcm,brcmnand-v5.0
[all …]
|