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/freebsd-src/sys/dev/bhnd/bhndb/
H A Dbhndb_pcireg.h40 * [0x0000+0x1000] dynamic mapped backplane address space (window 0).
52 * [0x0000+0x1000] dynamic mapped backplane address space (window 0).
63 * [0x0000+0x1000] dynamic mapped backplane address space (window 0).
64 * [0x1000+0x1000] dynamic mapped backplane address space (window 1).
74 * [0x0000+0x1000] dynamic mapped backplane address space (window 0).
75 * [0x1000+0x1000] dynamic mapped backplane address space (window 1).
102 #define BHNDB_PCI_TO_SB_MB 0x98 /* signal backplane interrupts */
103 #define BHNDB_PCI_BACKPLANE_ADDR 0xa0 /* address an arbitrary location on the system backplane */
128 #define BHNDB_PCI_V0_BAR0_WIN0_CONTROL 0x80 /* backplane address space accessed by BAR0/WIN0 */
129 #define BHNDB_PCI_V0_BAR1_WIN0_CONTROL 0x84 /* backplane address space accessed by BAR1/WIN0. */
[all …]
H A Dbhndb_pci_hwdata.c91 /* bar0+0x0000: configurable backplane window */
124 /* bar0+0x0000: configurable backplane window */
290 /* bar0+0x0000: configurable backplane window */
372 /* bar0+0x0000: configurable backplane window */
447 /* bar0+0x0000: configurable backplane window */
527 /* bar0+0x0000: configurable backplane window */
538 /* bar0+0x1000: configurable backplane window */
610 /* bar0+0x0000: configurable backplane window */
621 /* bar0+0x1000: configurable backplane window */
/freebsd-src/share/man/man4/
H A Dsiba.430 .Nd Sonic Inc. Silicon Backplane driver
49 support for devices based on the Sonic Inc. Silicon Backplane, an
53 A common interconnect connects all of the Silicon Backplane's functional
57 Backplane.
60 requests onto the system backplane and a target agent that returns
H A Dbcma.431 .Nd Broadcom AMBA Backplane driver
50 support for devices using the ARM AMBA-based backplane architecture found
54 A common interconnect connects all of the backplane's functional
H A Dahci.4145 Supporting AHCI controllers may transmit that information to the backplane
147 Backplane controllers interpret received
/freebsd-src/contrib/ofed/libirdma/
H A Dice_devids.h41 /* Intel(R) Ethernet Connection E823-L for backplane */
51 /* Intel(R) Ethernet Controller E810-C for backplane */
57 /* Intel(R) Ethernet Controller E810-XXV for backplane */
63 /* Intel(R) Ethernet Connection E823-C for backplane */
73 /* Intel(R) Ethernet Connection C822N for backplane */
83 /* Intel(R) Ethernet Connection E822-L for backplane */
/freebsd-src/sys/dev/irdma/
H A Dice_devids.h41 /* Intel(R) Ethernet Connection E823-L for backplane */
51 /* Intel(R) Ethernet Controller E810-C for backplane */
57 /* Intel(R) Ethernet Controller E810-XXV for backplane */
63 /* Intel(R) Ethernet Connection E823-C for backplane */
73 /* Intel(R) Ethernet Connection C822N for backplane */
83 /* Intel(R) Ethernet Connection E822-L for backplane */
/freebsd-src/sys/dev/ice/
H A Dice_devids.h37 /* Intel(R) Ethernet Connection E823-L for backplane */
47 /* Intel(R) Ethernet Controller E830-CC for backplane */
53 /* Intel(R) Ethernet Controller E830-C for backplane */
55 /* Intel(R) Ethernet Controller E830-L for backplane */
65 /* Intel(R) Ethernet Controller E810-C for backplane */
78 /* Intel(R) Ethernet Controller E810-XXV for backplane */
84 /* Intel(R) Ethernet Connection E823-C for backplane */
94 /* Intel(R) Ethernet Connection E822-C for backplane */
104 /* Intel(R) Ethernet Connection E822-L for backplane */
112 /* Intel(R) Ethernet Connection E825-C for backplane */
[all...]
H A Dice_drv_info.h90 "Intel(R) Ethernet Controller E810-C for backplane"),
138 "Intel(R) Ethernet Connection E822-C for backplane"),
148 "Intel(R) Ethernet Connection E822-L for backplane"),
156 "Intel(R) Ethernet Connection E823-L for backplane"),
166 "Intel(R) Ethernet Connection E823-C for backplane"),
176 "Intel(R) Ethernet Controller E810-XXV for backplane"),
194 "Intel(R) Ethernet Connection E830-CC for backplane"),
215 "Intel(R) Ethernet Connection E830-C for backplane"),
221 "Intel(R) Ethernet Connection E830-L for backplane"),
227 "Intel(R) Ethernet Connection E825-C for backplane"),
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/mips/ingenic/
H A Ddevices.yaml41 - description: YSH & ATIL General Board, CU1000 Module with Neo Backplane
46 - description: YSH & ATIL General Board, CU1830 Module with Neo Backplane
51 - description: YSH & ATIL General Board, CU2000 Module with Neo Backplane
/freebsd-src/share/man/man9/
H A Dbhnd.9695 connected via one of two on-chip backplane (hardware bus) architectures.
699 backplane architecture, based on Sonics Silicon's interconnect IP.
700 Each core on the Sonics backplane vends a 4 KiB register block, containing both
706 backplane, based on ARM's AMBA IP.
708 with the new backplane, with additional
722 the backplane address space.
725 Any backplane interrupt vectors routed to the bridge core may be mapped by the
735 SoC backplane.
1021 from the backplane-specific agent/config space of the device
1032 from the backplane-specific agent/config space of the device
[all …]
/freebsd-src/sys/dev/bhnd/siba/
H A Dsibareg.h31 * Backplane configuration registers common to siba(4) core register
49 #define SIBA_MAX_INTR 32 /**< maximum number of backplane interrupt vectors */
129 #define SIBA_TPS_F0EN0 0x40 /* interrupt is always sent on the backplane */
241 #define SIBA_IDL_MINLAT_MASK 0xf00 /* minimum backplane latency */
243 #define SIBA_IDL_MAXLAT_MASK 0xf000 /* maximum backplane latency */
253 #define SIBA_IDL_SBREV_MASK 0xf0000000 /* sonics backplane revision code */
H A Dsibavar.h169 /** siba(4) backplane interrupt flag descriptor */
183 uint8_t sonics_rev; /**< sonics backplane revision code */
184 bool intr_en; /**< if backplane interrupt distribution is enabled for this core */
185 u_int intr_flag; /**< backplane interrupt flag # */
H A Dsiba.h43 * Broadcom Sonics Silicon backplane types and data structures.
/freebsd-src/sys/contrib/ncsw/inc/flib/
H A Dfsl_enet.h178 and phy or backplane;
180 and phy/backplane, SGMII phy can still synchronize with far-end phy at
222 MAC and SGMII phy or backplane */
226 MAC and SGMII phy or backplane */
230 MAC and SGMII phy or backplane */
237 MAC and QSGMII phy or backplane */
/freebsd-src/sys/contrib/ncsw/inc/
H A Denet_ext.h84 or backplane;
86 only to interface between MAC and phy/backplane,
141 MAC and SGMII phy or backplane */
144 MAC and SGMII phy or backplane */
147 MAC and SGMII phy or backplane */
153 MAC and QSGMII phy or backplane */
/freebsd-src/sys/dev/bhnd/
H A Dbhndreg.h76 #define BHND_CCS_BP_ON_APL 0x00040000 /**< RO: Backplane is running on ALP clock */
77 #define BHND_CCS_BP_ON_HT 0x00080000 /**< RO: Backplane is running on HT clock */
/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam3874-iceboard.dts105 * of the backplane. Since there are multiply assigned addresses, the
176 /* Backplane */
266 /* Backplane */
276 /* 16 slot backplane */
282 /* Single slot backplane */
/freebsd-src/sys/dev/bhnd/cores/chipc/pwrctl/
H A Dbhnd_pwrctl_subr.c73 * Return the backplane clock's chipc 'M' register offset for a given PLL type,
96 * Calculate the backplane clock speed (in Hz) for a given a set of clock
294 * Return the backplane clock speed in Hz.
480 * Distribute @p clock on backplane.
/freebsd-src/sys/dev/bhnd/cores/chipc/
H A Dchipcreg.h77 /* siba backplane configuration broadcast (siba-only) */
102 #define CHIPC_CLKC_SB 0x94 /* m0 (backplane) */
120 /* indirect backplane access (rev >= 10) */
236 #define CHIPC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */
462 /* Indirect backplane access */
484 #define CHIPC_CF_CD_DIV2 0x00000000 /* backplane/2 */
485 #define CHIPC_CF_CD_DIV3 0x00000040 /* backplane/3 */
486 #define CHIPC_CF_CD_DIV4 0x00000080 /* backplane/4 */
/freebsd-src/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-turing-rk1.dts5 * generic backplane (with no non-autoenumerable peripherals of its own) than
/freebsd-src/sys/net/
H A Dif_media.h169 #define IFM_1000_KX 30 /* 1000Base-KX backplane */
173 #define IFM_10G_KX4 IFM_X(32) /* 10GBase-KX4 backplane */
174 #define IFM_10G_KR IFM_X(33) /* 10GBase-KR backplane */
176 #define IFM_20G_KR2 IFM_X(35) /* 20GBase-KR2 backplane */
177 #define IFM_2500_KX IFM_X(36) /* 2500Base-KX backplane */
205 #define IFM_5000_KR IFM_X(64) /* 5GBase-KR backplane */
210 #define IFM_5000_KR_S IFM_X(69) /* 5GBase-KR backplane (short) */
211 #define IFM_5000_KR1 IFM_X(70) /* 5GBase-KR backplane */
/freebsd-src/usr.bin/sdiotool/
H A Dsdiotool.c133 * Set card control so an SDIO card reset does a WLAN backplane reset
134 * set PMUControl so a backplane reset does PMU state reload
166 u32 sbwad; /* Save backplane window address */
324 * The rest: function 1 silicon backplane core registers in brcmf_sdiod_regrw_helper()
/freebsd-src/stand/libsa/
H A Dzalloc_mem.h3 * Matthew Dillon <dillon@backplane.com>
H A Dzalloc_protos.h3 * Matthew Dillon <dillon@backplane.com>

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