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/freebsd-src/sys/contrib/device-tree/Bindings/display/
H A Ddp-aux-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dp-aux-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DisplayPort AUX bus
10 - Douglas Anderson <dianders@chromium.org>
14 are hooked up to them. This is the DP AUX bus. Over the DP AUX bus
16 particular, DP sinks support DDC over DP AUX which allows tunneling
17 a standard I2C DDC connection over the AUX channel.
20 of the DP controller under the "aux-bus" node.
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/freebsd-src/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra DisplayPort AUX Interface
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 When configured for DisplayPort AUX operation, the DPAUX controller
20 AUX channel.
24 pattern: "^dpaux@[0-9a-f]+$"
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H A Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
24 - nvidia,tegra124-sor
25 - nvidia,tegra210-sor
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/freebsd-src/sys/contrib/device-tree/Bindings/display/panel/
H A Dpanel-edp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Probeable (via DP AUX / EDID) eDP Panels with simple poweron sequences
10 - Douglas Anderson <dianders@chromium.org>
14 to a Embedded DisplayPort AUX bus (see display/dp-aux-bus.yaml) without
17 board, either for second-sourcing purposes or to support multiple SKUs
21 represented under the DP AUX bus. This means that we can use any
22 information provided by the DP AUX bus (including the EDID) to identify
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/freebsd-src/sys/contrib/device-tree/Bindings/display/msm/
H A Ddp-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controlle
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/freebsd-src/sys/contrib/device-tree/Bindings/pci/
H A Dqcom,pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Dqcom,pcie.txt3 - compatible:
7 - "qcom,pcie-ipq8064" for ipq8064
8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
9 - "qcom,pcie-apq8064" for apq8064
10 - "qcom,pcie-apq8084" for apq8084
11 - "qcom,pcie-msm8996" for msm8996 or apq8096
12 - "qcom,pcie-ipq4019" for ipq4019
13 - "qcom,pcie-ipq8074" for ipq8074
14 - "qcom,pcie-qcs404" for qcs404
15 - "qcom,pcie-sc8180x" for sc8180x
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H A Dhisilicon-histb-pcie.txt6 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
11 - compatible: Should be one of the following strings:
12 "hisilicon,hi3798cv200-pcie"
13 - reg: Should contain sysctl, rc_dbi, config registers location and length.
14 - reg-names: Must include the following entries:
16 "rc-dbi": configuration space of PCIe controller;
18 - bus-range: PCI bus numbers covered.
19 - interrupts: MSI interrupt.
20 - interrupt-names: Must include "msi" entries.
21 - clocks: List of phandle and clock specifier pairs as listed in clock-names
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H A Dsnps,dw-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
22 DWC PCIe CSR space is normally accessed over the dedicated Data Bus
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
25 and is split up into several sub-parts Standard PCIe configuration
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H A Dtoshiba,visconti-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/toshiba,visconti-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
16 - $ref: /schemas/pci/snps,dw-pcie.yaml#
20 const: toshiba,visconti-pcie
24 - description: Data Bus Interface (DBI) registers.
25 - description: PCIe configuration space region.
26 - description: Visconti specific additional registers.
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H A Drockchip-dw-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip-d
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H A Dintel,keembay-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/intel,keembay-pcie.yaml#
5 $schema: http://devicetree.org/meta-schema
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/freebsd-src/sys/arm/ti/omap4/
H A Domap4_l2cache.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 #include <sys/bus.h>
35 #include <machine/bus.h>
48 uint32_t aux, prefetch; in omap4_pl310_init() local
50 aux = pl310_read4(sc, PL310_AUX_CTRL); in omap4_pl310_init()
57 aux &= ~AUX_CTRL_INSTR_PREFETCH; in omap4_pl310_init()
60 // aux &= ~AUX_CTRL_DATA_PREFETCH; in omap4_pl310_init()
66 aux |= AUX_CTRL_DATA_PREFETCH; in omap4_pl310_init()
73 ti_smc0(aux, 0, WRITE_AUXCTRL_REG); in omap4_pl310_init()
/freebsd-src/sys/contrib/device-tree/Bindings/display/bridge/
H A Dps8640.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Boichat <drinkcat@chromium.org>
13 The PS8640 is a low power MIPI-to-eDP video format converter supporting
28 powerdown-gpios:
32 reset-gpios:
36 vdd12-supply:
39 vdd33-supply:
42 aux-bus:
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H A Danalogix,anx7625.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Xin Ji <xji@analogixsemi.com>
14 The ANX7625 is an ultra-low power 4K Mobile HD Transmitter
28 enable-gpios:
32 reset-gpios:
36 vdd10-supply:
39 vdd18-supply:
42 vdd33-supply:
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H A Dti,sn65dsi86.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd-src/sys/contrib/device-tree/Bindings/spi/
H A Dbrcm,bcm2835-aux-spi.txt8 - compatible: Should be "brcm,bcm2835-aux-spi".
9 - reg: Should contain register location and length for the spi block
10 - interrupts: Should contain shared interrupt of the aux block
11 - clocks: The clock feeding the SPI controller - needs to
15 - cs-gpios: the cs-gpios (native cs is NOT supported)
16 see also spi-bus.txt
21 compatible = "brcm,bcm2835-aux-spi";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 cs-gpios = <&gpio 18>, <&gpio 17>, <&gpio 16>;
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H A Dcdns,xspi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2020-21 Cadence
4 ---
6 $schema: http://devicetree.org/meta-schema
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/freebsd-src/sys/riscv/sifive/
H A Dfu740_pci_dw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
33 #include <sys/bus.h>
39 #include <machine/bus.h>
101 #define FUDW_MGMT_READ(_sc, _o) bus_read_4((_sc)->mgmt_res, (_o))
102 #define FUDW_MGMT_WRITE(_sc, _o, _v) bus_write_4((_sc)->mgmt_res, (_o), (_v))
105 { "sifive,fu740-pci
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/freebsd-src/sys/arm64/rockchip/
H A Drk3568_pcie.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
34 #include <sys/bus.h>
57 #include <machine/bus.h>
99 clk_t aclk_mst, aclk_slv, aclk_dbi, pclk, aux; member
106 {"rockchip,rk3568-pcie", 1},
116 device_printf(sc->de in rk3568_intr()
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/freebsd-src/sys/contrib/device-tree/Bindings/rtc/
H A Drtc-ds1307.txt4 - compatible: should be one of:
23 - reg: I2C bus address of the device
26 - interrupts: rtc alarm interrupt.
27 - clock-output-names: From common clock binding to override the default output
29 - wakeup-source: Enables wake up of host system on alarm
30 - trickle-resistor-ohms : ds1339, ds1340 and ds 1388 only
34 - aux-voltage-chargeable: ds1339, ds1340, ds1388 and rx8130 only
40 - trickle-diode-disable : ds1339, ds1340 and ds1388 only
43 (superseded by aux-voltage-chargeable)
49 interrupt-parent = <&gpio4>;
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/freebsd-src/sys/contrib/device-tree/Bindings/
H A Dexample-schema.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 # All the top-level keys are standard json-schema keywords except for
10 $id: http://devicetree.org/schemas/example-schema.yaml#
11 # $schema is the meta-schema this schema should be validated with.
12 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 - Rob Herring <robh@kernel.org>
20 A more detailed multi-line description of the binding.
44 - items:
51 - enum:
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/freebsd-src/sys/arm/arm/
H A Dpl310.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
35 #include <sys/bus.h>
43 #include <machine/bus.h>
72 mtx_lock_spin(&(sc)->sc_mtx); \
76 mtx_unlock_spin(&(sc)->sc_mtx); \
85 static const uint32_t g_l2cache_align_mask = (32 - 1);
94 {"arm,pl310", true}, /* Non-standard, FreeBSD. */
95 {"arm,pl310-cache", true},
125 uint32_t aux, prefetch; in pl310_print_config() local
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/freebsd-src/sys/dev/atkbdc/
H A Datkbdc.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 1996-1999
5 * Kazutaka YOKOTA (yokota@zodiac.mech.utsunomiya-u.ac.jp)
40 #include <sys/bus.h>
43 #include <machine/bus.h>
66 #define availq(q) ((q)->head != (q)->tail)
68 #define emptyq(q) ((q)->tail = (q)->head = (q)->qcount = 0)
70 #define emptyq(q) ((q)->tail = (q)->head = 0)
73 #define read_data(k) (bus_space_read_1((k)->iot, (k)->ioh0, 0))
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/freebsd-src/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra124-nyan-big-fhd.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra124-nyan-big.dts"
10 aux-bus {

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