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/freebsd-src/lib/libpmc/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dinstruction.json66 …"PublicDescription": "This event counts architecturally executed zero blocking operations due to t…
69 …"BriefDescription": "This event counts architecturally executed zero blocking operations due to th…
72 … "PublicDescription": "This event counts architecturally executed floating-point move operations.",
75 "BriefDescription": "This event counts architecturally executed floating-point move operations."
78 …"PublicDescription": "This event counts architecturally executed operations that using predicate r…
81 …"BriefDescription": "This event counts architecturally executed operations that using predicate re…
84 …"PublicDescription": "This event counts architecturally executed inter-element manipulation operat…
87 …"BriefDescription": "This event counts architecturally executed inter-element manipulation operati…
90 …"PublicDescription": "This event counts architecturally executed inter-register manipulation opera…
93 …"BriefDescription": "This event counts architecturally executed inter-register manipulation operat…
[all …]
/freebsd-src/lib/libpmc/pmu-events/arch/arm64/
H A Dcommon-and-microarch.json3 …"PublicDescription": "Instruction architecturally executed, Condition code check pass, software in…
6 …"BriefDescription": "Instruction architecturally executed, Condition code check pass, software inc…
39 … "PublicDescription": "Instruction architecturally executed, condition code check pass, load",
42 "BriefDescription": "Instruction architecturally executed, condition code check pass, load"
45 … "PublicDescription": "Instruction architecturally executed, condition code check pass, store",
48 "BriefDescription": "Instruction architecturally executed, condition code check pass, store"
51 "PublicDescription": "Instruction architecturally executed",
54 "BriefDescription": "Instruction architecturally executed"
63 …"PublicDescription": "Instruction architecturally executed, condition check pass, exception return…
66 … "BriefDescription": "Instruction architecturally executed, condition check pass, exception return"
[all …]
/freebsd-src/lib/libpmc/pmu-events/arch/arm64/ampere/emag/
H A Dinstruction.json42 "PublicDescription": "Instruction architecturally executed, software increment",
/freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Driscv,cpu-intc.txt13 timer interrupt comes from an architecturally mandated real-time timer that is
/freebsd-src/contrib/llvm-project/llvm/include/llvm/MC/MCDisassembler/
H A DMCDisassembler.h88 /// understandable semantics but which is architecturally
94 /// valid but architecturally incorrect.
/freebsd-src/sys/contrib/device-tree/Bindings/arm/
H A Dcoresight-cti.yaml37 architecturally connected CTI an additional compatible string is used to
235 # v8 architecturally defined CTI - CPU + ETM connections generated by the
H A Darm,coresight-cti.yaml36 architecturally connected CTI an additional compatible string is used to
251 # v8 architecturally defined CTI - CPU + ETM connections generated by the
/freebsd-src/contrib/llvm-project/lldb/source/Plugins/ObjectFile/Minidump/
H A DObjectFileMinidump.h17 /// should move as well, but for now this is the best place architecturally.
/freebsd-src/sys/contrib/device-tree/Bindings/timer/
H A Darm,arch_timer_mmio.yaml51 registers, which contain their architecturally-defined reset values. Only
H A Darm,arch_timer.yaml94 registers, which contain their architecturally-defined reset values. Only
/freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/
H A Dnvidia,tegra30-mc.yaml15 Tegra30 Memory Controller architecturally consists of the following parts:
/freebsd-src/contrib/llvm-project/llvm/include/llvm/MCA/
H A DPipeline.h35 /// executing and register writes are architecturally committed.
H A DHWEventListener.h102 // Number of register writes that have been architecturally committed. There
/freebsd-src/lib/libpmc/pmu-events/arch/x86/silvermont/
H A Dpipeline.json108 …er of any mispredicted branch instructions retired. This umask is an architecturally defined event…
165 …ate by dividing the event count by the core frequency. This event is architecturally defined and i…
190 …he elapsed time while the core was not in halt state. This event is architecturally defined and i…
/freebsd-src/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A DRetireControlUnit.h33 /// On instruction retired, register updates are all architecturally
/freebsd-src/sys/arm64/vmm/
H A Dvmm_reset.c42 * Make the architecturally UNKNOWN value 0. As a bonus, we don't have to
/freebsd-src/contrib/llvm-project/compiler-rt/lib/scudo/standalone/include/scudo/
H A Dinterface.h79 // equal to the architecturally defined memory tag granule size (16 on aarch64).
/freebsd-src/sys/amd64/include/
H A Dvmm.h53 * Identifiers for architecturally defined registers.
519 * XXX The contents of the 'access' field are architecturally defined except
/freebsd-src/stand/man/
H A Dloader.efi.8177 in architecturally specific ways and are included to aid in discovery
/freebsd-src/sys/arm64/include/
H A Dvmm.h49 * Identifiers for architecturally defined registers.
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86IndirectThunks.cpp99 // then the value in %r11 is (architecturally) correct prior to the jump. in populateThunk()
/freebsd-src/sys/arm/arm/
H A Dswtch-v6.S140 * is not architecturally invisible. See ARM Architecture Reference
/freebsd-src/usr.bin/clang/llvm-mca/
H A Dllvm-mca.11087 Retire (Instruction is retired; writes are architecturally committed).
1092 * Retire (Instruction is retired; writes are architecturally committed).
/freebsd-src/lib/libpmc/
H A Dpmc.westmere.3214 Counts the number of instructions with an architecturally-visible store
219 Counts the number of instructions with an architecturally-visible store
H A Dpmc.corei7.3206 Counts the number of instructions with an architecturally-visible store
211 Counts the number of instructions with an architecturally-visible store

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