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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedPredicates.td40 // Check the extension type in the register offset addressing mode.
48 // Check for scaling in the register offset addressing mode.
145 // load using the post index addressing mode.
174 // store using the post index addressing mode.
195 // or store using the post index addressing mode.
200 // using the register offset addressing mode.
216 // using the register offset addressing mode.
228 // store using the register offset addressing mode.
254 // Identify a load or store using the register offset addressing mode
/freebsd-src/share/doc/smm/18.net/
H A D2.t45 data transport services with minimal addressing
47 Addressing at this level is normally host to host,
53 flow control, and service addressing are normally
65 addressing which are mapped into formats required
/freebsd-src/lib/libpmc/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dinstruction.json120 …is event counts architecturally executed operations that uses 'pre-index' as its addressing mode.",
123 …his event counts architecturally executed operations that uses 'pre-index' as its addressing mode."
126 …s event counts architecturally executed operations that uses 'post-index' as its addressing mode.",
129 …is event counts architecturally executed operations that uses 'post-index' as its addressing mode."
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonBaseInfo.h31 NoAddrMode = 0, // No addressing mode
32 Absolute = 1, // Absolute addressing mode
33 AbsoluteSet = 2, // Absolute set addressing mode
37 PostInc = 6 // Post increment addressing mode
127 // Addressing mode for load/store instructions.
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86SpeculativeExecutionSideEffectSuppression.cpp48 "branch instruction has an input to the addressing mode that is a "
75 // This function returns whether the passed instruction uses a memory addressing
76 // mode that is constant. We treat all memory addressing modes that read
78 // of the EFLAGS register results in an addressing mode being considered
156 // This is a branch, but it only has constant addressing mode and we're in runOnMachineFunction()
/freebsd-src/contrib/netbsd-tests/usr.bin/sort/
H A Dt_sort.sh830 atf_set "descr" "Tests +- addressing: +1 should become -k2.1"
854 atf_set "descr" "Tests +- addressing: +1 -2 should become -k2.1,2.0"
878 atf_set "descr" "Tests +- addressing: '-- +0' raised a '-k1.1: No" \
891 atf_set "descr" "Tests += addressing: apparently nonmonotone field" \
908 atf_set "descr" "Tests +- addressing: 'file +0' raised a '-k1.1: No" \
924 atf_set "descr" "Tests +- addressing: intermediate wrong behavior" \
936 atf_set "descr" "Tests +- addressing: invalid record delimiter"
956 atf_set "descr" "Tests +- addressing: using -T caused a 'No such file" \
968 atf_set "descr" "Tests +- addressing: field without end"
/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap4-cpu-thermal.dtsi16 * See 44xx files for single sensor addressing, omap5 and dra7 need
17 * also sensor ID for addressing.
/freebsd-src/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelDAGToDAG.cpp134 /// Return true if this addressing mode is already PC-relative.
411 /// specified addressing mode without any further recursion. in matchAddressBase()
449 // PC relative addressing: %PC + 16-bit displacement! in matchAddressRecursively()
521 /// Add the specified node to the specified addressing mode, returning true if in matchAddress()
522 /// it cannot be done. This just pattern matches for the addressing mode. in matchAddress()
570 /// addressing mode. These wrap things that will resolve down into a symbol in matchWrapper()
574 // If the addressing mode already has a symbol as the displacement, we can in matchWrapper()
964 // In order to tell AsmPrinter the exact addressing mode we select here, which in SelectInlineAsmMemoryOperand()
967 // the addressing mode kind. in SelectInlineAsmMemoryOperand()
977 // Try every supported (memory) addressing mode in SelectInlineAsmMemoryOperand()
[all...]
H A DM68kAsmPrinter.cpp107 // Immediate value that goes here is the addressing mode kind we set in PrintAsmMemoryOperand()
110 // Skip the addressing mode kind operand. in PrintAsmMemoryOperand()
140 llvm_unreachable("Unrecognized memory addressing mode"); in PrintAsmMemoryOperand()
/freebsd-src/contrib/processor-trace/libipt/internal/include/
H A Dpti-sib.h36 /* Effective Addressing Mode: ptem_unknown. */ {
79 /* Effective Addressing Mode: ptem_16bit. */ {
122 /* Effective Addressing Mode: ptem_32bit. */ {
165 /* Effective Addressing Mode: ptem_64bit. */ {
H A Dpti-disp_default.h36 /* Effective Addressing Mode: ptem_unknown. */ {
79 /* Effective Addressing Mode: ptem_16bit. */ {
122 /* Effective Addressing Mode: ptem_32bit. */ {
165 /* Effective Addressing Mode: ptem_64bit. */ {
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAddressingModes.h1 //===-- ARMAddressingModes.h - ARM Addressing Modes -------------*- C++ -*-===//
9 // This file contains the ARM addressing mode implementation stuff.
25 /// ARM_AM - ARM Addressing Mode Stuff
76 default: llvm_unreachable("Unknown addressing sub-mode!"); in getAMSubModeStr()
85 // Addressing Mode #1: shift_operand with registers
88 // This 'addressing mode' is used for arithmetic instructions. It can
383 // Addressing Mode #2
396 // If this addressing mode is a frame index (before prolog/epilog insertion
418 // Addressing Mode #3
444 // Addressing Mod
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/mtd/
H A Djedec,spi-nor.txt72 - broken-flash-reset : Some flash devices utilize stateful addressing modes
73 (e.g., for 32-bit addressing) which need to be managed
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrFormats.td9 // Addressing modes for load/store instructions
14 def NoAddrMode : AddrModeType<0>; // No addressing mode
15 def Absolute : AddrModeType<1>; // Absolute addressing mode
16 def AbsoluteSet : AddrModeType<2>; // Absolute set addressing mode
20 def PostInc : AddrModeType<6>; // Post increment addressing mode
135 // Addressing mode for load/store instructions.
/freebsd-src/sys/dev/mdio/
H A Dmdio_if.m95 * MDIO_DEVADDR_NONE to request Clause 22 register addressing.
112 * MDIO_DEVADDR_NONE to request Clause 22 register addressing.
/freebsd-src/share/man/man4/
H A Dnetintro.457 packet fragmentation and reassembly, routing, addressing, and
60 methods of addressing, though the current protocol implementations
75 usually determined by the addressing structure inherent in
122 .Sh ADDRESSING
H A Dunix.453 file system pathnames for addressing.
54 .Sh ADDRESSING
113 protocol family does not support broadcast addressing or any form
H A Dnetgraph.4203 addressing).
211 for the message (absolute addressing).
214 addressing
219 addressing modes are available to control programs outside the kernel;
227 that is suitable for addressing a reply.
583 .Ss Addressing
587 addressing any single node in the graph.
659 In each of these cases, where a relative addressing mode is
686 addressing to route the messages.
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.h213 /// Reserve the registers that may be accessed using indirect addressing.
221 /// We model indirect addressing using a virtual address space that can be
233 /// read or write or -1 if indirect addressing is not used by this program.
237 /// read or write or -1 if indirect addressing is not used by this program.
/freebsd-src/contrib/libcxxrt/
H A Ddwarf_eh.h82 * the low four of an octet. The high four bits store the addressing mode.
90 * DWARF addressing mode constants. When reading a pointer value from a DWARF
91 * exception table, you must know how it is stored and what the addressing mode
93 * number. The high four bits tell you the addressing mode, allowing you to
114 * Returns the addressing mode component of this encoding.
/freebsd-src/sys/dev/bhnd/cores/chipc/
H A Dchipc.h81 uint8_t backplane_64; /**< Backplane supports 64-bit addressing.
84 addressing. */
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZOperands.td89 // Constructs an AsmOperandClass for addressing mode FORMAT, treating the
101 // Constructs an instruction operand for an addressing mode. FORMAT,
115 // Constructs both a DAG pattern and instruction operand for an addressing mode.
120 // choices for the same underlying addressing mode. SUFFIX is similarly
132 // An addressing mode with a base and displacement but no index.
138 // An addressing mode with a base, displacement and index.
161 // An addressing mode with a base, displacement and a vector index.
601 // Addressing modes
629 // DAG patterns and operands for addressing modes. Each mode has
H A DSystemZPatterns.td40 // respectively. MODE is the addressing mode and IMM is the type
68 // INSN stores the low 32 bits of a GPR to a memory with addressing mode MODE.
84 // INSN stores the low 32 bits of a GPR using PC-relative addressing.
/freebsd-src/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp142 /// MatchWrapper - Try to match MSP430ISD::Wrapper node into an addressing mode. in MatchWrapper()
146 // If the addressing mode already has a symbol as the displacement, we can in MatchWrapper()
176 /// specified addressing mode without any further recursion. in MatchAddressBase()
251 /// SelectAddr - returns true if it is able pattern match an addressing mode. in SelectAddr()
252 /// It returns the operands which make up the maximal addressing mode it can in SelectAddr()
/freebsd-src/crypto/openssl/crypto/perlasm/
H A DREADME.md32 &BP(off,base,index,scale) Byte pointer addressing
33 &DWP(off,base,index,scale) Word pointer addressing

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