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/freebsd-src/sys/contrib/device-tree/Bindings/iio/adc/
H A Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/s
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H A Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-ad
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H A Dnxp,imx8qxp-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP IMX8QXP ADC
10 - Cai Huoqing <caihuoqing@baidu.com>
13 Supports the ADC found on the IMX8QXP SoC.
17 const: nxp,imx8qxp-adc
28 clock-names:
30 - const: per
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H A Dadi,ad9467.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ad
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H A Dti,ads131e08.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs
10 - Jonathan Cameron <jic23@kernel.org>
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA), internal reference
17 The communication with ADC chip is via the SPI bus (mode 1).
24 - ti,ads131e04
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H A Dnuvoton,npcm-adc.txt1 Nuvoton NPCM Analog to Digital Converter (ADC)
3 The NPCM ADC is a 10-bit converter for eight channel inputs.
6 - compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC.
7 - reg: specifies physical base address and size of the registers.
8 - interrupts: Contain the ADC interrupt with flags for falling edge.
9 - resets : phandle to the reset control for this device.
12 - clocks: phandle of ADC reference clock, in case the clock is not
13 added the ADC will use the default ADC sample rate.
14 - vref-supply: The regulator supply ADC reference voltage, in case the
15 vref-supply is not added the ADC will use internal voltage
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H A Dnuvoton,npcm750-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton NPCM BMC Analog to Digital Converter (ADC)
10 - Tomer Maimon <tmaimon77@gmail.com>
13 The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter,
19 - nuvoton,npcm750-adc
20 - nuvoton,npcm845-adc
27 description: ADC interrupt, should be set for falling edge.
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H A Dnxp,imx93-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx93-ad
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H A Dadi,ad4130.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices AD4130 ADC device driver
11 - Cosmin Tanislav <cosmin.tanislav@analog.com>
14 Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here:
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
20 - adi,ad4130
29 clock-names:
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H A Dmediatek,mt2701-auxadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx)
10 - Zhiyong Tao <zhiyong.tao@mediatek.com>
11 - Matthias Brugger <matthias.bgg@gmail.com>
14 The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
18 directly via its own bus interface. See mediatek-thermal bindings
24 - enum:
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/freebsd-src/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc32xx.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
9 #include <dt-bindings/clock/lpc32xx-clock.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 interrupt-parent = <&mic>;
19 #address-cells = <1>;
20 #size-cells = <0>;
23 compatible = "arm,arm926ej-s";
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/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8-ss-dma.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/dma/fsl-edma.h>
9 #include <dt-bindings/firmware/imx/rsrc.h>
11 dma_ipg_clk: clock-dm
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H A Dimx8mp-tqma8mpql-mba8mpxl.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
7 /dts-v1/;
9 #include <dt-binding
297 adc: adc@0 { global() label
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/freebsd-src/sys/contrib/device-tree/Bindings/sound/
H A Dst,stm32-adfsdm.txt5 For details on DFSDM bindings refer to ../iio/adc/st,stm32-dfsdm-adc.txt
8 - compatible: "st,stm32h7-dfsdm-dai".
10 - #sound-dai-cells : Must be equal to 0
12 - io-channels : phandle to iio dfsdm instance node.
17 compatible = "audio-graph-card";
23 compatible = "st,stm32h7-dfsdm";
26 clock-names = "dfsdm";
27 #interrupt-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
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H A Dnau8821.txt6 - compatible : Must be "nuvoton,nau8821"
8 - reg : the I2C address of the device. This is either 0x1B (CSB=0) or 0x54 (CSB=1).
11 - nuvoton,jkdet-enable: Enable jack detection via JKDET pin.
12 - nuvoton,jkdet-pull-enable: Enable JKDET pin pull. If set - pin pull enabled,
14 - nuvoton,jkdet-pull-up: Pull-up JKDET pin. If set then JKDET pin is pull up, otherwise pull down.
15 - nuvoton,jkdet-polarity: JKDET pin polarity. 0 - active high, 1 - active low.
17 - nuvoton,vref-impedance: VREF Impedance selection
18 0 - Open
19 1 - 25 kOhm
20 2 - 125 kOhm
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/freebsd-src/sys/contrib/device-tree/src/arm/st/
H A Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include "../armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cell
499 adc: adc@40012000 { global() label
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H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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H A Dstm32mp151.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-binding
1079 adc: adc@48003000 { global() label
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/freebsd-src/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxl-s905x-khadas-vim.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxl-s905x-p212.dtsi"
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/sound/meson-ai
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/freebsd-src/sys/contrib/device-tree/src/mips/img/
H A Dpistachio.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
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/freebsd-src/sys/contrib/device-tree/Bindings/clock/
H A Dbrcm,iproc-clocks.txt4 Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - compatible:
14 Should have a value of the form "brcm,<soc>-<pll>". For example, GENPLL on
15 Cygnus has a compatible string of "brcm,cygnus-genpll"
17 - #clock-cells:
20 - reg:
24 - clocks:
28 - clock-output-names:
34 #clock-cells = <0>;
35 compatible = "fixed-clock";
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/freebsd-src/sys/contrib/device-tree/src/arm/nuvoton/
H A Dnuvoton-common-npcm7xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
7 #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <25000000>;
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/freebsd-src/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-supply = <&vdd2_reg>;
19 avdd-plle-supply = <&ldo6_reg>;
20 hvdd-pex-supply = <&reg_module_3v3>;
21 vddio-pex-ctl-supply = <&reg_module_3v3>;
22 vdd-pexa-supply = <&vdd2_reg>;
23 vdd-pexb-supply = <&vdd2_reg>;
27 nvidia,num-lanes = <4>;
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H A Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-supply = <&vdd2_reg>;
18 avdd-plle-supply = <&ldo6_reg>;
19 hvdd-pex-supply = <&reg_module_3v3>;
20 vddio-pex-ctl-supply = <&reg_module_3v3>;
21 vdd-pexa-supply = <&vdd2_reg>;
22 vdd-pexb-supply = <&vdd2_reg>;
26 nvidia,num-lanes = <4>;
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/freebsd-src/sys/arm/allwinner/
H A Da33_codec.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
44 #include <dev/clk/clk.h>
133 { "allwinner,sun8i-a33-codec", 1},
140 { -1, 0 }
152 #define CODEC_LOCK(sc) mtx_lock(&(sc)->mtx)
153 #define CODEC_UNLOCK(sc) mtx_unlock(&(sc)->mtx)
154 #define CODEC_READ(sc, reg) bus_read_4((sc)->res[0], (reg))
155 #define CODEC_WRITE(sc, reg, val) bus_write_4((sc)->res[0], (reg), (val))
167 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) in sun8i_codec_probe()
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