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/freebsd-src/contrib/arm-optimized-routines/pl/math/
H A Dpoly_generic.h
H A Dpoly_sve_generic.h
/freebsd-src/sys/contrib/device-tree/src/powerpc/fsl/
H A Dmpc8568mds.dts29 0x2 0x0 0xf0000000 0x04000000
97 reg = <0x2>;
128 0x4 0xa 0x1 0x0 0x2 0x0 /* TxD0 */
129 0x4 0x9 0x1 0x0 0x2 0x0 /* TxD1 */
130 0x4 0x8 0x1 0x0 0x2 0x0 /* TxD2 */
131 0x4 0x7 0x1 0x0 0x2 0x0 /* TxD3 */
132 0x4 0x17 0x1 0x0 0x2 0x0 /* TxD4 */
133 0x4 0x16 0x1 0x0 0x2 0x0 /* TxD5 */
134 0x4 0x15 0x1 0x0 0x2 0x0 /* TxD6 */
135 0x4 0x14 0x1 0x0 0x2 0x0 /* TxD7 */
[all …]
H A Dmpc8569mds.dts34 0x2 0x0 0x0 0xf0000000 0x04000000
143 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
144 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */
145 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/
148 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */
149 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
150 0x0 0x6 0x2 0x0 0x3 0x0 /* ENET1_RXD0_SER1_RXD0 */
151 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */
152 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
153 0x0 0x9 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
[all …]
H A Dp1025twr.dtsi98 reg = <0x2 0x0000 0x0004>;
112 reg = <0x2>;
180 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
181 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
182 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
183 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
184 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
185 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
186 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
187 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
[all …]
H A Dp1025rdb.dtsi253 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
254 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
255 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
256 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
257 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
258 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
259 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
260 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
261 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
262 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
[all …]
H A Dp1021mds.dts28 0x2 0x0 0x0 0xf8010000 0x00020000
206 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
207 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
208 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
209 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
210 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
211 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
212 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
213 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
214 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8ulp-pinfunc.h123 #define MX8ULP_PAD_PTD11__TPM8_CH5 0x002C 0x0B2C 0x6 0x2
176 #define MX8ULP_PAD_PTD16__FXIO1_D31 0x0040 0x08A0 0x2 0x1
189 #define MX8ULP_PAD_PTD17__FXIO1_D30 0x0044 0x089C 0x2 0x1
191 #define MX8ULP_PAD_PTD17__EXT_AUD_MCLK3 0x0044 0x0B14 0x4 0x2
202 #define MX8ULP_PAD_PTD18__FXIO1_D29 0x0048 0x0894 0x2 0x1
206 #define MX8ULP_PAD_PTD18__TPM8_CH0 0x0048 0x0B18 0x6 0x2
215 #define MX8ULP_PAD_PTD19__FXIO1_D28 0x004C 0x0890 0x2 0x1
217 #define MX8ULP_PAD_PTD19__TPM8_CH1 0x004C 0x0B1C 0x6 0x2
226 #define MX8ULP_PAD_PTD20__FXIO1_D27 0x0050 0x088C 0x2 0x1
229 #define MX8ULP_PAD_PTD20__TPM8_CLKIN 0x0050 0x0B30 0x6 0x2
[all …]
H A Dimx8mp-pinfunc.h50 #define MX8MP_IOMUXC_GPIO1_IO08__PWM1_OUT 0x034 0x294 0x000 0x2 0x0
56 #define MX8MP_IOMUXC_GPIO1_IO09__PWM2_OUT 0x038 0x298 0x000 0x2 0x0
62 #define MX8MP_IOMUXC_GPIO1_IO10__PWM3_OUT 0x03C 0x29C 0x000 0x2 0x0
65 #define MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT 0x040 0x2A0 0x000 0x2 0x0
85 #define MX8MP_IOMUXC_ENET_MDC__AUDIOMIX_SAI6_TX_DATA00 0x054 0x2B4 0x000 0x2 0x0
89 #define MX8MP_IOMUXC_ENET_MDIO__AUDIOMIX_SAI6_TX_SYNC 0x058 0x2B8 0x528 0x2 0x0
94 #define MX8MP_IOMUXC_ENET_TD3__AUDIOMIX_SAI6_TX_BCLK 0x05C 0x2BC 0x524 0x2 0x0
100 #define MX8MP_IOMUXC_ENET_TD2__AUDIOMIX_SAI6_RX_DATA00 0x060 0x2C0 0x51C 0x2 0x0
105 #define MX8MP_IOMUXC_ENET_TD1__AUDIOMIX_SAI6_RX_SYNC 0x064 0x2C4 0x520 0x2 0x0
110 #define MX8MP_IOMUXC_ENET_TD0__AUDIOMIX_SAI6_RX_BCLK 0x068 0x2C8 0x518 0x2 0x0
[all …]
/freebsd-src/contrib/netbsd-tests/lib/libc/net/getaddrinfo/
H A Dbasics_v4v6.exp1 arg: flags 0x2 family 0 socktype 0 protocol 0 addrlen 0 host ::1 serv http
2 ai1: flags 0x2 family 24 socktype 2 protocol 17 addrlen 28 host ::1 serv http
3 ai2: flags 0x2 family 24 socktype 1 protocol 6 addrlen 28 host ::1 serv http
5 arg: flags 0x2 family 0 socktype 0 protocol 0 addrlen 0 host 127.0.0.1 serv http
6 ai1: flags 0x2 family 2 socktype 2 protocol 17 addrlen 16 host 127.0.0.1 serv http
7 ai2: flags 0x2 family 2 socktype 1 protocol 6 addrlen 16 host 127.0.0.1 serv http
9 arg: flags 0x2 family 0 socktype 0 protocol 0 addrlen 0 host localhost serv http
10 ai1: flags 0x2 family 24 socktype 2 protocol 17 addrlen 28 host ::1 serv http
11 ai2: flags 0x2 family 2 socktype 2 protocol 17 addrlen 16 host 127.0.0.1 serv http
12 ai3: flags 0x2 family 24 socktype 1 protocol 6 addrlen 28 host ::1 serv http
[all …]
H A Dbasics_v4.exp1 arg: flags 0x2 family 0 socktype 0 protocol 0 addrlen 0 host ::1 serv http
2 ai1: flags 0x2 family 24 socktype 2 protocol 17 addrlen 28 host ::1 serv http
3 ai2: flags 0x2 family 24 socktype 1 protocol 6 addrlen 28 host ::1 serv http
5 arg: flags 0x2 family 0 socktype 0 protocol 0 addrlen 0 host 127.0.0.1 serv http
6 ai1: flags 0x2 family 2 socktype 2 protocol 17 addrlen 16 host 127.0.0.1 serv http
7 ai2: flags 0x2 family 2 socktype 1 protocol 6 addrlen 16 host 127.0.0.1 serv http
9 arg: flags 0x2 family 0 socktype 0 protocol 0 addrlen 0 host localhost serv http
10 ai1: flags 0x2 family 2 socktype 2 protocol 17 addrlen 16 host 127.0.0.1 serv http
11 ai2: flags 0x2 family 2 socktype 1 protocol 6 addrlen 16 host 127.0.0.1 serv http
13 arg: flags 0x2 family 0 socktype 0 protocol 0 addrlen 0 host ::1 serv tftp
[all …]
H A Dno_host_v4v6.exp1 arg: flags 0x2 family 0 socktype 0 protocol 0 addrlen 0 host (empty) serv http
2 ai1: flags 0x2 family 24 socktype 2 protocol 17 addrlen 28 host ::1 serv http
3 ai2: flags 0x2 family 24 socktype 1 protocol 6 addrlen 28 host ::1 serv http
4 ai3: flags 0x2 family 2 socktype 2 protocol 17 addrlen 16 host 127.0.0.1 serv http
5 ai4: flags 0x2 family 2 socktype 1 protocol 6 addrlen 16 host 127.0.0.1 serv http
7 arg: flags 0x2 family 0 socktype 0 protocol 0 addrlen 0 host (empty) serv echo
8 ai1: flags 0x2 family 24 socktype 2 protocol 17 addrlen 28 host ::1 serv echo
9 ai2: flags 0x2 family 24 socktype 1 protocol 6 addrlen 28 host ::1 serv echo
10 ai3: flags 0x2 family 2 socktype 2 protocol 17 addrlen 16 host 127.0.0.1 serv echo
11 ai4: flags 0x2 family 2 socktype 1 protocol 6 addrlen 16 host 127.0.0.1 serv echo
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7ulp-pinfunc.h40 #define IMX7ULP_PAD_PTC4__FXIO1_D0 0x0010 0x0204 0x2 0x1
48 #define IMX7ULP_PAD_PTC5__FXIO1_D1 0x0014 0x0208 0x2 0x1
56 #define IMX7ULP_PAD_PTC6__FXIO1_D2 0x0018 0x020c 0x2 0x1
64 #define IMX7ULP_PAD_PTC7__FXIO1_D3 0x001c 0x0210 0x2 0x1
70 #define IMX7ULP_PAD_PTC8__FXIO1_D4 0x0020 0x0214 0x2 0x1
78 #define IMX7ULP_PAD_PTC9__FXIO1_D5 0x0024 0x0218 0x2 0x1
86 #define IMX7ULP_PAD_PTC10__FXIO1_D6 0x0028 0x021c 0x2 0x1
94 #define IMX7ULP_PAD_PTC11__FXIO1_D7 0x002c 0x0220 0x2 0x1
101 #define IMX7ULP_PAD_PTC12__FXIO1_D8 0x0030 0x0224 0x2 0x1
109 #define IMX7ULP_PAD_PTC13__FXIO1_D9 0x0034 0x0228 0x2 0x1
[all …]
H A Dimx6sll-pinfunc.h17 #define MX6SLL_PAD_WDOG_B__UART5_RI_B 0x0014 0x02DC 0x0000 0x2 0x0
21 #define MX6SLL_PAD_REF_CLK_24M__PWM3_OUT 0x0018 0x02E0 0x0000 0x2 0x0
28 #define MX6SLL_PAD_REF_CLK_32K__PWM4_OUT 0x001C 0x02E4 0x0000 0x2 0x0
35 #define MX6SLL_PAD_PWM1__AUDIO_CLK_OUT 0x0020 0x02E8 0x0000 0x2 0x0
41 #define MX6SLL_PAD_KEY_COL0__LCD_DATA00 0x0024 0x02EC 0x06D8 0x2 0x0
46 #define MX6SLL_PAD_KEY_ROW0__LCD_DATA01 0x0028 0x02F0 0x06DC 0x2 0x0
51 #define MX6SLL_PAD_KEY_COL1__LCD_DATA02 0x002C 0x02F4 0x06E0 0x2 0x0
56 #define MX6SLL_PAD_KEY_ROW1__LCD_DATA03 0x0030 0x02F8 0x06E4 0x2 0x0
62 #define MX6SLL_PAD_KEY_COL2__LCD_DATA04 0x0034 0x02FC 0x06E8 0x2 0x0
68 #define MX6SLL_PAD_KEY_ROW2__LCD_DATA05 0x0038 0x0300 0x06EC 0x2 0x0
[all …]
H A Dimx6sl-pinfunc.h15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
23 #define MX6SL_PAD_AUD_RXC__UART3_RX_DATA 0x050 0x2a8 0x80c 0x2 0x0
30 #define MX6SL_PAD_AUD_RXD__UART4_RX_DATA 0x054 0x2ac 0x814 0x2 0x0
31 #define MX6SL_PAD_AUD_RXD__UART4_TX_DATA 0x054 0x2ac 0x000 0x2 0x0
37 #define MX6SL_PAD_AUD_RXFS__UART3_RX_DATA 0x058 0x2b0 0x80c 0x2 0x1
38 #define MX6SL_PAD_AUD_RXFS__UART3_TX_DATA 0x058 0x2b0 0x000 0x2 0x0
45 #define MX6SL_PAD_AUD_TXC__UART4_TX_DATA 0x05c 0x2b4 0x000 0x2 0x0
46 #define MX6SL_PAD_AUD_TXC__UART4_RX_DATA 0x05c 0x2b4 0x814 0x2 0x1
52 #define MX6SL_PAD_AUD_TXD__UART4_CTS_B 0x060 0x2b8 0x000 0x2 0x0
[all …]
H A Dimx7d-pinfunc.h16 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_ANY 0x0000 0x0030 0x0000 0x2 0x0
21 #define MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3 0x0004 0x0034 0x0000 0x2 0x0
27 #define MX7D_PAD_LPSR_GPIO1_IO02__CCM_ENET_REF_CLK1 0x0008 0x0038 0x0564 0x2 0x3
34 #define MX7D_PAD_LPSR_GPIO1_IO03__CCM_ENET_REF_CLK2 0x000C 0x003C 0x0570 0x2 0x3
41 #define MX7D_PAD_LPSR_GPIO1_IO04__FLEXTIMER1_CH4 0x0010 0x0040 0x0594 0x2 0x1
44 #define MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x0010 0x0040 0x05D4 0x4 0x2
48 #define MX7D_PAD_LPSR_GPIO1_IO05__FLEXTIMER1_CH5 0x0014 0x0044 0x0598 0x2 0x1
51 #define MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x0014 0x0044 0x05D8 0x4 0x2
55 #define MX7D_PAD_LPSR_GPIO1_IO06__FLEXTIMER1_CH6 0x0018 0x0048 0x059C 0x2 0x1
58 #define MX7D_PAD_LPSR_GPIO1_IO06__I2C2_SCL 0x0018 0x0048 0x05DC 0x4 0x2
[all …]
H A Dimxrt1050-pinfunc.h19 #define MXRT1050_IOMUXC_GPIO_EMC_00_LPSPI2_SCK 0x014 0x204 0x500 0x2 0x1
26 #define MXRT1050_IOMUXC_GPIO_EMC_01_LPSPI2_PCS0 0x018 0x208 0x4FC 0x2 0x1
33 #define MXRT1050_IOMUXC_GPIO_EMC_02_LPSPI2_SDO 0x01C 0x20C 0x508 0x2 0x1
40 #define MXRT1050_IOMUXC_GPIO_EMC_03_LPSPI2_SDI 0x020 0x210 0x504 0x2 0x1
47 #define MXRT1050_IOMUXC_GPIO_EMC_04_SAI2_TX_DATA 0x024 0x214 0x000 0x2 0x0
54 #define MXRT1050_IOMUXC_GPIO_EMC_05_SAI2_TX_SYNC 0x028 0x218 0x5C4 0x2 0x0
61 #define MXRT1050_IOMUXC_GPIO_EMC_06_SAI2_TX_BCLK 0x02C 0x21C 0x5C0 0x2 0x0
68 #define MXRT1050_IOMUXC_GPIO_EMC_07_SAI2_MCLK 0x030 0x220 0x5B0 0x2 0x0
75 #define MXRT1050_IOMUXC_GPIO_EMC_08_SAI2_RX_DATA 0x034 0x224 0x5B8 0x2 0x0
82 #define MXRT1050_IOMUXC_GPIO_EMC_09_SAI2_RX_SYNC 0x038 0x228 0x5BC 0x2 0x0
[all …]
H A Dimx6dl-pinfunc.h15 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0
22 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0
76 #define MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x074 0x388 0x7d8 0x2 0x0
83 #define MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x078 0x38c 0x7e0 0x2 0x0
90 #define MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x07c 0x390 0x7dc 0x2 0x0
97 #define MX6QDL_PAD_CSI0_DAT7__ECSPI1_SS0 0x080 0x394 0x7e4 0x2 0x0
104 #define MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x084 0x398 0x7f4 0x2 0x0
111 #define MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x088 0x39c 0x7fc 0x2 0x0
137 #define MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x0a0 0x3b4 0x000 0x2 0x0
142 #define MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x0a4 0x3b8 0x000 0x2 0x0
[all …]
H A Dimx6q-pinfunc.h15 #define MX6QDL_PAD_SD2_DAT1__EIM_CS2_B 0x04c 0x360 0x000 0x2 0x0
21 #define MX6QDL_PAD_SD2_DAT2__EIM_CS3_B 0x050 0x364 0x000 0x2 0x0
33 #define MX6QDL_PAD_RGMII_TXC__SPDIF_EXT_CLK 0x058 0x36c 0x918 0x2 0x0
72 #define MX6QDL_PAD_EIM_A25__ECSPI2_RDY 0x088 0x39c 0x000 0x2 0x0
86 #define MX6QDL_PAD_EIM_D16__IPU1_DI0_PIN05 0x090 0x3a4 0x000 0x2 0x0
93 #define MX6QDL_PAD_EIM_D17__IPU1_DI0_PIN06 0x094 0x3a8 0x000 0x2 0x0
100 #define MX6QDL_PAD_EIM_D18__IPU1_DI0_PIN07 0x098 0x3ac 0x000 0x2 0x0
107 #define MX6QDL_PAD_EIM_D19__IPU1_DI0_PIN08 0x09c 0x3b0 0x000 0x2 0x0
115 #define MX6QDL_PAD_EIM_D20__IPU1_DI0_PIN16 0x0a0 0x3b4 0x000 0x2 0x0
123 #define MX6QDL_PAD_EIM_D21__IPU1_DI0_PIN17 0x0a4 0x3b8 0x000 0x2 0x0
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-serdes.h15 #define J721E_SERDES0_LANE0_USB3_0_SWAP 0x2
20 #define J721E_SERDES0_LANE1_USB3_0 0x2
25 #define J721E_SERDES1_LANE0_USB3_1_SWAP 0x2
30 #define J721E_SERDES1_LANE1_USB3_1 0x2
35 #define J721E_SERDES2_LANE0_USB3_1_SWAP 0x2
40 #define J721E_SERDES2_LANE1_USB3_1 0x2
45 #define J721E_SERDES3_LANE0_USB3_0_SWAP 0x2
50 #define J721E_SERDES3_LANE1_USB3_0 0x2
55 #define J721E_SERDES4_LANE0_QSGMII_LANE5 0x2
60 #define J721E_SERDES4_LANE1_QSGMII_LANE6 0x2
[all...]
/freebsd-src/sys/contrib/device-tree/include/dt-bindings/mux/
H A Dti-serdes.h21 #define J721E_SERDES0_LANE0_USB3_0_SWAP 0x2
26 #define J721E_SERDES0_LANE1_USB3_0 0x2
31 #define J721E_SERDES1_LANE0_USB3_1_SWAP 0x2
36 #define J721E_SERDES1_LANE1_USB3_1 0x2
41 #define J721E_SERDES2_LANE0_USB3_1_SWAP 0x2
46 #define J721E_SERDES2_LANE1_USB3_1 0x2
51 #define J721E_SERDES3_LANE0_USB3_0_SWAP 0x2
56 #define J721E_SERDES3_LANE1_USB3_0 0x2
61 #define J721E_SERDES4_LANE0_QSGMII_LANE5 0x2
66 #define J721E_SERDES4_LANE1_QSGMII_LANE6 0x2
[all …]
/freebsd-src/contrib/bearssl/src/symcipher/
H A Daes_x86ni_cbcdec.c66 __m128i x0, x1, x2, x3, e0, e1, e2, e3; in br_aes_x86ni_cbcdec_run() local
71 x2 = _mm_loadu_si128((void *)(buf + 32)); in br_aes_x86ni_cbcdec_run()
78 x2 = _mm_loadu_si128( in br_aes_x86ni_cbcdec_run()
80 x3 = x2; in br_aes_x86ni_cbcdec_run()
82 x2 = x0; in br_aes_x86ni_cbcdec_run()
87 x2 = x0; in br_aes_x86ni_cbcdec_run()
93 e2 = x2; in br_aes_x86ni_cbcdec_run()
97 x2 = _mm_xor_si128(x2, sk[0]); in br_aes_x86ni_cbcdec_run()
101 x2 = _mm_aesdec_si128(x2, sk[1]); in br_aes_x86ni_cbcdec_run()
105 x2 = _mm_aesdec_si128(x2, sk[2]); in br_aes_x86ni_cbcdec_run()
[all …]
H A Daes_x86ni_ctr.c69 __m128i x0, x1, x2, x3; in br_aes_x86ni_ctr_run() local
73 x2 = _mm_insert_epi32(ivx, br_bswap32(cc + 2), 3); in br_aes_x86ni_ctr_run()
77 x2 = _mm_xor_si128(x2, sk[0]); in br_aes_x86ni_ctr_run()
81 x2 = _mm_aesenc_si128(x2, sk[1]); in br_aes_x86ni_ctr_run()
85 x2 = _mm_aesenc_si128(x2, sk[2]); in br_aes_x86ni_ctr_run()
89 x2 = _mm_aesenc_si128(x2, sk[3]); in br_aes_x86ni_ctr_run()
93 x2 = _mm_aesenc_si128(x2, sk[4]); in br_aes_x86ni_ctr_run()
97 x2 = _mm_aesenc_si128(x2, sk[5]); in br_aes_x86ni_ctr_run()
101 x2 = _mm_aesenc_si128(x2, sk[6]); in br_aes_x86ni_ctr_run()
105 x2 = _mm_aesenc_si128(x2, sk[7]); in br_aes_x86ni_ctr_run()
[all …]
/freebsd-src/lib/msun/src/
H A Ds_tanhl.c111 long double hi,lo,s,x2,x4,z; in tanhl() local
135 x2 = x*x; in tanhl()
137 x4 = x2*x2; in tanhl()
138 RETURNI(((T19*x2 + T17)*x4 + (T15*x2 + T13))*(x2*x*x2*x4*x4) + in tanhl()
139 ((T11*x2 + T9)*x4 + (T7*x2 + T5))*(x2*x*x2) + in tanhl()
140 T3*(x2*x) + x); in tanhl()
142 dx2 = x2; in tanhl()
145 T25)*x2 + T23)*x2 + T21)*x2 + T19)*x2 + T17)*x2 + in tanhl()
146 T15)*x2 + T13)*x2 + T11)*x2 + T9)*x2 + T7)*x2 + T5)* in tanhl()
147 (x2*x*x2) + in tanhl()
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/freebsd-src/sys/contrib/libsodium/src/libsodium/crypto_scalarmult/curve25519/sandy2x/
H A Dcurve25519_sandy2x.c21 #define x2 var[1] macro
51 x_51.v[0] = (x2[1] << 26) + x2[0]; in crypto_scalarmult_curve25519_sandy2x()
52 x_51.v[1] = (x2[3] << 26) + x2[2]; in crypto_scalarmult_curve25519_sandy2x()
53 x_51.v[2] = (x2[5] << 26) + x2[4]; in crypto_scalarmult_curve25519_sandy2x()
54 x_51.v[3] = (x2[7] << 26) + x2[6]; in crypto_scalarmult_curve25519_sandy2x()
55 x_51.v[4] = (x2[9] << 26) + x2[8]; in crypto_scalarmult_curve25519_sandy2x()
64 #undef x2
67 #define x2 var[0] macro
95 x_51.v[0] = (x2[1] << 26) + x2[0]; in crypto_scalarmult_curve25519_sandy2x_base()
96 x_51.v[1] = (x2[3] << 26) + x2[2]; in crypto_scalarmult_curve25519_sandy2x_base()
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