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/llvm-project/llvm/test/tools/llvm-objdump/ELF/
H A Dprogram-headers.test7 # ELF32-NEXT: PHDR off 0x00000314 vaddr 0x00001000 paddr 0x00001000 align 2**0
9 # ELF32-NEXT: PHDR off 0x00000317 vaddr 0x00002000 paddr 0x00002000 align 2**0
11 # ELF32-NEXT: UNKNOWN off 0x00000317 vaddr 0x00002000 paddr 0x00002000 align 2**0
13 # ELF32-NEXT: DYNAMIC off 0x00000324 vaddr 0x00006000 paddr 0x00006000 align 2**0
15 # ELF32-NEXT: INTERP off 0x0000031e vaddr 0x00003000 paddr 0x00003000 align 2**0
17 # ELF32-NEXT: NOTE off 0x00000314 vaddr 0x00001000 paddr 0x00001000 align 2**0
19 # ELF32-NEXT: UNKNOWN off 0x00000314 vaddr 0x00001000 paddr 0x00001000 align 2**0
21 # ELF32-NEXT: TLS off 0x00000322 vaddr 0x00004000 paddr 0x00004000 align 2**0
23 # ELF32-NEXT: UNKNOWN off 0x00000314 vaddr 0x00001000 paddr 0x00001000 align 2**0
25 # ELF32-NEXT:EH_FRAME off 0x00000314 vaddr 0x00001000 paddr 0x00001000 align 2**0
[all …]
/llvm-project/llvm/test/tools/llvm-objcopy/ELF/
H A Dpreserve-segment-contents.test315 VAddr: 0x2000
321 VAddr: 0x2100
327 VAddr: 0x2200
333 VAddr: 0x2300
339 VAddr: 0x2308
344 VAddr: 0x3000
350 VAddr: 0x3002
354 VAddr: 0x3004
359 VAddr: 0x3008
364 VAddr: 0x300C
[all …]
H A Dnon-load-at-load-start.test40 VAddr: 0x200040
49 VAddr: 0x202000
52 VAddr: 0x200000
60 VAddr: 0x201000
66 VAddr: 0x202000
74 VAddr: 0x203000
80 VAddr: 0x203000
86 VAddr: 0x203000
/llvm-project/lld/test/ELF/linkerscript/
H A Doverlapping-sections.s38 # RUN: }" > %t-vaddr.script
39 # RUN: not ld.lld -o /dev/null --script %t-vaddr.script %t.o -shared 2>&1 | FileCheck %s -check-pre…
40 # VADDR-OVERLAP-ERR: error: section .sec1 virtual address range overlaps with .sec2
41 # VADDR-OVERLAP-ERR-NEXT: >>> .sec1 range is [0x8000, 0x80FF]
42 # VADDR-OVERLAP-ERR-NEXT: >>> .sec2 range is [0x8020, 0x811F]
45 # RUN: ld.lld -o %t.so --script %t-vaddr.script %t.o -shared --no-rosegment --noinhibit-exec
46 # RUN: llvm-readelf --sections -l %t.so | FileCheck %s -check-prefix BAD-VADDR
47 # BAD-VADDR-LABEL: Section Headers:
48 # BAD-VADDR: .sec1 PROGBITS 0000000000008000 002000 000100 00 WA 0 0 1
49 # BAD-VADDR: .sec2 PROGBITS 0000000000008020 003020 000100 00 WA 0 0 1
[all …]
/llvm-project/llvm/docs/AMDGPU/
H A DAMDGPUAsmGFX7.rst41 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx7_vdst_89680f>`, :ref:`vaddr<amdgp…
42 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx7_vdst_bdb32f>`, :ref:`vaddr<amdgp…
43 …ds_add_src2_u32 :ref:`vaddr<amdgpu_synid_gfx7_vaddr_f20ee4>` …
44 …ds_add_src2_u64 :ref:`vaddr<amdgpu_synid_gfx7_vaddr_f20ee4>` …
45 …ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx7_vaddr_f20ee4>`, :ref:`…
46 …ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx7_vaddr_f20ee4>`, :ref:`…
47 …ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx7_vaddr_f20ee4>`, :ref:`…
48 …ds_and_b64 :ref:`vaddr<amdgpu_synid_gfx7_vaddr_f20ee4>`, :ref:`…
49 …ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx7_vdst_89680f>`, :ref:`vaddr<amdgp…
50 …ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx7_vdst_bdb32f>`, :ref:`vaddr<amdgp…
[all …]
H A DAMDGPUAsmGFX1030.rst259 …ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_f20ee4>`, :re…
260 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vaddr<am…
261 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vaddr<am…
262 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx1030_vdst_bdb32f>`, :ref:`vaddr<am…
263 …ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_f20ee4>`, :re…
264 …ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_f20ee4>`, :re…
265 …ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_f20ee4>`, :re…
266 …ds_and_b64 :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_f20ee4>`, :re…
267 …ds_and_rtn_b32 :ref:`vdst<amdgpu_synid_gfx1030_vdst_89680f>`, :ref:`vaddr<am…
268 …ds_and_rtn_b64 :ref:`vdst<amdgpu_synid_gfx1030_vdst_bdb32f>`, :ref:`vaddr<am…
[all …]
H A DAMDGPUAsmGFX9.rst41 …ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`, :ref:`…
42 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vaddr<amdgp…
43 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx9_vdst_89680f>`, :ref:`vaddr<amdgp…
44 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx9_vdst_bdb32f>`, :ref:`vaddr<amdgp…
45 …ds_add_src2_f32 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>` …
46 …ds_add_src2_u32 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>` …
47 …ds_add_src2_u64 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>` …
48 …ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`, :ref:`…
49 …ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`, :ref:`…
50 …ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>`, :ref:`…
[all …]
H A DAMDGPUAsmGFX10.rst255 …ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_f20ee4>`, :ref:…
256 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vaddr<amdg…
257 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx10_vdst_89680f>`, :ref:`vaddr<amdg…
258 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx10_vdst_bdb32f>`, :ref:`vaddr<amdg…
259 …ds_add_src2_f32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_f20ee4>` …
260 …ds_add_src2_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_f20ee4>` …
261 …ds_add_src2_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_f20ee4>` …
262 …ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_f20ee4>`, :ref:…
263 …ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_f20ee4>`, :ref:…
264 …ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_f20ee4>`, :ref:…
[all …]
H A DAMDGPUAsmGFX8.rst41 …ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`…
42 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgp…
43 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx8_vdst_89680f>`, :ref:`vaddr<amdgp…
44 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx8_vdst_bdb32f>`, :ref:`vaddr<amdgp…
45 …ds_add_src2_f32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` …
46 …ds_add_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` …
47 …ds_add_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` …
48 …ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`…
49 …ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`…
50 …ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>`, :ref:`…
[all …]
H A DAMDGPUAsmGFX90a.rst41 …ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref…
42 …ds_add_f64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref…
43 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amd…
44 …ds_add_rtn_f64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amd…
45 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx90a_vdst_fa7dbd>`, :ref:`vaddr<amd…
46 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx90a_vdst_0f48d1>`, :ref:`vaddr<amd…
47 …ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref…
48 …ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref…
49 …ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref…
50 …ds_and_b64 :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_f20ee4>`, :ref…
[all …]
H A DAMDGPUAsmGFX11.rst43 …ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx11_vaddr_f20ee4…
45 … :ref:`vdst<amdgpu_synid_gfx11_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx11…
46 … :ref:`vdst<amdgpu_synid_gfx11_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx11…
47 … :ref:`vdst<amdgpu_synid_gfx11_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx11…
48 …ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx11_vaddr_f20ee4…
49 …ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx11_vaddr_f20ee4…
50 …ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx11_vaddr_f20ee4…
51 …ds_and_b64 :ref:`vaddr<amdgpu_synid_gfx11_vaddr_f20ee4…
52 … :ref:`vdst<amdgpu_synid_gfx11_vdst_89680f>`, :ref:`vaddr<amdgpu_synid_gfx11…
53 … :ref:`vdst<amdgpu_synid_gfx11_vdst_bdb32f>`, :ref:`vaddr<amdgpu_synid_gfx11…
[all …]
H A DAMDGPUAsmGFX940.rst41 …ds_add_f32 :ref:`vaddr<amdgpu_synid_gfx940_vaddr_f20ee4>`, :ref…
42 …ds_add_f64 :ref:`vaddr<amdgpu_synid_gfx940_vaddr_f20ee4>`, :ref…
43 …ds_add_rtn_f32 :ref:`vdst<amdgpu_synid_gfx940_vdst_fa7dbd>`, :ref:`vaddr<amd…
44 …ds_add_rtn_f64 :ref:`vdst<amdgpu_synid_gfx940_vdst_0f48d1>`, :ref:`vaddr<amd…
45 …ds_add_rtn_u32 :ref:`vdst<amdgpu_synid_gfx940_vdst_fa7dbd>`, :ref:`vaddr<amd…
46 …ds_add_rtn_u64 :ref:`vdst<amdgpu_synid_gfx940_vdst_0f48d1>`, :ref:`vaddr<amd…
47 …ds_add_u32 :ref:`vaddr<amdgpu_synid_gfx940_vaddr_f20ee4>`, :ref…
48 …ds_add_u64 :ref:`vaddr<amdgpu_synid_gfx940_vaddr_f20ee4>`, :ref…
49 …ds_and_b32 :ref:`vaddr<amdgpu_synid_gfx940_vaddr_f20ee4>`, :ref…
50 …ds_and_b64 :ref:`vaddr<amdgpu_synid_gfx940_vaddr_f20ee4>`, :ref…
[all …]
H A Dgfx940_vaddr_0212e3.rst10 vaddr title
15 * Address = :ref:`vaddr<amdgpu_synid_gfx940_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_flat_offs…
16 …40_saddr_a37373>` + :ref:`vaddr<amdgpu_synid_gfx940_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_…
H A Dgfx908_vaddr_0212e3.rst10 vaddr title
15 * Address = :ref:`vaddr<amdgpu_synid_gfx908_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_flat_offs…
16 …id_gfx908_saddr>` + :ref:`vaddr<amdgpu_synid_gfx908_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_…
H A Dgfx10_vaddr_9aeece.rst10 vaddr title
15 * Address = :ref:`vaddr<amdgpu_synid_gfx10_vaddr_9aeece>` + :ref:`offset12s<amdgpu_synid_flat_offse…
16 …10_saddr_beaa25>` + :ref:`vaddr<amdgpu_synid_gfx10_vaddr_9aeece>` + :ref:`offset12s<amdgpu_synid_f…
H A Dgfx90a_vaddr_0212e3.rst10 vaddr title
15 * Address = :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_flat_offs…
16 …0a_saddr_a37373>` + :ref:`vaddr<amdgpu_synid_gfx90a_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_…
H A Dgfx1030_vaddr_9aeece.rst10 vaddr title
15 * Address = :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_9aeece>` + :ref:`offset12s<amdgpu_synid_flat_off…
16 …0_saddr_beaa25>` + :ref:`vaddr<amdgpu_synid_gfx1030_vaddr_9aeece>` + :ref:`offset12s<amdgpu_synid_…
H A Dgfx11_vaddr_0212e3.rst10 vaddr title
15 * Address = :ref:`vaddr<amdgpu_synid_gfx11_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_flat_offse…
16 …11_saddr_beaa25>` + :ref:`vaddr<amdgpu_synid_gfx11_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_f…
H A Dgfx9_vaddr_0212e3.rst10 vaddr title
15 * Address = :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_flat_offset…
16 …fx9_saddr_a37373>` + :ref:`vaddr<amdgpu_synid_gfx9_vaddr_0212e3>` + :ref:`offset13s<amdgpu_synid_f…
/llvm-project/llvm/test/Analysis/CostModel/ARM/
H A Dinsertelement.ll12 ptr %vaddr) {
13 %v0 = load %T_i8v, ptr %vaddr
17 store %T_i8v %v2, ptr %vaddr
26 ptr %vaddr) {
27 %v0 = load %T_i16v, ptr %vaddr
31 store %T_i16v %v2, ptr %vaddr
39 ptr %vaddr) {
40 %v0 = load %T_i32v, ptr %vaddr
44 store %T_i32v %v2, ptr %vaddr
/llvm-project/llvm/test/tools/obj2yaml/ELF/
H A Dprogram-headers.yaml50 # YAML-NEXT: VAddr: 0x1000
57 # YAML-NEXT: VAddr: 0x2000
64 # YAML-NEXT: VAddr: 0x3EF0
71 # YAML-NEXT: VAddr: 0x3EF0
78 # YAML-NEXT: VAddr: 0x3EF0
82 # YAML-NEXT: VAddr: 0x4000
88 # YAML-NEXT: VAddr: 0x1A0
94 # YAML-NEXT: VAddr: 0x1A0
118 VAddr: 0x1000
125 VAddr: 0x2000
[all …]
/llvm-project/llvm/test/tools/llvm-objdump/
H A Dopenbsd-headers.test6 # CHECK: OPENBSD_MUTABLE off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x0000000000…
8 # CHECK-NEXT: OPENBSD_RANDOMIZE off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x00000000…
10 # CHECK-NEXT: OPENBSD_WXNEEDED off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x000000000…
12 # CHECK-NEXT: OPENBSD_NOBTCFI off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x0000000000…
14 # CHECK-NEXT: OPENBSD_SYSCALLS off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x000000000…
16 # CHECK-NEXT: OPENBSD_BOOTDATA off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x000000000…
/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dds-negative-offset-addressing-mode-loop.ll11 ; CHECK: v_add_i32_e32 [[VADDR:v[0-9]+]],
12 ; SI-DAG: ds_read_b32 v{{[0-9]+}}, [[VADDR]]
13 ; SI-DAG: v_add_i32_e32 [[VADDR8:v[0-9]+]], vcc, 8, [[VADDR]]
15 ; SI-DAG: v_add_i32_e32 [[VADDR0x80:v[0-9]+]], vcc, 0x80, [[VADDR]]
17 ; SI-DAG: v_add_i32_e32 [[VADDR0x88:v[0-9]+]], vcc, 0x88, [[VADDR]]
19 ; SI-DAG: v_add_i32_e32 [[VADDR0x100:v[0-9]+]], vcc, 0x100, [[VADDR]]
22 ; CI-DAG: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, [[VADDR]] offset1:2
23 ; CI-DAG: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, [[VADDR]] offset0:32 offset1:34
24 ; CI-DAG: ds_read_b32 v{{[0-9]+}}, [[VADDR]] offset:256
/llvm-project/lldb/test/API/functionalities/stats_api/
H A Dmain.yaml11 VAddr: 0x400040
17 VAddr: 0x400318
22 VAddr: 0x400000
28 VAddr: 0x401000
34 VAddr: 0x402000
40 VAddr: 0x403DF8
46 VAddr: 0x403E08
52 VAddr: 0x400338
58 VAddr: 0x400358
64 VAddr: 0x400338
[all …]
/llvm-project/bolt/test/AArch64/Inputs/
H A Dgot-ld64-relaxation.yaml11 VAddr: 0x200040
17 VAddr: 0x2002A8
22 VAddr: 0x200000
28 VAddr: 0x210648
34 VAddr: 0x322580
40 VAddr: 0x332720
46 VAddr: 0x322590

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