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/freebsd-src/sys/dev/ichwd/
H A Dichwd.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 * Intel ICH Watchdog Timer (WDT) driver
40 * presence of the watchdog timer from the fact that the machine has an
45 * There is one slight problem on non-ACPI or ACPI 1.x systems: we have no
52 * For details about the ICH WDT, see Intel Application Note AP-725
53 * (document no. 292273-001). The WDT is also described in the individual
55 * (document no. 252516-001) sections 9.10 and 9.11.
58 * SoC PMC support by Denir Li <denir.li@cas-well.com>
70 #include <sys/watchdog.h>
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/freebsd-src/sys/contrib/device-tree/Bindings/timer/
H A Darm,twd.txt1 * ARM Timer Watchdog
3 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core
4 Timer-Watchdog (aka TWD), which provides both a per-cpu local timer
5 and watchdog.
7 The TWD is usually attached to a GIC to deliver its two per-processor
10 ** Timer node required properties:
12 - compatible : Should be one of:
13 "arm,cortex-a9-twd-timer"
14 "arm,cortex-a5-twd-timer"
15 "arm,arm11mp-twd-timer"
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H A Dingenic,tcu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ingenic,tcu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs Timer/Counter Unit (TCU)
11 Documentation/arch/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4760-tcu
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H A Dnvidia,tegra-timer.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra timer
10 - Stephen Warren <swarren@nvidia.com>
13 - if:
17 const: nvidia,tegra210-timer
25 A list of 14 interrupts; one per each timer channels 0 through 13
27 - if:
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H A Darm,twd-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,twd-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Timer-Watchdog Timer
10 - Rob Herring <robh@kernel.org>
13 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core
14 Timer-Watchdog (aka TWD), which provides both a per-cpu local timer
15 and watchdog.
17 The TWD is usually attached to a GIC to deliver its two per-processor
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/watchdog/
H A Dqcom-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/qco
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H A Dsnps,dw-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml#
5 $schema: http://devicetree.org/meta-schema
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H A Dmarvell,cn10624-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/marvell,cn10624-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell Global Timer (GTI) system watchdog
10 - Bharat Bhushan <bbhushan2@marvell.com>
13 - $ref: watchdog.yaml#
18 - enum:
19 - marvell,cn9670-wdt
20 - marvell,cn10624-wdt
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H A Ddigicolor-wdt.txt1 Conexant Digicolor SoCs Watchdog timer
3 The watchdog functionality in Conexant Digicolor SoCs relies on the so called
5 timer counters. The first timer (called "Timer A") is the only one that can be
6 used as watchdog.
10 - compatible : Should be "cnxt,cx92755-wdt"
11 - reg : Specifies base physical address and size of the registers
12 - clocks : phandle; specifies the clock that drives the timer
16 - timeout-sec : Contains the watchdog timeout in seconds
20 watchdog@f0000fc0 {
21 compatible = "cnxt,cx92755-wdt";
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H A Dcnxt,cx92755-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/watchdog/cnxt,cx92755-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Conexant Digicolor SoCs Watchdog timer
10 The watchdog functionality in Conexant Digicolor SoCs relies on the so called
12 timer counters. The first timer (called "Timer A") is the only one that can be
13 used as watchdog.
16 - Baruch Siach <baruch@tkos.co.il>
19 - $ref: watchdog.yaml#
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H A Dnuvoton,npcm-wdt.txt1 Nuvoton NPCM Watchdog
3 Nuvoton NPCM timer module provides five 24-bit timer counters, and a watchdog.
4 The watchdog supports a pre-timeout interrupt that fires 10ms before the
8 - compatible : "nuvoton,npcm750-wdt" for NPCM750 (Poleg), or
9 "nuvoton,wpcm450-wdt" for WPCM450 (Hermon), or
10 "nuvoton,npcm845-wdt" for NPCM845 (Arbel).
11 - reg : Offset and length of the register set for the device.
12 - interrupts : Contain the timer interrupt with flags for
16 - clocks : phandle of timer reference clock.
17 - clock-frequency : The frequency in Hz of the clock that drives the NPCM7xx
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H A Dxlnx,versal-wwdt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/xlnx,versal-wwdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx Versal window watchdog timer controller
10 - Neeli Srinivas <srinivas.neeli@amd.com>
13 Versal watchdog intellectual property uses window watchdog mode.
14 Window watchdog timer(WWDT) contains closed(first) and open(second)
15 window with 32 bit width. Write to the watchdog timer within
22 - $ref: watchdog.yaml#
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H A Dti,rti-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/ti,rti-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments K3 SoC Watchdog Timer
10 - Tero Kristo <t-kristo@ti.com>
13 The TI K3 SoC watchdog timer is implemented via the RTI (Real Time
14 Interrupt) IP module. This timer adds a support for windowed watchdog
15 mode, which will signal an error if it is pinged outside the watchdog
21 - $ref: watchdog.yaml#
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H A Ddw_wdt.txt1 Synopsys Designware Watchdog Timer
5 - compatible : Should contain "snps,dw-wdt"
6 - reg : Base address and size of the watchdog timer registers.
7 - clocks : phandle + clock-specifier for the clock that drives the
8 watchdog timer.
12 - interrupts : The interrupt used for the watchdog timeout warning.
13 - resets : phandle pointing to the system reset controller with
14 line index for the watchdog.
19 compatible = "snps,dw-wdt";
H A Darm,twd-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/arm,twd-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Timer-Watchdog Watchdog
10 - Rob Herring <robh@kernel.org>
13 ARM 11MP, Cortex-A5 and Cortex-A9 are often associated with a per-core
14 Timer-Watchdog (aka TWD), which provides both a per-cpu local timer
15 and watchdog.
17 The TWD is usually attached to a GIC to deliver its two per-processor
[all …]
H A Dsbsa-gwdt.txt1 * SBSA (Server Base System Architecture) Generic Watchdog
3 The SBSA Generic Watchdog Timer is used to force a reset of the system
5 watchdog timer can be found in the ARM document: ARM-DEN-0029 - Server
9 - compatible: Should at least contain "arm,sbsa-gwdt".
11 - reg: Each entry specifies the base physical address of a register frame
14 1: Watchdog control frame;
17 - interrupts: Should contain the Watchdog Signal 0 (WS0) SPI (Shared
18 Peripheral Interrupt) number of SBSA Generic Watchdog.
21 - timeout-sec: Watchdog timeout values (in seconds).
25 watchdog@2a440000 {
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/freebsd-src/sys/contrib/device-tree/Bindings/mfd/
H A Dbrcm,twd.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom's Timer-Watchdog (aka TWD)
10 - Rafał Miłecki <rafal@milecki.pl>
13 Broadcom has a Timer-Watchdog block used in multiple SoCs (e.g., BCM4908,
15 registers layout). This block consists of: timers, watchdog and optionally a
21 - enum:
22 - brcm,bcm4908-twd
23 - brcm,bcm7038-twd
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/freebsd-src/share/man/man4/man4.arm/
H A Dimx_wdog.431 .Nd device driver for the NXP i.MX5 and i.MX6 watchdog timer
36 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
50 .Xr watchdog 4
51 support for the watchdog timer present on NXP i.MX5 and i.MX6 processors.
52 The i.MX watchdog hardware supports programmable timeouts ranging from
53 0.5 to 128 seconds, in half-second increments.
54 Once activated, the watchdog hardware cannot be deactivated, but the
55 timeout period can be changed to any valid non-zero value.
57 At power-on, a special 16-second
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/freebsd-src/sys/dev/viawd/
H A Dviawd.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
38 #include <sys/watchdog.h>
45 #define viawd_read_4(sc, off) bus_read_4((sc)->wd_res, (off))
47 bus_write_4((sc)->wd_res, (off), (val))
50 { DEVICEID_VT8251, "VIA VT8251 watchdog timer" },
51 { DEVICEID_CX700, "VIA CX700 watchdog timer" },
52 { DEVICEID_VX800, "VIA VX800 watchdog timer" },
53 { DEVICEID_VX855, "VIA VX855 watchdog timer" },
54 { DEVICEID_VX900, "VIA VX900 watchdog timer" },
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/freebsd-src/share/man/man4/
H A Dwbwd.41 .\"-
31 .Nd device driver for Winbond/Nuvoton Super I/O chips watchdog timer
35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
50 .Xr watchdog 4
51 support for the watchdog interrupt timer present on at least the following
53 .Bl -bullet -compact
77 Winbond 83627DHG-P
79 Winbond 83667HG-B
99 .Bl -tag -width "xxxxxx"
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H A Dviawd.41 .\"-
31 .Nd device driver for VIA south bridge watchdog timer
36 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
50 .Xr watchdog 4
51 support for the watchdog interrupt timer present on
54 The VIA south bridge have a built-in watchdog timer,
60 driver when unloaded with running watchdog will reschedule the watchdog
63 .Xr watchdog 4 ,
64 .Xr watchdog 8 ,
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H A Dwdatwd.41 .\"-
30 .Nd device driver for the ACPI WDAT based watchdog interrupt timer
35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
49 .Xr watchdog 4
50 support for the watchdog interrupt timer in ACPI WDAT (Watchdog Action Table).
56 The following read-only
59 .Bl -tag -width indent
61 The status of the watchdog timer. 0 if not running, or 1 if running.
63 The current value of the watchdog timeout in millisecond.
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H A Dichwd.41 .\"-
2 .\" Copyright (c) 2007 Dag-Erling Smørgrav
31 .Nd device driver for the Intel ICH watchdog interrupt timer
36 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
50 .Xr watchdog 4
51 support for the watchdog interrupt timer present on
56 Supported watchdog intervals range from 2 to 63 ticks.
58 Note that on some ICH-based systems, the WDT may be present but
65 .Xr watchdog 4 ,
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/freebsd-src/sys/dev/amdsbwd/
H A Damdsbwd.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * This is a driver for watchdog timer present in AMD SB600/SB7xx/SB8xx
34 * - AMD SB600 Register Reference Guide, Public Version, Rev. 3.03 (SB600 RRG)
35 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/46155_sb600_rrg_pub_3.03.pdf
36 * - AM
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/freebsd-src/libexec/rc/rc.d/
H A Dwatchdogd36 desc="Watchdog daemon"
43 watchdog_command="/usr/sbin/watchdog"
47 if [ -n "${watchdogd_timeout}" ] ; then
48 rc_flags="${rc_flags} -t ${watchdogd_timeout}"
50 if [ -n "$watchdogd_shutdown_timeout" ] ; then
51 rc_flags="${rc_flags} -x ${watchdogd_shutdown_timeout}"
58 sig_stop="${watchdogd_sig_stop:-TERM}"
63 if [ ${watchdogd_shutdown_timeout:-0} -gt 0 ] ; then
66 info "watchdog timer is set to" \
71 info "watchdog timer is disabled before going to" \
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