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/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dmediatek-dwmac.txt26 It should be defined for RMII interface when the reference clock is from MT2712 SoC.
29 It should be defined for RMII interface.
32 Both delay properties need to be a multiple of 550 for MII/RMII interface,
35 - mediatek,rmii-rxc: boolean property, if present indicates that the RMII
39 - mediatek,rmii-clk-from-mac: boolean property, if present indicates that
40 MT2712 SoC provides the RMII reference clock, which outputs to TXC pin only.
44 which is from external PHYs in RMII case, and it rarely happen.
45 3. the reference clock, which outputs to TXC pin will be inversed in RMII case
49 2. reference clock will be inversed when arrived at MAC in RMII case, when
51 3. the inside clock, which be sent to MAC, will be inversed in RMII case when
[all …]
H A Dmediatek-dwmac.yaml54 - description: RMII reference clock provided by MAC
81 For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550,
83 For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290,
91 For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550,
93 For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple
96 mediatek,rmii-rxc:
99 If present, indicates that the RMII reference clock, which is from external
102 mediatek,rmii-clk-from-mac:
105 If present, indicates that MAC provides the RMII reference clock, which
114 which is from external PHYs in RMII case, and it rarely happen.
[all …]
H A Dmicrel.txt23 - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select
26 Setting the RMII Reference Clock Select bit enables 25 MHz rather
31 Specifically, a clock reference ("rmii-ref" below) is always needed to
37 - KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference
H A Dnxp,tja11xx.yaml49 nxp,rmii-refclk-in:
53 in RMII mode. This clock signal is provided by the PHY and is
60 interface reference clock input when RMII mode enabled.
62 reference clock output when RMII mode enabled.
94 nxp,rmii-refclk-in;
H A Dftgmac100.txt20 absent, "rgmii" is assumed. Supported values are "rgmii*" and "rmii" for
23 rmii (100bT) but kept as a separate property in case NC-SI grows support
29 IP clock, and optionally an RMII RCLK gate for the AST2500/AST2600. The
34 - "RCLK": Clock gate for the RMII RCLK
H A Dactions,owl-emac.yaml14 It provides the RMII and SMII interfaces and is compliant with the
44 - const: rmii
81 clock-names = "eth", "rmii";
83 phy-mode = "rmii";
H A Dcpsw-phy-sel.txt13 -rmii-clock-ext : If present, the driver will configure the RMII
29 rmii-clock-ext;
H A Dfaraday,ftgmac100.yaml36 - description: RMII RCLK gate for AST2500/2600
47 - rmii
54 rmii (100bT) but kept as a separate property in case NC-SI grows support
H A Dmediatek,star-emac.yaml51 mediatek,rmii-rxc:
54 If present, indicates that the RMII reference clock, which is from external
97 phy-mode = "rmii";
H A Drockchip-dwmac.txt24 <&cru SCLK_MACREF>: clock gate for RMII referce clock
25 <&cru SCLK_MACREF_OUT> clock gate for RMII reference clock output
33 is not sourced from SoC's PLL, but input from PHY; For RMII, "input" means
H A Dlpc-eth.txt10 absent, "rmii" is assumed.
26 phy-mode = "rmii";
H A Ddavinci_emac.txt23 - ti,davinci-rmii-en: 1 byte, 1 means use RMII
H A Dadi,adin.yaml35 When operating in RMII mode, this option configures the FIFO depth.
77 phy-mode = "rmii";
H A Dloongson,ls1c-emac.yaml22 - RMII interface
66 - rmii
/freebsd-src/sys/contrib/device-tree/Bindings/net/dsa/
H A Dmicrochip,ksz.yaml70 MII / RMII (except TX_CLK/REFCLKI, COL and CRS) and CLKO_25_125 lines.
105 microchip,rmii-clk-internal:
109 can select between internal and external RMII reference
111 the RMII of ksz88x3 is provided by the ksz88x3 internally
115 If microchip,rmii-clk-internal is set, ksz88x3 will provide
116 rmii reference clock internally, otherwise reference clock
119 microchip,rmii-clk-internal: [ethernet]
H A Dlan9303.txt31 fixed-link { /* RMII fixed link to LAN9303 */
47 port@0 { /* RMII fixed link to master */
/freebsd-src/sys/contrib/device-tree/src/powerpc/
H A Dkmeter1.dts346 /* Piggy2 (UCC4, MDIO 0x00, RMII) */
358 phy-connection-type = "rmii";
362 /* Eth-1 (UCC5, MDIO 0x08, RMII) */
374 phy-connection-type = "rmii";
378 /* Eth-2 (UCC6, MDIO 0x09, RMII) */
390 phy-connection-type = "rmii";
394 /* Eth-3 (UCC7, MDIO 0x0a, RMII) */
406 phy-connection-type = "rmii";
410 /* Eth-4 (UCC8, MDIO 0x0b, RMII) */
422 phy-connection-type = "rmii";
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/clock/
H A Dstarfive,jh7110-aoncrg.yaml23 - description: GMAC0 RMII reference or GMAC0 RGMII RX
30 - description: GMAC0 RMII reference or GMAC0 RGMII RX
38 - description: GMAC0 RMII reference
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul-kontron-sl-common.dtsi37 phy-mode = "rmii";
49 clock-names = "rmii-ref";
55 phy-mode = "rmii";
H A Dimx53-kp-hsc.dts18 fixed-link { /* RMII fixed link to LAN9303 */
35 port@0 { /* RMII fixed link to master */
/freebsd-src/sys/contrib/device-tree/src/arm/microchip/
H A Dat91sam9x25ek.dts22 phy-mode = "rmii";
27 phy-mode = "rmii";
/freebsd-src/sys/contrib/device-tree/Bindings/phy/
H A Dti-phy-gmii-sel.txt5 two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces.
21 | | | RMII <------->
47 cell 2 - RMII refclk mode
H A Dti,phy-gmii-sel.yaml15 two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces.
31 | | | RMII <------->
154 - RMII refclk mode
/freebsd-src/sys/contrib/device-tree/Bindings/c6x/
H A Ddscr.txt40 - ti,dscr-rmii-resets
41 offset and bitmask of RMII reset field. May have multiple tuples if more
109 ti,dscr-rmii-resets = <0x40020 0x00040000>;
/freebsd-src/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp151a-prtt1c.dts282 phy-mode = "rmii";
289 phy-mode = "rmii";
296 phy-mode = "rmii";
311 phy-mode = "rmii";

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