Searched full:pdmclk (Results 1 – 7 of 7) sorted by relevance
10 - clocks: phandle for the pdmclk provider, likely <&twl6040>11 - clock-names: Must be "pdmclk"24 In board DTS file the pdmclk needs to be added:28 clock-names = "pdmclk";
67 Defines the PDMCLK sampling edge configuration for the PDM inputs. This75 PDMIN1 - PDMCLK latching edge used for channel 1 and 2 data76 PDMIN2 - PDMCLK latching edge used for channel 3 and 4 data77 PDMIN3 - PDMCLK latching edge used for channel 5 and 6 data78 PDMIN4 - PDMCLK latching edge used for channel 7 and 8 data124 4 - GPIO1 is configured as a PDM clock output (PDMCLK)175 4 - GPOX is configured as a PDM clock output (PDMCLK)
5 * Only include this file if your board has pdmclk wired from the43 clock-names = "pdmclk";
271 /* Must be only enabled for boards with pdmclk wired */
308 /* Must be only enabled for boards with pdmclk wired */
669 clock-names = "pdmclk";
14 - #clock-cells = <0>; twl6040 is a provider of pdmclk which is used by McPDM