| /freebsd-src/lib/libpmc/pmu-events/arch/x86/cascadelakex/ |
| H A D | uncore-other.json | 10 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.…
20 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) ",
164 "ScaleUnit": "7.11E-06Bytes",
174 "ScaleUnit": "7.11E-06Bytes",
355 "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Not Needed",
360 …"PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory st…
365 "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Needed",
370 …"PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory s…
375 …"BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory writ…
380 …"PublicDescription": "Counts only multi-socket cacheline Directory state updates memory writes iss…
[all …]
|
| /freebsd-src/lib/libpmc/pmu-events/arch/x86/skylakex/ |
| H A D | uncore-other.json | 10 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.…
20 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) ",
164 "ScaleUnit": "7.11E-06Bytes",
174 "ScaleUnit": "7.11E-06Bytes",
355 "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Not Needed",
360 …"PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory st…
365 "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Needed",
370 …"PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory s…
375 …"BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory writ…
380 …"PublicDescription": "Counts only multi-socket cacheline Directory state updates memory writes iss…
[all …]
|
| /freebsd-src/sys/dev/mpr/ |
| H A D | mpr_mapping.h | 1 /*-
2 * Copyright (c) 2011-2015 LSI Corp.
3 * Copyright (c) 2013-2016 Avago Technologies
4 * Copyright 2000-2020 Broadcom Inc.
28 * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD
35 * struct _map_phy_change - PHY entries received in Topology change list
36 * @physical_id: SAS address of the device attached with the associate PHY
55 * struct _map_port_change - PCIe Port entries received in PCIe Topology change
57 * @physical_id: WWID of the device attached to the associated port
76 * struct _map_topology_change - SAS/SATA entries to be removed from mapping
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/pci/ |
| H A D | baikal,bt1-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/baikal,bt1-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Baikal-T1 PCIe Root Port Controller
10 - Serge Semin <fancer.lancer@gmail.com>
13 Embedded into Baikal-T1 SoC Root Complex controller with a single port
14 activated. It's based on the DWC RC PCIe v4.60a IP-core, which is configured
18 performed by software. There four in- and four outbound iATU regions
19 which can be used to emit all required TLP types on the PCIe bus.
[all …]
|
| H A D | snps,dw-pcie-ep.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...] |
| H A D | snps,dw-pcie.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare PCIe interfac
[all...] |
| H A D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DWC PCIe RP/EP controller
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
14 Generic Synopsys DesignWare PCIe Root Port and Endpoint controller
22 DWC PCIe CSR space is normally accessed over the dedicated Data Bus
23 Interface - DBI. In accordance with the reference manual the register
[all …]
|
| /freebsd-src/usr.sbin/devctl/ |
| H A D | devctl.8 | 86 consists of a single command followed by command-specific arguments.
93 bus-specific address.
98 .Bl -tag -width indent
100 Force the kernel to re-probe the device.
102 it is attached to the device.
117 If the device is currently attached to a device driver,
127 Note that this can re-enable a device disabled at boot time via a
140 If the device is already attached to a device driver and the
144 attached to the new device driver.
145 If the device is already attached to a device driver and the
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|
| /freebsd-src/share/man/man4/ |
| H A D | ntb_hw_plx.4 | 2 .\" Copyright (c) 2017-2019 Alexander Motin <mav@FreeBSD.org>
31 .Nd PLX/Avago/Broadcom Non-Transparent Bridge driver
35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
48 .Bl -ohang
50 Being set to 1 (default) tells the driver attached to Virtual Interface of the
51 NTB that it works in NTB-to-NTB (back-to-back) mode, 0 -- NTB-to-Root Port.
52 Driver attached to Link Interface (visible from Root Port side) switches to
53 NTB-to-Root Port mode automatically, but one attached to Virtual Interface
57 Lookup Table (A-LUT).
[all …]
|
| H A D | mpr.4 | 4 .\" Copyright (c) 2015-2017 Avago Technologies
5 .\" Copyright (c) 2015-2022 Broadcom Ltd.
45 .Nd "LSI Fusion-MPT 3/3.5 IT/IR 12Gb/s Serial Attached SCSI/SATA/PCIe driver"
49 .Bd -ragged -offset indent
57 .Bd -literal -offset indent
64 Fusion-MPT 3/3.5 IT/IR
65 .Tn SAS/PCIe
72 .Bl -bullet -compact
88 Broadcom Ltd./Avago Tech (LSI) SAS 3408 (8 Port SAS/PCIe)
90 Broadcom Ltd./Avago Tech (LSI) SAS 3416 (16 Port SAS/PCIe)
[all …]
|
| H A D | pci.4 | 30 .Nd generic PCI/PCIe bus driver
35 .Bd -ragged -offset indent
40 .Pq SR-IOV :
41 .Bd -ragged -offset indent
45 To compile in support for native PCI-express HotPlug:
46 .Bd -ragged -offset indent
55 .Tn PCIe
91 or a BAR read access could have function-specific side-effects.
113 driver also includes support for PCI-PCI bridges,
114 various platform-specific Host-PCI bridges,
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/phy/ |
| H A D | phy-miphy365x.txt | 5 for SATA and PCIe.
8 - compatible : Should be "st,miphy365x-phy"
9 - st,syscfg : Phandle / integer array property. Phandle of sysconfig group
11 an entry for each port sub-node, specifying the control
14 Required nodes : A sub-node is required for each channel the controller
16 'reg' and 'reg-names' properties are used inside these
21 - #phy-cells : Should be 1 (See second example)
23 - PHY_TYPE_SATA
24 - PHY_TYPE_PCI
25 - reg : Address and length of register sets for each device in
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/arm/bcm/ |
| H A D | brcm,hr2.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND
13 flash and a PCIe attached integrated switching engine.
16 - Florian Fainelli <f.fainelli@gmail.com>
23 - enum:
24 - ubnt,unifi-switch8
25 - const: brcm,bcm53342
26 - const: brcm,hr2
|
| /freebsd-src/sys/contrib/device-tree/Bindings/net/bluetooth/ |
| H A D | brcm,bcm4377-bluetooth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/brcm,bcm4377-bluetooth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM4377 family PCIe Bluetooth Chips
10 - Sven Peter <sven@svenpeter.dev>
13 This binding describes Broadcom BCM4377 family PCIe-attached bluetooth chips
14 usually found in Apple machines. The Wi-Fi part of the chip is described in
15 bindings/net/wireless/brcm,bcm4329-fmac.yaml.
18 - $ref: bluetooth-controller.yaml#
[all …]
|
| /freebsd-src/sys/dev/bhnd/cores/pci/ |
| H A D | bhnd_pci_hostbvar.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
37 * PCI/PCIe-Gen1 Host Bridge definitions.
48 * PCI/PCIe-Gen1 endpoint-mode device quirks
69 * The purpose of this work-around is unclear; there is some
77 * On PCI-attached BCM4321CB* boards, the PCI latency timer must be set
85 * This TLP workaround will enable setting of the PCIe UR status bit
91 * PCI-PM power management must be explicitly enabled via
99 * On these devices, PCIe/SerDes symbol lock can be lost if the
[all …]
|
| /freebsd-src/sys/contrib/device-tree/src/powerpc/fsl/ |
| H A D | t104xd4rdb.dtsi | 36 reserved-memory {
37 #address-cells = <2>;
38 #size-cells = <2>;
41 bman_fbpr: bman-fbpr {
45 qman_fqd: qman-fqd {
49 qman_pfdr: qman-pfdr {
62 #address-cells = <1>;
63 #size-cells = <1>;
64 compatible = "cfi-flash";
66 bank-width = <2>;
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|
| /freebsd-src/sys/dev/mpr/mpi/ |
| H A D | mpi2_pci.h | 1 /*-
2 * Copyright 2000-2020 Broadcom Inc. All rights reserved.
12 * 3. Neither the name of the author nor the names of any co-contributors
28 * Broadcom Inc. (LSI) MPT-Fusion Host Adapter FreeBSD
32 * Copyright 2000-2020 Broadcom Inc. All rights reserved.
36 * Title: MPI PCIe Attached Devices structures and definitions.
47 * ---------------
50 * -------- -------- ------------------------------------------------------
51 * 03-16-15 02.00.00 Initial version.
52 * 02-17-16 02.00.01 Removed AHCI support.
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|
| /freebsd-src/sys/contrib/device-tree/Bindings/bus/ |
| H A D | brcm,bus-axi.txt | 5 - compatible : brcm,bus-axi
7 - reg : iomem address range of chipcommon core
13 them manually through device tree. Use an interrupt-map to specify the
17 The top-level axi bus may contain children representing attached cores
25 compatible = "brcm,bus-axi";
28 #address-cells = <1>;
29 #size-cells = <1>;
30 #interrupt-cells = <1>;
31 interrupt-map-mask = <0x000fffff 0xffff>;
32 interrupt-map =
[all …]
|
| /freebsd-src/sys/contrib/device-tree/Bindings/net/dsa/ |
| H A D | mscc,ocelot.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - UNGLinuxDriver@microchip.com
16 There are multiple switches which are either part of the Ocelot-1 family, or
19 SPI or PCIe. The present DSA binding shall be used when the host controlling
21 (which is attached to an Ethernet port of the host), rather than through
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|
| /freebsd-src/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8mp-venice-gw71xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 compatible = "gpio-us
[all...] |
| H A D | imx8mp-venice-gw7905.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 led-controller {
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
16 led-0 {
20 default-state = "on";
[all …]
|
| H A D | imx8mp-verdin-dahlia.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 native-hdmi-connector {
8 compatible = "hdmi-connector";
14 remote-endpoint = <&hdmi_tx_out>;
20 compatible = "simple-audi
[all...] |
| H A D | imx8mp-dhcom-pdk3.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN
[all...] |
| /freebsd-src/sys/dev/bhnd/ |
| H A D | bhnd_subr.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
110 BHND_CDESC(BCM, PCIE, PCIE, "PCIe Bridge"),
115 BHND_CDESC(BCM, ARM7S, CPU, "ARM7TDMI-S CPU"),
118 BHND_CDESC(BCM, SSNPHY, WLAN_PHY, "802.11n Single-Stream PHY"),
120 BHND_CDESC(BCM, ARMCM3, CPU, "ARM Cortex-M3 CPU"),
125 BHND_CDESC(BCM, PCIERC, OTHER, "PCIe Root Complex"),
133 BHND_CDESC(BCM, PCIE2, PCIE, "PCIe Bridge (Gen2)"),
142 BHND_CDESC(BCM, NS_PCIE2, PCIE, "PCIe Bridge (Gen2)"),
[all …]
|
| /freebsd-src/sys/dev/bhnd/cores/chipc/pwrctl/ |
| H A D | bhnd_pwrctl_hostb_if.m | 1 #-
45 # tandem with the ChipCommon-attached PWRCTL driver.
47 # [1] Currently, this is known to include PCI (not PCIe) devices, with
48 # ChipCommon core revisions 0-9.
104 * @retval ENODEV If bus-level clock source management is not supported.
105 * @retval ENXIO If bus-level management of @p clock is not supported.
121 * @retval ENODEV If bus-level clock source management is not supported.
122 * @retval ENXIO If bus-level management of @p clock is not supported.
|