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/freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,sm8550-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8550 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM8550 SoC.
20 - const: qcom,sm8550-lpass-lpi-pinctrl
22 - const: qcom,x1e80100-lpass-lpi-pinctrl
23 - const: qcom,sm8550-lpass-lpi-pinctrl
27 - description: LPASS LPI TLMM Control and Status registers
28 - description: LPASS LPI MCC registers
55 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
80 - $ref: qcom,lpass-lpi-common.yaml#
[all …]
H A Dqcom,sm6115-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM6115 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
19 const: qcom,sm6115-lpass-lpi-pinctrl
23 - description: LPASS LPI TLMM Control and Status registers
24 - description: LPASS LPI MCC registers
49 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
71 - $ref: qcom,lpass-lpi-common.yaml#
86 compatible = "qcom,sm6115-lpass-lpi-pinctrl";
H A Dqcom,sm8350-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8350 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM8350 SoC.
19 const: qcom,sm8350-lpass-lpi-pinctrl
23 - description: LPASS LPI TLMM Control and Status registers
24 - description: LPASS LPI MCC registers
51 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
76 - $ref: qcom,lpass-lpi-common.yaml#
91 compatible = "qcom,sm8350-lpass-lpi-pinctrl";
H A Dqcom,sc8280xp-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SC8280XP SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SC8280XP SoC.
18 const: qcom,sc8280xp-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
50 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
74 - $ref: qcom,lpass-lpi-common.yaml#
88 compatible = "qcom,sc8280xp-lpass-lpi-pinctrl";
H A Dqcom,sm8450-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8450 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8450 SoC.
18 const: qcom,sm8450-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
50 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
76 - $ref: qcom,lpass-lpi-common.yaml#
90 compatible = "qcom,sm8450-lpass-lpi-pinctrl";
H A Dqcom,sm8650-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8650 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM8650 SoC.
19 const: qcom,sm8650-lpass-lpi-pinctrl
23 - description: LPASS LPI TLMM Control and Status registers
50 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
75 - $ref: qcom,lpass-lpi-common.yaml#
90 compatible = "qcom,sm8650-lpass-lpi-pinctrl";
H A Dqcom,sc7280-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SC7280 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SC7280 SoC.
18 const: qcom,sc7280-lpass-lpi-pinctrl
38 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
67 - $ref: qcom,lpass-lpi-common.yaml#
74 compatible = "qcom,sc7280-lpass-lpi-pinctrl";
H A Dqcom,sm8250-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8250 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8250 SoC.
18 const: qcom,sm8250-lpass-lpi-pinctrl
48 $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
73 - $ref: qcom,lpass-lpi-common.yaml#
87 compatible = "qcom,sm8250-lpass-lpi-pinctrl";
H A Dqcom,lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,lpass-lpi-pinctrl.yaml#
8 Low Power Island (LPI) TLMM block
15 LPASS LPI IP on most Qualcomm SoCs
19 const: qcom,sm8250-lpass-lpi-pinctrl
124 compatible = "qcom,sm8250-lpass-lpi-pinctrl";
H A Dqcom,lpass-lpi-common.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,lpass-lpi-common.yaml#
7 title: Qualcomm SoC LPASS LPI TLMM Common Properties
16 Low Power Audio SubSystem (LPASS) Low Power Island (LPI) of Qualcomm SoCs.
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/
H A DSjLjEHPrepare.cpp65 void substituteLPadValues(LandingPadInst *LPI, Value *ExnVal, Value *SelVal);
159 void SjLjEHPrepareImpl::substituteLPadValues(LandingPadInst *LPI, Value *ExnVal,
161 SmallVector<Value *, 8> UseWorkList(LPI->users()); in substituteLPadValues() argument
177 if (LPI->use_empty()) in substituteLPadValues()
180 // There are still some uses of LPI. Construct an aggregate with the exception in substituteLPadValues()
181 // values and replace the LPI with that aggregate. in substituteLPadValues()
182 Type *LPadType = LPI->getType(); in substituteLPadValues()
189 LPI->replaceAllUsesWith(LPadVal); in substituteLPadValues()
208 for (LandingPadInst *LPI : LPads) { in setupFunctionContext()
209 IRBuilder<> Builder(LPI in setupFunctionContext()
359 LandingPadInst *LPI = UnwindBlock->getLandingPadInst(); lowerAcrossUnwindEdges() local
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H A DMachineFunction.cpp797 if (const auto *LPI = dyn_cast<LandingPadInst>(FirstI)) { in addLandingPad()
800 if (LPI->isCleanup() && LPI->getNumClauses() != 0) in addLandingPad()
806 for (unsigned I = LPI->getNumClauses(); I != 0; --I) { in addLandingPad()
807 Value *Val = LPI->getClause(I - 1); in addLandingPad()
808 if (LPI->isCatch(I - 1)) { in addLandingPad()
785 if (const auto *LPI = dyn_cast<LandingPadInst>(FirstI)) { addLandingPad() local
/freebsd-src/sys/dev/neta/
H A Dif_mvnetareg.h224 #define MVNETA_LPIC1 0x2cc4 /* LPI control 1 */
225 #define MVNETA_LPIC2 0x2cc8 /* LPI control 2 */
226 #define MVNETA_LPIS 0x2ccc /* LPI status */
227 #define MVNETA_LPIC 0x2cd0 /* LPI counter */
670 #define MVNETA_PI_PCSRXPRLPI (1 << 11) /* PCS Rx path received LPI*/
671 #define MVNETA_PI_PCSTXPRLPI (1 << 12) /* PCS Tx path received LPI*/
672 #define MVNETA_PI_MACRXPRLPI (1 << 13) /* MAC Rx path received LPI*/
678 /* LPI Control 0 (MVNETA_LPIC0) */
682 /* LPI Control 1 (MVNETA_LPIC1) */
683 #define MVNETA_LPIC1_LPIRE (1 << 0) /* LPI request enable */
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/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dsnps,dwc-qos-ethernet.txt108 - snps,en-lpi: If present it enables use of the AXI low-power interface
117 - snps,en-tx-lpi-clockgating: Enable gating of the MAC TX clock during
149 snps,en-tx-lpi-clockgating;
150 snps,en-lpi;
H A Dsamsung-sxgbe.txt8 transmit DMA interrupts, receive DMA interrupts and lpi interrupt.
12 and 1 optional lpi interrupt.
H A Dqcom,ethqos.yaml39 - description: The interrupt that occurs when Rx exits the LPI state
H A Dstarfive,jh7110-dwmac.yaml168 snps,en-tx-lpi-clockgating;
/freebsd-src/sys/contrib/device-tree/Bindings/remoteproc/
H A Dqcom,sm6115-pas.yaml106 - description: LPI CX power domain
107 - description: LPI MX power domain
/freebsd-src/sys/arm64/arm64/
H A Dgic_v3_reg.h41 /* Upper value is determined by LPI max priority */
186 * The PROPBASER LPI Configuration Table is 4k aligned, so bits 51:12 are
238 * The LPI Pending Table (PENDBASER) is 64k aligned. So bits 51:16 are defined to be the PA, for 36
458 * LPI related
H A Dgicv3_its.c100 /* 1 bit per SPI, PPI, and SGI (8k), and 1 bit per LPI (LPI_CONFTAB_SIZE) */
124 /* Virtual LPI ID */
126 /* Physical LPI ID */
142 /* LPI chunk owned by ITS device */
145 u_int lpi_free; /* First free LPI in set */
731 panic("Cannot map prior LPI mapping into KVA"); in gicv3_its_conftable_init()
736 "LPI enabled, conf table using pa %#lx va %lx\n", in gicv3_its_conftable_init()
792 * don't need to disable / enable LPI if we're not changing PROPBASER, in its_init_cpu_lpi()
835 * Set the LPI pending table base in its_init_cpu_lpi()
901 /* Do per-cpu LPI ini in its_init_cpu()
[all...]
H A Dgic_v3_var.h44 bool lpi_enabled; /* redist LPI configured? */
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DEHStreamer.cpp95 for (const LandingPadInfo *LPI : LandingPads) { in computeActionsTable() local
96 const std::vector<int> &TypeIds = LPI->TypeIds; in computeActionsTable()
97 unsigned NumShared = PrevLPI ? sharedTypeIDs(LPI, PrevLPI) : 0; in computeActionsTable()
151 PrevLPI = LPI; in computeActionsTable()
391 for (const LandingPadInfo &LPI : PadInfos) { in emitExceptionTable() local
395 if (LPI.LandingPadLabel && !LPI.LandingPadLabel->isDefined()) in emitExceptionTable()
397 LandingPads.push_back(&LPI); in emitExceptionTable()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyLowerEmscriptenEHSjLj.cpp1200 if (auto *LPI = dyn_cast<LandingPadInst>(I)) in runEHOnFunction()
1201 LandingPads.insert(LPI); in runEHOnFunction()
1207 for (LandingPadInst *LPI : LandingPads) { in runEHOnFunction() local
1208 IRB.SetInsertPoint(LPI); in runEHOnFunction()
1210 for (unsigned I = 0, E = LPI->getNumClauses(); I < E; ++I) { in runEHOnFunction()
1211 Constant *Clause = LPI->getClause(I); in runEHOnFunction()
1214 if (LPI->isCatch(I)) in runEHOnFunction()
1221 Value *Poison = PoisonValue::get(LPI->getType()); in runEHOnFunction()
1226 LPI->replaceAllUsesWith(Pair1); in runEHOnFunction()
1227 ToErase.push_back(LPI); in runEHOnFunction()
[all...]
/freebsd-src/sys/dev/igc/
H A Digc_defines.h787 #define IGC_EEER_TX_LPI_EN 0x00010000 /* EEER Tx LPI Enable */
788 #define IGC_EEER_RX_LPI_EN 0x00020000 /* EEER Rx LPI Enable */
792 #define IGC_EEER_RX_LPI_STATUS 0x40000000 /* Rx in LPI state */
793 #define IGC_EEER_TX_LPI_STATUS 0x80000000 /* Tx in LPI state */
811 #define IGC_EEE_SU_LPI_CLK_STP 0x00800000 /* EEE LPI Clock Stop */
1261 * of EEE LPI Tx state
1265 * of EEE LPI Tx state
/freebsd-src/sys/dev/e1000/
H A De1000_ich8lan.h279 #define I82579_LPI_PLL_SHUT 0x4412 /* LPI PLL Shut Enable */
286 #define I82579_LPI_100_PLL_SHUT (1 << 2) /* 100M LPI PLL Shut Enabled */

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