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Searched full:invt (Results 1 – 21 of 21) sorted by relevance

/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1485 EVT InVT = InOp.getValueType(); in SplitVecRes_INSERT_SUBVECTOR()
1488 switch (getTypeAction(InVT)) { in SplitVecRes_INSERT_SUBVECTOR()
1776 EVT InVT = Op.getValueType(); in SplitVecRes_INSERT_VECTOR_ELT()
1777 if (InVT.isVector()) { in SplitVecRes_INSERT_VECTOR_ELT()
1780 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) in SplitVecRes_INSERT_VECTOR_ELT()
2470 EVT InVT = N->getOperand(0).getValueType(); in SplitVecRes_VECTOR_SHUFFLE()
2471 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) in SplitVecRes_VECTOR_SHUFFLE()
2510 EVT InVT = N->getOperand(0).getValueType(); in SplitVecRes_VECTOR_SHUFFLE()
2511 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector) in SplitVecRes_VECTOR_SHUFFLE()
2531 EVT InVT in SplitVecRes_VECTOR_SHUFFLE()
1352 EVT InVT = InOp.getValueType(); SplitVecRes_BITCAST() local
1636 EVT InVT = Op.getValueType(); SplitVecRes_StrictFPOp() local
2312 EVT InVT = N->getOperand(0).getValueType(); SplitVecRes_UnaryOp() local
2353 EVT InVT = N->getOperand(0).getValueType(); SplitVecRes_FFREXP() local
3219 EVT InVT = Lo.getValueType(); SplitVecOp_UnaryOp() local
3832 EVT InVT = InVec->getValueType(0); SplitVecOp_TruncateHelper() local
3962 EVT InVT = Lo.getValueType(); SplitVecOp_FP_ROUND() local
4024 EVT InVT = Lo.getValueType(); SplitVecOp_FP_TO_XINT_SAT() local
4738 EVT InVT = InOp.getValueType(); WidenVecRes_Convert() local
4883 EVT InVT = InOp.getValueType(); WidenVecRes_Convert_StrictFP() local
4919 EVT InVT = InOp.getValueType(); WidenVecRes_EXTEND_VECTOR_INREG() local
5027 EVT InVT = InOp.getValueType(); WidenVecRes_BITCAST() local
5162 EVT InVT = N->getOperand(0).getValueType(); WidenVecRes_CONCAT_VECTORS() local
5261 EVT InVT = InOp.getValueType(); WidenVecRes_EXTRACT_SUBVECTOR() local
5931 EVT InVT = InOp1.getValueType(); WidenVecRes_SETCC() local
6164 EVT InVT = InOp.getValueType(); WidenVecOp_EXTEND() local
6253 EVT InVT = InOp.getValueType(); WidenVecOp_Convert() local
6377 EVT InVT = N->getOperand(0).getValueType(); WidenVecOp_CONCAT_VECTORS() local
7329 EVT InVT = InOp.getValueType(); ModifyToType() local
[all...]
H A DLegalizeTypesGeneric.cpp44 EVT InVT = InOp.getValueType(); in ExpandRes_BITCAST() local
48 switch (getTypeAction(InVT)) { in ExpandRes_BITCAST()
66 if (TLI.hasBigEndianPartOrdering(InVT, DL) != in ExpandRes_BITCAST()
89 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST"); in ExpandRes_BITCAST()
92 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT); in ExpandRes_BITCAST()
102 if (InVT.isVector() && OutVT.isInteger()) { in ExpandRes_BITCAST()
162 Align InAlign = DAG.getReducedAlign(InVT, /*UseABI=*/false); in ExpandRes_BITCAST()
165 SDValue StackPtr = DAG.CreateStackTemporary(InVT.getStoreSize(), Align); in ExpandRes_BITCAST()
H A DLegalizeIntegerTypes.cpp464 EVT InVT = InOp.getValueType(); in PromoteIntRes_BITCAST()
465 EVT NInVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT); in PromoteIntRes_BITCAST()
470 switch (getTypeAction(InVT)) { in PromoteIntRes_BITCAST()
532 unsigned ShiftAmt = NInVT.getSizeInBits() - InVT.getSizeInBits(); in PromoteIntRes_BSWAP()
1336 EVT InVT = N->getOperand(OpNo).getValueType(); in PromoteIntRes_ZExtIntBinOp()
1339 EVT SVT = getSetCCResultType(InVT); in PromoteIntRes_ZExtIntBinOp()
1345 if (getTypeAction(InVT) == TargetLowering::TypePromoteInteger) { in PromoteIntRes_UMINUMAX()
1346 InVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT); in PromoteIntRes_UMINUMAX()
1347 SVT = getSetCCResultType(InVT); in PromoteIntRes_UMINUMAX()
414 EVT InVT = InOp.getValueType(); PromoteIntRes_BITCAST() local
1230 EVT InVT = N->getOperand(OpNo).getValueType(); PromoteIntRes_SETCC() local
1504 EVT InVT = InOp.getValueType(); PromoteIntRes_TRUNCATE() local
2444 EVT InVT = Op.getValueType(); PromoteIntOp_VECREDUCE() local
5565 EVT InVT = InOp0.getValueType(); PromoteIntRes_EXTRACT_SUBVECTOR() local
5614 EVT InVT = InOp0.getValueType(); PromoteIntRes_EXTRACT_SUBVECTOR() local
5912 MVT InVT = V0.getValueType().getSimpleVT(); PromoteIntOp_EXTRACT_SUBVECTOR() local
[all...]
H A DDAGCombiner.cpp23400 EVT InVT = Vec.getValueType(); in visitBUILD_VECTOR()
23412 if (InVT.isSimple() && NearestPow2 > 2 && MaxIndex < NearestPow2 && in visitBUILD_VECTOR()
23416 InVT.getVectorElementType(), SplitSize); in visitBUILD_VECTOR()
23419 InVT.getVectorNumElements()) { in visitBUILD_VECTOR()
23603 EVT InVT = EVT::getVectorVT(*DAG.getContext(), InSVT, NumElems); in combineConcatVectorOfExtracts()
23606 if (LegalTypes && !TLI.isTypeLegal(InVT)) in combineConcatVectorOfExtracts()
23616 In = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InVT, In, in combineConcatVectorOfExtracts()
24905 EVT InVT = V.getValueType(); in combineShuffleToZeroExtendVectorInReg()
24907 unsigned EltSize = InVT.getScalarSizeInBits(); in combineShuffleToZeroExtendVectorInReg()
24911 EVT EltVT = InVT in combineShuffleToZeroExtendVectorInReg()
23040 EVT InVT = Vec.getValueType(); reduceBuildVecToShuffle() local
23243 EVT InVT = EVT::getVectorVT(*DAG.getContext(), InSVT, NumElems); convertBuildVecZextToZext() local
24530 EVT InVT = V.getValueType(); visitEXTRACT_SUBVECTOR() local
25182 EVT InVT = Op0.getOperand(0).getValueType(); combineShuffleOfBitcast() local
25466 EVT InVT = visitVECTOR_SHUFFLE() local
[all...]
H A DSelectionDAG.cpp3807 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits()
3808 APInt InDemandedElts = DemandedElts.zext(InVT.getVectorNumElements()); in computeKnownBits()
3821 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits()
3822 APInt InDemandedElts = DemandedElts.zext(InVT.getVectorNumElements()); in computeKnownBits()
3839 EVT InVT = Op.getOperand(0).getValueType(); in computeKnownBits()
3840 APInt InDemandedElts = DemandedElts.zext(InVT.getVectorNumElements()); in computeKnownBits()
3648 EVT InVT = Op.getOperand(0).getValueType(); computeKnownBits() local
3662 EVT InVT = Op.getOperand(0).getValueType(); computeKnownBits() local
3680 EVT InVT = Op.getOperand(0).getValueType(); computeKnownBits() local
H A DLegalizeDAG.cpp2240 EVT InVT = Node->getOperand(Node->isStrictFPOpcode() ? 1 : 0).getValueType(); in ExpandDivRemLibCall()
2241 RTLIB::Libcall LC = RTLIB::getFPLibCall(InVT.getSimpleVT(), in ExpandDivRemLibCall()
2217 EVT InVT = Node->getOperand(Node->isStrictFPOpcode() ? 1 : 0).getValueType(); ExpandArgFPLibCall() local
H A DSelectionDAGBuilder.cpp12458 EVT InVT = getValue(I.getOperand(0)).getValueType();
12467 unsigned NumElts = InVT.getVectorMinNumElements();
12475 DAG.getVTList(InVT, InVT), InVec0, InVec1);
11948 EVT InVT = getValue(I.getOperand(0)).getValueType(); visitVectorInterleave() local
/freebsd-src/sys/contrib/device-tree/Bindings/serial/
H A Dfsl-imx-uart.txt14 using the INVT/INVR registers.
H A Dfsl-imx-uart.yaml85 INVT registers.
/freebsd-src/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2511 EVT InVT = N->getOperand(0)->getValueType(0); in performVectorExtendCombine()
2514 if (ResVT == MVT::v4f32 && (InVT == MVT::v4i16 || InVT == MVT::v4i8)) in performVectorExtendCombine()
2516 else if (ResVT == MVT::v2f64 && (InVT == MVT::v2i16 || InVT == MVT::v2i8)) in performVectorExtendCombine()
2745 EVT InVT = MVT::i16, OutVT = MVT::i8; in truncateVectorWithNARROW()
2747 InVT = MVT::i32; in truncateVectorWithNARROW()
2751 InVT = EVT::getVectorVT(Ctx, InVT, SubSizeInBits / InVT in truncateVectorWithNARROW()
2494 EVT InVT = N->getOperand(0)->getValueType(0); performVectorExtendToFPCombine() local
2728 EVT InVT = MVT::i16, OutVT = MVT::i8; truncateVectorWithNARROW() local
2764 EVT InVT = In.getValueType(); performTruncateCombine() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp4515 EVT InVT = In.getValueType(); in getPack()
4516 assert(VT.isVector() && InVT.isVector() && "Expected vector VTs."); in getPack()
4523 if (InVT.getSizeInBits() > 128) { in getPack()
4524 assert(VT.getSizeInBits() == InVT.getSizeInBits() && in getPack()
4526 unsigned Scale = VT.getScalarSizeInBits() / InVT.getScalarSizeInBits(); in getPack()
4529 InVT = In.getValueType(); in getPack()
4532 if (VT.getVectorNumElements() != InVT.getVectorNumElements()) in getPack()
20154 MVT InVT = In.getSimpleValueType(); in truncateVectorWithPACK()
20157 assert(VT.isVector() && InVT.isVector() && "Expected vector type"); in truncateVectorWithPACK()
20160 assert(VT.getVectorNumElements() == InVT in truncateVectorWithPACK()
4379 EVT InVT = In.getValueType(); getEXTEND_VECTOR_INREG() local
19965 MVT InVT = In.getSimpleValueType(); LowerAVXExtend() local
20042 MVT InVT = In.getSimpleValueType(); LowerZERO_EXTEND_Mask() local
20144 EVT InVT = MVT::i16, OutVT = MVT::i8; truncateVectorWithPACK() local
20435 MVT InVT = In.getSimpleValueType(); LowerTruncateVecI1() local
20514 MVT InVT = In.getSimpleValueType(); LowerTRUNCATE() local
24146 MVT InVT = In.getSimpleValueType(); LowerSIGN_EXTEND_Mask() local
24201 MVT InVT = In.getSimpleValueType(); LowerANY_EXTEND() local
24219 MVT InVT = In.getSimpleValueType(); LowerEXTEND_VECTOR_INREG() local
24341 MVT InVT = In.getSimpleValueType(); LowerSIGN_EXTEND() local
30772 MVT InVT = V.getSimpleValueType(); getPMOVMSKB() local
31461 MVT InVT = InOp.getSimpleValueType(); ExtendToType() local
32133 EVT InVT = N->getOperand(0).getValueType(); ReplaceNodeResults() local
32211 EVT InVT = In.getValueType(); ReplaceNodeResults() local
32305 EVT InVT = In.getValueType(); ReplaceNodeResults() local
43259 EVT InVT = Zext0.getOperand(0).getValueType(); createPSADBW() local
49622 EVT InVT = In.getValueType(); detectUSatPattern() local
49708 EVT InVT = In.getValueType(); combineTruncateWithSat() local
49809 EVT InVT = In.getValueType(); detectAVGPattern() local
51179 EVT InVT = Src.getValueType(); combinePMULH() local
51366 EVT InVT = Ops[0].getValueType(); detectPMADDUBSW() local
52123 MVT InVT = In.getSimpleValueType(); combineX86INT_TO_FP() local
52152 MVT InVT = In.getSimpleValueType(); combineCVTP2I_CVTTP2I() local
53563 EVT InVT = Op0.getValueType(); combineUIntToFP() local
53633 EVT InVT = Op0.getValueType(); combineSIntToFP() local
54158 EVT InVT = Ops[0].getValueType(); matchPMADDWD() local
54204 EVT InVT = N00.getValueType(); matchPMADDWD_2() local
[all...]
H A DX86InstrAVX512.td162 X86VectorVTInfo InVT,
167 !con((ins InVT.RC:$src1), NonTiedIns),
168 !con((ins InVT.RC:$src1, InVT.KRCWM:$mask), NonTiedIns),
169 !con((ins InVT.RC:$src1, InVT.KRCWM:$mask), NonTiedIns),
171 (vselect_mask InVT.KRCWM:$mask, RHS,
172 (bitconvert InVT.RC:$src1)),
/freebsd-src/contrib/llvm-project/llvm/utils/TableGen/
H A DCodeGenDAGPatterns.h
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4372 EVT InVT = Op.getOperand(IsStrict ? 1 : 0).getValueType(); in LowerFSINCOS()
4383 useSVEForFixedLengthVectorVT(InVT, !Subtarget->isNeonAvailable())) in LowerFSINCOS()
4386 unsigned NumElts = InVT.getVectorNumElements(); in LowerFSINCOS()
4389 if ((InVT.getVectorElementType() == MVT::f16 && !Subtarget->hasFullFP16()) || in LowerFSINCOS()
4390 InVT.getVectorElementType() == MVT::bf16) { in LowerFSINCOS()
4405 uint64_t InVTSize = InVT.getFixedSizeInBits(); in LowerBITCAST()
4409 InVT = InVT.changeVectorElementTypeToInteger(); in LowerBITCAST()
4410 SDValue Cv = DAG.getNode(Op.getOpcode(), dl, {InVT, MVT::Other}, in LowerBITCAST()
4416 DAG.getNode(Op.getOpcode(), dl, InVT in LowerBITCAST()
4011 EVT InVT = Op.getOperand(IsStrict ? 1 : 0).getValueType(); LowerVectorFP_TO_INT() local
4258 EVT InVT = In.getValueType(); LowerVectorINT_TO_FP() local
4837 EVT InVT = Op.getValueType(); getSVEPredicateBitCast() local
13534 EVT InVT = Op.getOperand(0).getValueType(); LowerEXTRACT_SUBVECTOR() local
13580 EVT InVT = Op.getOperand(1).getValueType(); LowerINSERT_SUBVECTOR() local
18995 EVT InVT = N0.getValueType(); performVectorAddSubExtCombine() local
21554 EVT InVT = Value.getOperand(0).getValueType(); performMSTORECombine() local
24490 EVT InVT = In.getValueType(); ReplaceExtractSubVectorResults() local
25808 EVT InVT = Mask.getValueType(); convertFixedMaskToScalableVector() local
26066 EVT InVT = Op.getOperand(0).getValueType(); LowerFixedLengthExtractVectorElt() local
26082 EVT InVT = Op.getOperand(0).getValueType(); LowerFixedLengthInsertVectorElt() local
26291 EVT InVT = Op.getOperand(1).getValueType(); LowerFixedLengthVectorSelectToSVE() local
26313 EVT InVT = Op.getOperand(0).getValueType(); LowerFixedLengthVectorSetccToSVE() local
26780 EVT InVT = Op.getValueType(); getSVESafeBitCast() local
[all...]
H A DSVEInstrFormats.td2790 ValueType OutVT, ValueType InVT,
2793 def : SVE_4_Op_Imm_Pat<OutVT, op, OutVT, InVT, InVT, i32, VectorIndexH32b_timm, !cast<Instruction>(NAME)>;
2827 ValueType InVT, SDPatternOperator op> {
2829 def : SVE_3_Op_Pat<OutVT, op, OutVT, InVT, InVT, !cast<Instruction>(NAME)>;
8707 string asm, ValueType InVT, SDPatternOperator op> {
8709 def : SVE_3_Op_Pat<nxv4f32, op, nxv4f32, InVT, InVT, !cast<Instruction>(NAME)>;
8734 ZPRRegOp src2_ty, string asm, ValueType InVT,
[all...]
H A DAArch64ISelDAGToDAG.cpp4429 EVT InVT = N->getOperand(1).getValueType(); in Select()
4430 if (VT.isFixedLengthVector() || InVT.isScalableVector()) in Select()
4432 if (InVT.getSizeInBits() <= 128) in Select()
4458 EVT InVT = N->getOperand(0).getValueType(); in Select()
4459 if (VT.isScalableVector() || InVT.isFixedLengthVector()) in Select()
4468 assert(InVT.getSizeInBits().getKnownMinValue() == AArch64::SVEBitsPerBlock && in Select()
4224 EVT InVT = N->getOperand(1).getValueType(); trySelectCastFixedLengthToScalableVector() local
4253 EVT InVT = N->getOperand(0).getValueType(); trySelectCastScalableToFixedLengthVector() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp3833 EVT InVT = In.getValueType(); in lowerBITCAST()
3848 if (InVT == MVT::i32 && ResVT == MVT::f32) { in lowerBITCAST()
3864 if (InVT == MVT::f32 && ResVT == MVT::i32) { in lowerVASTART_XPLINK()
5170 MVT InVT = MVT::getVectorVT(MVT::getIntegerVT(InBytes * 8), in getPermuteNode()
5172 Op0 = DAG.getNode(ISD::BITCAST, DL, InVT, Op0); in getPermuteNode()
5173 Op1 = DAG.getNode(ISD::BITCAST, DL, InVT, Op1); in getPermuteNode()
5177 Op = DAG.getNode(SystemZISD::PERMUTE_DWORDS, DL, InVT, Op0, Op1, Op2); in getPermuteNode()
5183 Op = DAG.getNode(P.Opcode, DL, InVT, Op0, Op1); in getPermuteNode()
5555 EVT InVT = MVT::getVectorVT(MVT::getIntegerVT(InBits), in insertUnpackIfPrepared()
5557 SDValue PackedOp = DAG.getNode(ISD::BITCAST, DL, InVT, O in insertUnpackIfPrepared()
3808 EVT InVT = In.getValueType(); lowerBITCAST() local
5169 MVT InVT = MVT::getVectorVT(MVT::getIntegerVT(InBytes * 8), getPermuteNode() local
5554 EVT InVT = MVT::getVectorVT(MVT::getIntegerVT(InBits), insertUnpackIfPrepared() local
5961 EVT InVT = PackedOp.getValueType(); lowerSIGN_EXTEND_VECTOR_INREG() local
5980 EVT InVT = PackedOp.getValueType(); lowerZERO_EXTEND_VECTOR_INREG() local
6721 EVT InVT = VT.changeVectorElementTypeToInteger(); combineMERGE() local
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp2237 MVT InVT = V.getSimpleValueType(); in SelectFrameAddrRegImm()
2247 if (InVT.isFixedLengthVector()) in SelectFrameAddrRegImm()
2248 InVT = TLI.getContainerForFixedLengthVector(InVT); in SelectFrameAddrRegImm()
2254 InVT, SubVecContainerVT, Idx, TRI); in SelectFrameAddrRegImm()
2265 unsigned InRegClassID = RISCVTargetLowering::getRegClassIDForVecVT(InVT); in selectConstantAddr()
2050 MVT InVT = V.getSimpleValueType(); Select() local
H A DRISCVISelLowering.cpp10990 MVT InVT = Op.getOperand(0).getSimpleValueType(); in lowerVPStridedLoad()
10991 MVT ContainerVT = getContainerForFixedLengthVector(InVT); in lowerVPStridedLoad()
11022 MVT InVT = Op1.getSimpleValueType(); in lowerVPStridedLoad()
11054 MVT ContainerInVT = InVT; in lowerVPStridedStore()
11055 if (InVT.isFixedLengthVector()) { in lowerVPStridedStore()
11056 ContainerInVT = getContainerForFixedLengthVector(InVT); in lowerVPStridedStore()
11062 auto [Mask, VL] = getDefaultVLOps(InVT, ContainerInVT, DL, DAG, Subtarget); in lowerVPStridedStore()
10209 MVT InVT = Op.getOperand(0).getSimpleValueType(); lowerFixedLengthVectorSetccToRVV() local
10241 MVT InVT = Op1.getSimpleValueType(); lowerVectorStrictFSetcc() local
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp3099 EVT InVT = InputOp.getValueType(); in computeLogicOpInGPR()
3100 return SDValue(CurDAG->getMachineNode(InVT == MVT::i32 ? PPC::RLDICL_32 : in computeLogicOpInGPR()
3101 PPC::RLDICL, dl, InVT, InputOp, in computeLogicOpInGPR()
3244 EVT InVT = LHS.getValueType(); in addExtOrTrunc()
3245 bool Is32Bit = InVT == MVT::i32; in addExtOrTrunc()
3253 dl, InVT, LHS, LHS), 0);
5807 EVT InVT = N->getOperand(0).getValueType(); in Select()
5808 assert((InVT == MVT::i64 || InVT == MVT::i32) && in Select()
5811 unsigned Opcode = (InVT in Select()
3112 EVT InVT = InputOp.getValueType(); computeLogicOpInGPR() local
3257 EVT InVT = LHS.getValueType(); getCompoundZeroComparisonInGPR() local
5819 EVT InVT = N->getOperand(0).getValueType(); Select() local
[all...]
H A DPPCISelLowering.cpp8783 EVT InVT = Src.getValueType(); in LowerINT_TO_FP()
8786 isOperationCustom(Op.getOpcode(), InVT)) in LowerINT_TO_FP()
8657 EVT InVT = Src.getValueType(); LowerINT_TO_FP() local