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/freebsd-src/sys/contrib/device-tree/Bindings/phy/
H A Dnvidia,tegra124-xusb-padctl.txt11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
14 contains a software-configurable mux that sits between the I/O controller
17 In addition to per-lane configuration, USB 3.0 ports may require additional
18 settings on a per-board basis.
20 Pads will be represented as children of the top-level XUSB pad controller
23 PHY bindings, as described by the phy-bindings.txt file in this directory.
34 --------------------
35 - compatible: Must be:
[all …]
H A Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra124-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra20-usb-phy.txt6 - compatible : For Tegra20, must contain "nvidia,tegra20-usb-phy".
7 For Tegra30, must contain "nvidia,tegra30-usb-phy". Otherwise, must contain
8 "nvidia,<chip>-usb-phy" plus at least one of the above, where <chip> is
10 - reg : Defines the following set of registers, in the order listed:
11 - The PHY's own register set.
13 - The register set of the PHY containing the UTMI pad control registers.
14 Present if-and-only-if phy_type == utmi.
15 - phy_type : Should be one of "utmi", "ulpi" or "hsic".
16 - clocks : Defines the clocks listed in the clock-names property.
17 - clock-names : The following clock names must be present:
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/mfd/
H A Domap-usb-host.txt5 - compatible: should be "ti,usbhs-host"
6 - reg: should contain one register range i.e. start and length
7 - ti,hwmods: must contain "usb_host_hs"
11 - num-ports: number of USB ports. Usually this is automatically detected
15 - portN-mode: String specifying the port mode for port N, where N can be
16 from 1 to 3. If the port mode is not specified, that port is treated
18 "ehci-phy",
19 "ehci-tll",
20 "ehci-hsic",
21 "ohci-phy-6pin-datse0",
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/usb/
H A Dci-hdrc-usb2.txt4 - compatible: should be one of:
5 "fsl,imx23-usb"
6 "fsl,imx27-usb"
7 "fsl,imx28-usb"
8 "fsl,imx6q-usb"
9 "fsl,imx6sl-usb"
10 "fsl,imx6sx-usb"
11 "fsl,imx6ul-usb"
12 "fsl,imx7d-usb"
13 "fsl,imx7ulp-usb"
[all …]
H A Dci-hdrc-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdr
[all...]
H A Datmel-usb.txt6 - compatible: Should be "atmel,at91rm9200-ohci" for USB controllers
7 used in host mode.
8 - reg: Address and length of the register set for the device
9 - interrupts: Should contain ohci interrupt
10 - clocks: Should reference the peripheral, host and system clocks
11 - clock-names: Should contain three strings
15 - num-ports: Number of ports.
16 - atmel,vbus-gpio: If present, specifies a gpio that needs to be
18 - atmel,oc-gpio: If present, specifies a gpio that needs to be
22 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pm
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/
H A Dqcom,msm8974-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8974-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8974 SoC.
18 const: qcom,msm8974-pinctrl
26 gpio-reserved-ranges:
30 gpio-line-names:
[all …]
H A Dnvidia,tegra124-xusb-padctl.txt7 needed for USB. For the new binding, see ../phy/nvidia,tegra-xusb-padctl.txt.
14 This document defines the device-specific binding for the XUSB pad controller.
16 Refer to pinctrl-bindings.txt in this directory for generic information about
17 pin controller device tree bindings and ../phy/phy-bindings.txt for details on
21 --------------------
22 - compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl".
23 Otherwise, must contain '"nvidia,<chip>-xusb-padctl",
24 "nvidia-tegra124-xusb-padctl"', where <chip> is tegra132 or tegra210.
25 - reg: Physical base address and length of the controller's registers.
26 - resets: Must contain an entry for each entry in reset-names.
[all …]
H A Dqcom,msm8960-pinctrl.txt3 This binding describes the Top Level Mode Multiplexer block found in the
6 - compatible:
9 Definition: must be "qcom,msm8960-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
16 - interrupts:
18 Value type: <prop-encoded-array>
21 - interrupt-controller:
26 - #interrupt-cells:
30 in <dt-bindings/interrupt-controller/irq.h>
[all …]
H A Dqcom,apq8084-pinctrl.txt3 This binding describes the Top Level Mode Multiplexer block found in the
6 - compatible:
9 Definition: must be "qcom,apq8084-pinctrl"
11 - reg:
13 Value type: <prop-encoded-array>
16 - interrupts:
18 Value type: <prop-encoded-array>
21 - interrupt-controller:
26 - #interrupt-cells:
30 in <dt-bindings/interrupt-controller/irq.h>
[all …]
H A Dqcom,msm8960-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8960-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8960 SoC.
18 const: qcom,msm8960-pinctrl
26 gpio-reserved-ranges:
30 gpio-line-names:
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
H A Dnvidia,tegra186-pmc.txt4 - compatible: Should contain one of the following:
5 - "nvidia,tegra186-pmc": for Tegra186
6 - "nvidia,tegra194-pmc": for Tegra194
7 - "nvidia,tegra234-pmc": for Tegra234
8 - reg: Must contain an (offset, length) pair of the register set for each
9 entry in reg-names.
10 - reg-names: Must include the following entries:
11 - "pmc"
12 - "wake"
13 - "aotag"
[all …]
H A Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pm
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4412-itop-scp-core.dtsi1 // SPDX-License-Identifier: GPL-2.0
13 #include <dt-bindings/clock/samsung,s2mps11.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
17 #include "exynos4412-ppmu-common.dtsi"
18 #include "exynos-mfc-reserved-memory.dtsi"
31 compatible = "samsung,secure-firmware";
35 fixed-rate-clocks {
37 compatible = "samsung,clock-xxti";
38 clock-frequency = <0>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include <dt-bindings/pwm/pwm.h>
10 stdout-path = &lpuart1;
15 compatible = "pwm-backlight";
16 pinctrl-names = "default";
17 pinctrl-
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/microchip/
H A Dat91-sama5d2_icp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2-ICP board
11 /dts-v1/;
13 #include "sama5d2-pinfunc.h"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-binding
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap5-board-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 stdout-path = &uart3;
18 vmain: fixedregulator-vmain {
19 compatible = "regulator-fixed";
20 regulator-name = "vmain";
21 regulator-min-microvolt = <5000000>;
22 regulator-max-microvolt = <5000000>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-a83t-cubietruck-plus.dts2 * Copyright 2015 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun8i-a83t.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
52 compatible = "cubietech,cubietruck-plus", "allwinner,sun8i-a83t";
60 stdout-path = "serial0:115200n8";
63 hdmi-connecto
[all...]
H A Dsun9i-a80-optimus.dts2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
46 #include "sun9i-a80.dtsi"
48 #include <dt-bindings/gpio/gpio.h>
52 compatible = "merrii,a80-optimus", "allwinner,sun9i-a80";
60 stdout-path = "serial0:115200n8";
64 compatible = "gpio-leds";
83 reg_usb1_vbus: usb1-vbus {
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/marvell/
H A Dmmp3.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/marvell,mmp2.h>
7 #include <dt-bindings/power/marvell,mmp2.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
17 enable-method = "marvell,mmp3-smp";
22 next-level-cache = <&l2>;
[all …]

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