/freebsd-src/sys/contrib/device-tree/Bindings/interrupt-controller/ |
H A D | riscv,cpu-intc.txt | 4 RISC-V cores include Control Status Registers (CSRs) which are local to each 6 Some of these CSRs are used to control local interrupts connected to the core. 40 definition of the hart whose CSRs control these local interrupts.
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/freebsd-src/sys/contrib/device-tree/Bindings/pci/ |
H A D | snps,dw-pcie-ep.yaml | 47 with all spaces. Note iATU/eDMA CSRs are indirectly accessible 73 set of viewport CSRs mapped into the PL space. Note iATU is 79 CSRs mapped in a non-standard base address. The registers offset 86 PCS and PHY CSRs accessible over a dedicated memory mapped
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H A D | snps,dw-pcie.yaml | 56 with all spaces. Note iATU/eDMA CSRs are indirectly accessible 82 set of viewport CSRs mapped into the PL space. Note iATU is 88 CSRs mapped in a non-standard base address. The registers offset 95 PCS and PHY CSRs accessible over a dedicated memory mapped
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H A D | snps,dw-pcie-common.yaml | 79 basically the set of the controller CSRs.
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/freebsd-src/sys/dev/qat_c2xxx/ |
H A D | qat_c2xxxreg.h | 90 * 32K AE CSRs and transfer registers, 8K CHAP/PMU, 91 * 4K EP CSRs, 4K MSI-X Tables 96 /* PETRINGCSR: 8K 16 bundles of ET Ring CSRs */
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/freebsd-src/share/man/man4/ |
H A D | iavf.4 | 144 4 Queue Pairs (QP) and associated Configuration Status Registers (CSRs) 151 1 control queue, with iavf descriptors, CSRs and ring format 153 5 MSI\-X interrupt vectors and corresponding iavf CSRs
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/freebsd-src/lib/msun/riscv/ |
H A D | fenv.h | 108 __asm __volatile("csrs fflags, %0" :: "r"(__fcsr & __excepts)); in fesetexceptflag() 117 __asm __volatile("csrs fflags, %0" :: "r"(__excepts)); in feraiseexcept()
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/freebsd-src/sys/contrib/device-tree/Bindings/soc/litex/ |
H A D | litex,soc-controller.yaml | 13 operations and provide functions for other drivers to read/write CSRs
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/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | ShrinkWrap.cpp | 357 // Check if this regmask clobbers any of the CSRs. in INITIALIZE_PASS_DEPENDENCY() 399 /// or def of CSRs/FI to MBB. 425 /// Collect blocks reachable by use or def of CSRs/FI. in collectBlocksReachableByDirty() 629 // Find blocks reachable from the use or def of CSRs/FI. in postShrinkWrapping() 750 // use/def CSRs in updateSaveRestorePoints() 752 // All the uses/defs of CSRs are dominated by Save and post-dominated in updateSaveRestorePoints() 753 // by Restore. However, the CSRs uses are still reachable after in updateSaveRestorePoints()
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H A D | TargetFrameLoweringImpl.cpp | 129 // execution we do not need the CSR spills either: setjmp stores all CSRs in determineCalleeSaves()
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/freebsd-src/sys/riscv/include/ |
H A D | asm.h | 66 csrs sstatus, tmp
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H A D | cpufunc.h | 69 "csrs sstatus, %0" in intr_restore()
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/freebsd-src/sys/riscv/riscv/ |
H A D | swtch.S | 48 csrs sstatus, t0 97 csrs sstatus, t0 161 csrs sstatus, t0
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/freebsd-src/sys/dev/bhnd/bhndb/ |
H A D | bhndb_pci_sprom.c | 34 * Provides support for early PCI bridge cores that vend SPROM CSRs
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/freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | snps,dw-umctl2-ddrc.yaml | 60 A standard set of the clock sources contains CSRs bus clock, AXI-ports
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVSystemOperands.td | 75 // User Floating-Point CSRs 341 // User Vector CSRs 383 // Machine-level CSRs 404 // Supervisor-level CSRs 420 // Hypervisor and VS CSRs 452 // Resumable Non-Maskable Interrupts(Smrnmi) CSRs
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/freebsd-src/contrib/llvm-project/lldb/source/Utility/ |
H A D | RISCV_DWARF_Registers.h | 120 // The vector extension adds seven unprivileged CSRs
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMCallingConv.td | 339 // the order of CSRs in CSR_iOS. 343 // CSRs that are handled by prologue, epilogue. 346 // CSRs that are handled explicitly via copies.
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/freebsd-src/sys/cddl/dev/dtrace/riscv/ |
H A D | dtrace_asm.S | 67 csrs sstatus, a0
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/freebsd-src/sys/contrib/device-tree/Bindings/riscv/ |
H A D | extensions.yaml | 133 The standard Smstateen extension for controlling access to CSRs 390 special case read-only CSRs, that were moved into the Zicntr and
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 92 /// Stack probing calls preserve different CSRs to the normal CC.
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H A D | AArch64FrameLowering.h | 136 /// Returns true if CSRs should be paired.
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/freebsd-src/sys/dev/qat/qat_common/ |
H A D | adf_gen4_hw_data.c | 235 * mmio write to 32bit CSRs. in adf_gen4_set_ssm_wdtimer()
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/freebsd-src/sys/dev/qat/include/common/ |
H A D | icp_qat_hal.h | 140 #define ICP_QAT_EP_OFFSET_4XXX 0x200000 /* HI MMIO CSRs */
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/freebsd-src/crypto/openssl/ |
H A D | README.md | 48 - creation of X.509 certificates, CSRs and CRLs
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