| /freebsd-src/contrib/bearssl/src/symcipher/ |
| H A D | aes_ct_ctrcbc.c | 139 uint32_t cm0, cm1, cm2, cm3; in br_aes_ct_ctrcbc_mac() local
148 cm2 = br_dec32le((unsigned char *)cbcmac + 8); in br_aes_ct_ctrcbc_mac()
158 q[4] = cm2 ^ br_dec32le(buf + 8); in br_aes_ct_ctrcbc_mac()
167 cm2 = q[4]; in br_aes_ct_ctrcbc_mac()
175 br_enc32le((unsigned char *)cbcmac + 8, cm2); in br_aes_ct_ctrcbc_mac()
193 uint32_t cm0, cm1, cm2, cm3; in br_aes_ct_ctrcbc_encrypt() local
215 cm2 = br_dec32le((unsigned char *)cbcmac + 8); in br_aes_ct_ctrcbc_encrypt()
244 q[5] = cm2; in br_aes_ct_ctrcbc_encrypt()
276 cm2 ^= q[4]; in br_aes_ct_ctrcbc_encrypt()
281 cm2 = q[4] ^ q[5]; in br_aes_ct_ctrcbc_encrypt()
[all …]
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| H A D | aes_ct64_ctrcbc.c | 134 uint32_t cm0, cm1, cm2, cm3; in br_aes_ct64_ctrcbc_mac() local
142 cm2 = br_dec32le((unsigned char *)cbcmac + 8); in br_aes_ct64_ctrcbc_mac()
152 w[2] = cm2 ^ br_dec32le(buf + 8); in br_aes_ct64_ctrcbc_mac()
163 cm2 = w[2]; in br_aes_ct64_ctrcbc_mac()
171 br_enc32le((unsigned char *)cbcmac + 8, cm2); in br_aes_ct64_ctrcbc_mac()
189 uint32_t cm0, cm1, cm2, cm3; in br_aes_ct64_ctrcbc_encrypt() local
212 cm2 = br_dec32le((unsigned char *)cbcmac + 8); in br_aes_ct64_ctrcbc_encrypt()
242 w[6] = cm2; in br_aes_ct64_ctrcbc_encrypt()
278 cm2 ^= w[2]; in br_aes_ct64_ctrcbc_encrypt()
283 cm2 = w[2] ^ w[6]; in br_aes_ct64_ctrcbc_encrypt()
[all …]
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| /freebsd-src/usr.bin/units/ |
| H A D | definitions.units | 663 equivalentphot cd/pi-cm2
664 erg cm2-gm/sec2
714 lambert cd/pi-cm2
716 langley cal/cm2
760 phot lumen/cm2
816 stilb cd/cm2
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| /freebsd-src/sys/arm/ti/omap4/ |
| H A D | omap4_prcm_clks.c | 138 * Address offsets from the CM2 memory region to the top level clock control
167 {"ti,omap4-cm2", (uintptr_t)CM2_INSTANCE},
1086 /* We need the CM_L3INIT_HSUSBTLL_CLKCTRL register in CM2 register set */ in omap4_clk_hsusbhost_activate()
1121 /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ in omap4_clk_hsusbhost_activate()
1195 /* We need the CM_L3INIT_HSUSBTLL_CLKCTRL register in CM2 register set */ in omap4_clk_hsusbhost_deactivate()
1224 /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ in omap4_clk_hsusbhost_deactivate()
1285 /* We need the CM_L3INIT_HSUSBTLL_CLKCTRL register in CM2 register set */ in omap4_clk_hsusbhost_accessible()
1290 /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ in omap4_clk_hsusbhost_accessible()
1342 /* We need the CM_L3INIT_HSUSBHOST_CLKCTRL register in CM2 register set */ in omap4_clk_hsusbhost_set_source()
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| /freebsd-src/sys/contrib/device-tree/Bindings/arm/omap/ |
| H A D | prcm.txt | 19 "ti,omap4-cm2"
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| /freebsd-src/sys/contrib/device-tree/Bindings/cache/ |
| H A D | baikal,bt1-l2-ctl.yaml | 15 tune the MIPS P5600 CM2 L2 cache performance up. In particular it's possible
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| /freebsd-src/sys/contrib/device-tree/Bindings/clock/ |
| H A D | ti-clkctrl.txt | 32 &cm2 {
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| /freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | baikal,bt1-l2-ctl.yaml | 15 tune the MIPS P5600 CM2 L2 cache performance up. In particular it's possible
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| /freebsd-src/contrib/ofed/libibumad/ |
| H A D | umad_sa.h | 118 /* CM2 bits */
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| /freebsd-src/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3566-soquartz-blade.dts | 90 * i2c4 is exposed on CM2 / Module1B - to PI40
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| H A D | rk3566-soquartz-cm4.dts | 94 * i2c4 is exposed on CM2 / Module1B - to PI40
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| H A D | rk3566-soquartz-model-a.dts | 117 * i2c4 is exposed on CM2 / Module1B - to PI40
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| H A D | rk3566-soquartz.dtsi | 442 * i2c4 is exposed on CM2 / Module1B
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| /freebsd-src/sys/arm/ti/ |
| H A D | ti_prcm.c | 107 { "ti,omap4-cm2", TI_OMAP4_CM2 },
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| /freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | omap4-l4.dtsi | 122 cm2: cm2@0 { label
123 compatible = "ti,omap4-cm2", "simple-bus";
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| H A D | omap44xx-clocks.dtsi | 1202 &cm2 {
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| /freebsd-src/crypto/heimdal/lib/wind/ |
| H A D | NormalizationTest.txt | 2225 33A0;33A0;33A0;0063 006D 0032;0063 006D 0032; # (㎠; ㎠; ㎠; cm2; cm2; ) SQUARE CM SQUARED
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