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/llvm-project/llvm/lib/Target/ARM/
H A DARMArchitectures.td1 class Architecture<string fname, string aname, list<SubtargetFeature> features>
3 !strconcat(aname, " architecture"), features>;
9 def ARMv4 : Architecture<"armv4", "ARMv4", []>;
11 def ARMv4t : Architecture<"armv4t", "ARMv4t", [HasV4TOps]>;
13 def ARMv5t : Architecture<"armv5t", "ARMv5t", [HasV5TOps]>;
15 def ARMv5te : Architecture<"armv5te", "ARMv5te", [HasV5TEOps]>;
17 def ARMv5tej : Architecture<"armv5tej", "ARMv5tej", [HasV5TEOps]>;
19 def ARMv6 : Architecture<"armv6", "ARMv6", [HasV6Ops,
22 def ARMv6t2 : Architecture<"armv6t2", "ARMv6t2", [HasV6T2Ops,
25 def ARMv6k : Architecture<"armv6
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/llvm-project/openmp/runtime/cmake/
H A DLibompGetArchitecture.cmake11 # Determine the architecture from predefined compiler macros
12 # The architecture name can only contain alphanumeric characters and underscores (i.e., C identifie…
15 # - Returns the architecture in return_arch
19 #error ARCHITECTURE=mic
21 #error ARCHITECTURE=x86_64
23 #error ARCHITECTURE=i386
25 #error ARCHITECTURE=arm
27 #error ARCHITECTURE=arm
29 #error ARCHITECTURE=arm
31 #error ARCHITECTURE=arm
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/llvm-project/llvm/include/llvm/TextAPI/
H A DArchitecture.h1 //===- llvm/TextAPI/Architecture.h - Architecture ---------------*- C++ -*-===//
9 // Defines the architecture enum and helper methods.
26 /// Defines the architecture slices that are supported by Text-based Stub files.
27 enum Architecture : uint8_t { enum
29 #include "llvm/TextAPI/Architecture.def"
34 /// Convert a CPU Type and Subtype pair to an architecture slice.
35 Architecture getArchitectureFromCpuType(uint32_t CPUType, uint32_t CPUSubType);
37 /// Convert a name to an architecture slice.
38 Architecture getArchitectureFromName(StringRef Name);
40 /// Convert an architecture slice to a string.
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H A DArchitectureSet.h9 // Defines the architecture set.
16 #include "llvm/TextAPI/Architecture.h"
40 ArchitectureSet(Architecture Arch) : ArchitectureSet() { set(Arch); } in ArchitectureSet()
41 ArchitectureSet(const std::vector<Architecture> &Archs);
45 void set(Architecture Arch) { in set()
51 ArchitectureSet clear(Architecture Arch) { in clear()
56 bool has(Architecture Arch) const { in has()
77 using value_type = Architecture;
104 Architecture operator*() const { return static_cast<Architecture>(Index); }
137 ArchitectureSet &operator|=(const Architecture &Arch) {
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/llvm-project/llvm/lib/TextAPI/
H A DArchitecture.cpp1 //===- Architecture.cpp ---------------------------------------------------===//
9 // Implements the architecture helper functions.
13 #include "llvm/TextAPI/Architecture.h"
23 Architecture getArchitectureFromCpuType(uint32_t CPUType, uint32_t CPUSubType) { in getArchitectureFromCpuType()
28 #include "llvm/TextAPI/Architecture.def" in getArchitectureFromCpuType()
34 Architecture getArchitectureFromName(StringRef Name) { in getArchitectureFromName()
35 return StringSwitch<Architecture>(Name) in getArchitectureFromName()
37 #include "llvm/TextAPI/Architecture.def" in getArchitectureFromName()
42 StringRef getArchitectureName(Architecture Arch) { in getArchitectureName()
47 #include "llvm/TextAPI/Architecture.def" in getArchitectureName()
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/llvm-project/llvm/test/tools/llvm-lipo/
H A Dsegalign.test5 # segalign expects an architecture type followed by a hexadecimal value for alignment
10 # CHECK_SMALL_ARM64-NEXT: architecture i386
14 # CHECK_SMALL_ARM64-NEXT: architecture x86_64
18 # CHECK_SMALL_ARM64-NEXT: architecture arm64
25 # CHECK_SMALL_ARM64_NO_SEGALIGN: architecture arm64
36 # CHECK_SMALL_ARMV7-NEXT: architecture armv7
40 # CHECK_SMALL_ARMV7-NEXT: architecture i386
44 # CHECK_SMALL_ARMV7-NEXT: architecture x86_64
52 # CHECK_SMALL_ARMV7_NO_SEGALIGN-NEXT: architecture i386
56 # CHECK_SMALL_ARMV7_NO_SEGALIGN-NEXT: architecture x86_64
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H A Dreplace-universal-binary.test8 # ARMV7_BIG: architecture i386
11 # ARMV7_BIG-NEXT: architecture x86_64
14 # ARMV7_BIG-NEXT: architecture armv7
18 # ARMV7_BIG-NEXT: architecture arm64
30 # ARMV7_ALIGN_SWAP: architecture i386
33 # ARMV7_ALIGN_SWAP-NEXT: architecture armv7
/llvm-project/llvm/docs/CommandGuide/
H A Dllvm-lipo.rst13 …es, extract regular object files from universal binaries, and display architecture information abo…
27 .. option:: -verify_arch <architecture 1> [<architecture 2> ...]
35 Each architecture is separated by a single whitespace.
41 The descriptions include the filename and architecture types separated by whitespace.
44 Non-fat file: <filename> is architecture: <architecture>
48 Take a single universal binary input file and the thin flag followed by an architecture type.
49 Require the output flag to be specified, and output a thin binary of the specified architecture.
59 The replace flag is followed by an architecture type, and a thin input file.
60 Output a universal binary with the specified architecture slice in the
66 The segalign flag is followed by an architecture type, and an alignment.
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/llvm-project/llvm/test/Object/
H A Dnm-universal-binary.test20 CHECK-OBJ: macho-universal.x86_64.i386 (for architecture x86_64):
22 CHECK-OBJ: macho-universal.x86_64.i386 (for architecture i386):
25 CHECK-64-OBJ: macho-universal64.x86_64.i386 (for architecture x86_64):
27 CHECK-64-OBJ: macho-universal64.x86_64.i386 (for architecture i386):
34 CHECK-OBJ-armv7m: error: file: {{.*}} does not contain architecture
36 CHECK-OBJ-foobar: error: for the --arch option: Unknown architecture named 'foobar'
39 CHECK-AR-NEXT: macho-universal-archive.x86_64.i386(hello.o) (for architecture x86_64):
45 CHECK-AR: macho-universal-archive.x86_64.i386(foo.o) (for architecture i386):
50 CHECK-64-AR-NEXT: macho-universal64-archive.x86_64.i386(foo.o) (for architecture i386):
53 CHECK-64-AR: macho-universal64-archive.x86_64.i386(hello.o) (for architecture x86_64):
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/llvm-project/llvm/docs/
H A DCompilerWriterInfo.rst2 Architecture & Platform Information for Compiler Writers
19 * `ARMv8-A Architecture Reference Manual <https://developer.arm.com/docs/ddi0487/latest>`_ This doc…
21 …A Architecture Reference Manual <https://developer.arm.com/docs/ddi0406/latest>`_ This has some us…
23 * `ARMv7-M Architecture Reference Manual <https://developer.arm.com/docs/ddi0403/latest>`_ This cov…
25 * `ARMv6-M Architecture Reference Manual <https://developer.arm.com/docs/ddi0419/latest>`_ This cov…
35 * `Run-time ABI for the ARM Architecture <http://infocenter.arm.com/help/topic/com.arm.doc.ihi0043d…
45 * `Lanai Instruction Set Architecture <http://g.co/lanai/isa>`_
51 * `MIPS Processor Architecture <https://www.mips.com/products/>`_
61 * `Power Instruction Set Architecture, Version 3.0B <https://openpowerfoundation.org/?resource_lib=…
65 * `Power Instruction Set Architecture, Version 2.07B <https://openpowerfoundation.org/?resource_lib…
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/llvm-project/lldb/include/lldb/Utility/
H A DArchSpec.h24 /// \class ArchSpec ArchSpec.h "lldb/Utility/ArchSpec.h" An architecture
29 /// of strings to architecture enumeration values confined to this class
30 /// allows new architecture support to be added easily.
301 /// Constructor over architecture name.
304 /// type and architecture name.
319 /// Returns a static string representing the current architecture.
322 /// architecture.
325 /// if MIPS architecture return true.
330 /// Returns a string representing current architecture as a target CPU for
334 /// architecture
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/llvm-project/openmp/runtime/
H A DCMakeLists.txt28 # Determine the target architecture
30 # If adding a new architecture, take a look at cmake/LibompGetArchitecture.cmake
33 …"The architecture to build for (x86_64/i386/arm/ppc/ppc64/ppc64le/aarch64/aarch64_32/mic/mips/mips…
39 # Determine the native architecture from LLVM.
104 …Intel(R) Many Integrated Core Architecture (Intel(R) MIC Architecture) (knf/knc). Ignored if not …
170 # Architecture
189 if("${LIBOMP_ARCH}" STREQUAL "i386" OR "${LIBOMP_ARCH}" STREQUAL "32") # IA-32 architecture
191 …f("${LIBOMP_ARCH}" STREQUAL "x86_64" OR "${LIBOMP_ARCH}" STREQUAL "32e") # Intel(R) 64 architecture
193 elseif("${LIBOMP_ARCH}" STREQUAL "arm") # ARM architecture
195 elseif("${LIBOMP_ARCH}" STREQUAL "ppc") # PPC32 architecture
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H A DREADME.txt48 * IA-32 architecture
49 * Intel(R) 64 architecture
50 * Intel(R) Many Integrated Core Architecture
51 * ARM* architecture
52 * Aarch64 (64-bit ARM) architecture
53 * IBM(R) Power architecture (big endian)
54 * IBM(R) Power architecture (little endian)
55 * MIPS and MIPS64 architecture
56 * RISCV64 architecture
57 * LoongArch64 architecture
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/llvm-project/lldb/include/lldb/Symbol/
H A DObjectContainer.h36 /// more than one architecture or object.
47 /// Gets the architecture given an index.
49 /// Copies the architecture specification for index \a idx.
52 /// The architecture index to extract.
55 /// A architecture object that will be filled in if \a idx is a
56 /// architecture valid index.
89 /// single architecture. ObjectContainer instances that contain more than
90 /// one architecture should override this function and return an appropriate
110 /// Selects an architecture in an object file.
112 /// Object files that contain a single architecture should verify that the
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/llvm-project/llvm/test/tools/llvm-nm/
H A Dtapi-files.test19 V1: /u/l/libfoo.dylib (for architecture armv7):
21 V1: /u/l/libfoo.dylib (for architecture armv7s):
24 V2: /u/l/libfoo.dylib (for architecture armv7):
28 V2: /u/l/libfoo.dylib (for architecture armv7s):
32 V2: /u/l/libfoo.dylib (for architecture arm64):
38 V3: /usr/lib/libfoo.dylib (for architecture x86_64):
47 V3: /usr/lib/liba.dylib (for architecture x86_64):
57 V4: /u/l/libFoo.dylib (for architecture i386):
62 V4: /u/l/libFoo.dylib (for architecture x86_64):
66 V4-WATCH: /u/l/libFoo.dylib (for architecture armv7k)
[all …]
/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonDepArch.td11 def ArchV5: SubtargetFeature<"v5", "HexagonArchVersion", "Hexagon::ArchEnum::V5", "Enable Hexagon V5 architecture">;
13 def ArchV55: SubtargetFeature<"v55", "HexagonArchVersion", "Hexagon::ArchEnum::V55", "Enable Hexagon V55 architecture">;
15 def ArchV60: SubtargetFeature<"v60", "HexagonArchVersion", "Hexagon::ArchEnum::V60", "Enable Hexagon V60 architecture">;
17 def ArchV62: SubtargetFeature<"v62", "HexagonArchVersion", "Hexagon::ArchEnum::V62", "Enable Hexagon V62 architecture">;
19 def ArchV65: SubtargetFeature<"v65", "HexagonArchVersion", "Hexagon::ArchEnum::V65", "Enable Hexagon V65 architecture">;
21 def ArchV66: SubtargetFeature<"v66", "HexagonArchVersion", "Hexagon::ArchEnum::V66", "Enable Hexagon V66 architecture">;
23 def ArchV67: SubtargetFeature<"v67", "HexagonArchVersion", "Hexagon::ArchEnum::V67", "Enable Hexagon V67 architecture">;
25 def ArchV68: SubtargetFeature<"v68", "HexagonArchVersion", "Hexagon::ArchEnum::V68", "Enable Hexagon V68 architecture">;
27 def ArchV69: SubtargetFeature<"v69", "HexagonArchVersion", "Hexagon::ArchEnum::V69", "Enable Hexagon V69 architecture">;
29 def ArchV71: SubtargetFeature<"v71", "HexagonArchVersion", "Hexagon::ArchEnum::V71", "Enable Hexagon V71 architecture">;
[all...]
/llvm-project/offload/
H A DREADME.txt12 * Intel(R) 64 architecture
13 * IBM(R) Power architecture (big endian)
14 * IBM(R) Power architecture (little endian)
15 * ARM(R) AArch64 architecture (little endian)
18 * Intel(R) or AMD(R) 64-bit architecture (x86_64)
19 * IBM(R) Power architecture (big endian)
20 * IBM(R) Power architecture (little endian)
21 * ARM(R) AArch64 architecture (little endian)
/llvm-project/libc/docs/
H A Dporting.rst4 Bringup on a New OS or Architecture
14 If you are contributing a port for an operating system or architecture which
46 Architecture Subdirectory
54 bring up the libc for one architecture at a time. In such cases, wherein the
55 support surface of LLVM's libc differs for each target architecture, one will
57 system) for each target architecture, and list the relevant config information
63 architecture.
72 architecture specific bring up, then an ``entrypoints.txt`` file should be
73 created in the architecture subdirectory for each architecture
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/llvm-project/llvm/include/llvm/TargetParser/
H A DAArch64TargetParser.h51 // Typically these correspond to Arm Architecture extensions, unlike
61 // Architecture, e.g. FEAT_AdvSIMD.
76 std::optional<ArchExtKind> ID; // The architecture extension to enable. in FMVInfo()
84 // Represents a dependency between two architecture extensions. Later is the
85 // feature which was added to the architecture after Earlier, and expands the
98 // Information about a specific architecture, e.g. V8.1-A
100 VersionTuple Version; // Architecture version, major + minor.
114 // Defines the following partial order, indicating when an architecture is
122 // features to enable for a given architecture. See
139 // True if this architecture i in implies()
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/llvm-project/clang/test/SemaObjC/
H A Dsizeof-interface.m24 …or {{application of 'sizeof' to interface 'I0' is not supported on this architecture and platform}}
33 …or {{application of 'sizeof' to interface 'I0' is not supported on this architecture and platform}}
44 …); } I1_defs; // expected-error {{use of @defs is not supported on this architecture and platform}}
51 …tic on pointer to interface 'I0', which is not a constant size for this architecture and platform}}
52 …tic on pointer to interface 'I0', which is not a constant size for this architecture and platform}}
53 …tic on pointer to interface 'I0', which is not a constant size for this architecture and platform}}
64 …ror {{application of 'sizeof' to interface 'I' is not supported on this architecture and platform}}
85 …ic on pointer to interface 'Foo', which is not a constant size for this architecture and platform}}
86 …ic on pointer to interface 'Foo', which is not a constant size for this architecture and platform}}
/llvm-project/lldb/packages/Python/lldbsuite/test/builders/
H A Dbuilder.py18 """Returns the architecture in effect the test suite is running with."""
28 """Returns the triple for the given architecture or None."""
38 def getArchCFlags(self, architecture):
95 def getArchSpec(self, architecture):
97 Helper function to return the key-value string to specify the architecture
100 return ["ARCH=" + architecture] if architecture else []
261 architecture=None,
277 self.getArchCFlags(architecture),
278 self.getArchSpec(architecture),
35 getArchCFlags(self, architecture) global() argument
92 getArchSpec(self, architecture) global() argument
163 getBuildCommand( self, debug_info, architecture=None, compiler=None, dictionary=None, testdir=None, testname=None, make_targets=None, ) global() argument
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/llvm-project/llvm/test/MC/RISCV/
H A Dattribute-with-option.s1 ## When a user specifies an architecture extension which conflicts with an
2 ## architecture attribute, we use the architecture attribute instead of the
6 ## there is an architecture attribute in the file to specify rv32i. We will
17 ## Check that the architecture attribute is not overridden by the command line
/llvm-project/llvm/test/MC/Hexagon/
H A Dhvx-swapped-regpairs.s9 # CHECK-V65: error: register pair `WR0' is not permitted for this architecture
14 # CHECK-V65: error: register pair `WR0' is not permitted for this architecture
19 # CHECK-V65: error: register pair `WR0' is not permitted for this architecture
33 # CHECK-V65: error: register pair `WR0' is not permitted for this architecture
42 # CHECK-V65: error: register pair `WR0' is not permitted for this architecture
43 # CHECK-V65: error: register pair `WR1' is not permitted for this architecture
/llvm-project/lldb/source/Plugins/Process/Linux/
H A DNativeRegisterContextLinux.h37 // Determine the architecture of the thread given by its ID.
44 /// The syscall instruction. If the architecture uses software
55 /// Return architecture-specific data needed to make inferior syscalls, if
61 // relevant architecture.
65 /// Return the architecture-specific data needed to make mmap syscalls, if
76 /// Return architecture specific data needed to use memory tags,
82 "Architecture does not support memory tagging"); in GetMemoryTaggingDetails()
136 // Determine the architecture via GPR size, as reported by
/llvm-project/llvm/test/tools/llvm-objdump/MachO/
H A Darchive-headers.test9 CHECK: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture x86_64)
12 CHECK: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture i386)
16 OFFSETS: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture x86_64)
19 OFFSETS: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture i386)
23 NON-VERBOSE: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture x86_64)
26 NON-VERBOSE: Archive : {{.*}}/macho-universal-archive.x86_64.i386 (architecture i386)

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