Address (full) in projects: freebsd-src

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Searched full:address (Results 1 – 25 of 11671) sorted by relevance

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/freebsd-src/contrib/llvm-project/lldb/include/lldb/Core/
H A D	Address.h	1 //===-- Address.h ------------------------------------------------ C++ --===// 35 /// \class Address Address.h "lldb/Core/Address.h" 36 /// A section + offset based address class. 38 /// The Address class allows addresses to be relative to a section that can 51 /// line tables, function address ranges, lexical block and inlined subroutine 52 /// address ranges, global and static variables) each time an image is loaded 62 class Address { 64 /// Dump styles allow the Address::Dump(Stream *,DumpStyle) const function 65 /// to display Address contents in a variety of ways. 71 /// // address for printf in libSystem.B.dylib as a section name + offset [all …]
H A D	AddressRange.h	12 #include "lldb/Core/Address.h" 24 /// A section + offset based address range class. 35 /// Initialize the address with the supplied \a section, \a offset and \a 40 /// address doesn't have a section or will get resolved later. 46 /// The size in bytes of the address range. 50 /// Construct with a virtual address, section list and byte size. 52 /// Initialize and resolve the address with the supplied virtual address \a 56 /// A virtual address. 59 /// The size in bytes of the address rang [all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/
H A D	XCoreDisassembler.cpp	`39 ArrayRef<uint8_t> Bytes, uint64_t Address, 44 static bool readInstruction16(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction16() argument 56 static bool readInstruction32(ArrayRef<uint8_t> Bytes, uint64_t Address, in readInstruction32() argument 75 uint64_t Address, 79 uint64_t Address, 83 uint64_t Address, 87 uint64_t Address, 91 uint64_t Address, 95 uint64_t Address, 99 uint64_t Address, [all …]`
/freebsd-src/sys/dev/aic7xxx/
H A D	aic79xx.reg	`82 * Controls which of the 5, 512byte, address spaces should be used 87 address 0x000 101 address 0x001 118 address 0x002 197 address 0x003 213 address 0x004 228 address 0x004 244 address 0x005 260 address 0x006 269 address 0x008 [all …]`
H A D	aic7xxx.reg	`56 address 0x000 73 address 0x001 89 address 0x002 105 address 0x003 136 address 0x003 166 address 0x004 182 address 0x005 204 address 0x006 209 address 0x007 221 address 0x008 [all …]`
/freebsd-src/sys/contrib/device-tree/src/arm/aspeed/
H A D	aspeed-bmc-facebook-cmm.dts	`333 #address-cells = <1>; 340 #address-cells = <1>; 346 #address-cells = <1>; 352 #address-cells = <1>; 357 #address-cells = <1>; 362 #address-cells = <1>; 367 #address-cells = <1>; 372 #address-cells = <1>; 377 #address-cells = <1>; 382 #address-cells = <1>; [all …]`
H A D	aspeed-bmc-facebook-fuji.dts	`238 #address-cells = <1>; 244 #address-cells = <1>; 251 #address-cells = <1>; 258 #address-cells = <1>; 264 #address-cells = <1>; 270 #address-cells = <1>; 276 #address-cells = <1>; 282 #address-cells = <1>; 288 #address-cells = <1>; 294 #address-cells = <1>; [all …]`
H A D	aspeed-bmc-facebook-minipack.dts	`248 #address-cells = <1>; 298 #address-cells = <1>; 349 #address-cells = <1>; 355 #address-cells = <1>; 361 #address-cells = <1>; 367 #address-cells = <1>; 373 #address-cells = <1>; 379 #address-cells = <1>; 385 #address-cells = <1>; 391 #address-cells = <1>; [all …]`
H A D	ibm-power10-quad.dtsi	`10 #address-cells = <2>; 15 #address-cells = <1>; 27 #address-cells = <1>; 38 #address-cells = <2>; 43 #address-cells = <1>; 55 #address-cells = <1>; 66 #address-cells = <2>; 71 #address-cells = <1>; 83 #address-cells = <1>; 94 #address-cells = <2>; [all …]`
H A D	aspeed-bmc-facebook-cloudripper.dts	`137 #address-cells = <1>; 143 #address-cells = <1>; 149 #address-cells = <1>; 155 #address-cells = <1>; 161 #address-cells = <1>; 167 #address-cells = <1>; 173 #address-cells = <1>; 179 #address-cells = <1>; 185 #address-cells = <1>; 199 #address-cells = <1>; [all …]`
/freebsd-src/crypto/heimdal/lib/krb5/
H A D	addr_families.c	70 return krb5_data_copy(&a->address, buf, 4); in ipv4_sockaddr2addr() 92 memcpy (&tmp.sin_addr, a->address.data, 4); in ipv4_addr2sockaddr() 122 return krb5_data_copy(&a->address, buf, 4); in ipv4_h_addr2addr() 169 memcpy (&ia, addr->address.data, 4); in ipv4_print_addr() 175 ipv4_parse_addr (krb5_context context, const char address, krb5_address addr) in ipv4_parse_addr() argument 180 p = strchr(address, ':'); in ipv4_parse_addr() 183 if(strncasecmp(address, "ip:", p - address) != 0 && in ipv4_parse_addr() 184 strncasecmp(address, "ip4:", p - address) != 0 && in ipv4_parse_addr() 185 strncasecmp(address, "ipv4:", p - address) != 0 && in ipv4_parse_addr() 186 strncasecmp(address, "inet:", p - address) != 0) in ipv4_parse_addr() [all …]
/freebsd-src/crypto/heimdal/doc/doxyout/krb5/man/man3/
H A D	krb5_address.3	1 .TH "Heimdal Kerberos 5 address functions" 3 "11 Jan 2012" "Version 1.5.2" "HeimdalKerberos5library… 5 Heimdal Kerberos 5 address functions \- 49 …rb5_error_code KRB5_LIB_CALL \fBkrb5_free_address\fP (krb5_context context, krb5_address *address)" 77 …l, it will contain the actual length of the address. In case of the sa is too small to fit the who… 83 \fIaddr\fP the address to copy the from 87 …\fP pointer to length of sa, and after the call, it will contain the actual length of the address. 94 Return an error code or 0. Will return KRB5_PROG_ATYPE_NOSUPP in case address type is not supported… 106 \fIaddr1\fP address to compare 108 \fIaddr2\fP address to compare 113 Return an TRUE is the address are the same FALSE if not [all …]
/freebsd-src/sys/contrib/device-tree/Bindings/regulator/
H A D	ti-abb-regulator.txt	9 - reg: Address and length of the register set for the device. It contains 12 - "base-address" - contains base address of ABB module (ti,abb-v1,ti,abb-v2) 13 - "control-address" - contains control register address of ABB module (ti,abb-v3) 14 - "setup-address" - contains setup register address of ABB module (ti,abb-v3) 15 - "int-address" - contains address of interrupt register for ABB module 17 - #address-cells: should be 0 47 - "efuse-address" - Contains efuse base address used to pick up ABB info. 48 - "ldo-address" - Contains address of ABB LDO override register. 49 "efuse-address" is required for this. 50 - ti,ldovbb-vset-mask - Required if ldo-address is set, mask for LDO override [all …]
/freebsd-src/contrib/llvm-project/llvm/include/llvm/DebugInfo/GSYM/
H A D	GsymReader.h	35 /// the host system. The Header, address table, address info offsets, and file 91 /// Get the full function info for an address. 94 /// FunctionInfo for a given address. For one off lookups, use the lookup() 98 /// info for a given address and cache it if the process stays around to 102 /// \param Addr A virtual address from the orignal object file to lookup. 106 /// address. 109 /// Get the full function info given an address index. 111 /// \param AddrIdx A address index for an address in the address table. 118 /// Lookup an address in the a GSYM. 120 /// Lookup just the information needed for a specific address \a Addr. This [all …]
/freebsd-src/sbin/dhclient/
H A D	dhcp-options.5	`70 .Ar ip-address 71 data type can be entered either as an explicit IP address 76 A domain name must resolve to a single IP address. 156 .It Ic option subnet-mask Ar ip-address ; 163 which an address is being assigned. 166 subnet-mask option declaration that is in scope for the address being 174 .Ic option routers Ar ip-address 175 .Oo , Ar ip-address ... Oc ; 182 .Ic option time-servers Ar ip-address 183 .Oo , Ar ip-address ... Oc ; [all …]`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A D	ARMDisassembler.cpp	146 ArrayRef<uint8_t> Bytes, uint64_t Address, 150 uint64_t Address) const override; 154 ArrayRef<uint8_t> Bytes, uint64_t Address, 158 ArrayRef<uint8_t> Bytes, uint64_t Address, 177 uint64_t Address, 180 uint64_t Address, 183 uint64_t Address, 186 uint64_t Address, 190 uint64_t Address, 193 uint64_t Address, 714 checkDecodedInstruction(MCInst & MI,uint64_t & Size,uint64_t Address,raw_ostream & CS,uint32_t Insn,DecodeStatus Result) checkDecodedInstruction() argument 774 getInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getInstruction() argument 783 getARMInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getARMInstruction() argument 856 tryAddingSymbolicOperand(uint64_t Address,int32_t Value,bool isBranch,uint64_t InstSize,MCInst & MI,const MCDisassembler * Decoder) tryAddingSymbolicOperand() argument 875 tryAddingPcLoadReferenceComment(uint64_t Address,int Value,const MCDisassembler * Decoder) tryAddingPcLoadReferenceComment() argument 1069 getThumbInstruction(MCInst & MI,uint64_t & Size,ArrayRef<uint8_t> Bytes,uint64_t Address,raw_ostream & CS) const getThumbInstruction() argument 1294 DecodeGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRRegisterClass() argument 1305 DecodeCLRMGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCLRMGPRRegisterClass() argument 1319 DecodeGPRnopcRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRnopcRegisterClass() argument 1332 DecodeGPRnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRnospRegisterClass() argument 1345 DecodeGPRwithAPSRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithAPSRRegisterClass() argument 1360 DecodeGPRwithZRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithZRRegisterClass() argument 1378 DecodeGPRwithZRnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithZRnospRegisterClass() argument 1388 DecodetGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPRRegisterClass() argument 1401 DecodeGPRPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRPairRegisterClass() argument 1419 DecodeGPRPairnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRPairnospRegisterClass() argument 1433 DecodeGPRspRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRspRegisterClass() argument 1444 DecodetcGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetcGPRRegisterClass() argument 1475 DecoderGPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecoderGPRRegisterClass() argument 1501 DecodeSPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeSPRRegisterClass() argument 1512 DecodeHPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeHPRRegisterClass() argument 1529 DecodeDPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPRRegisterClass() argument 1545 DecodeDPR_8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPR_8RegisterClass() argument 1553 DecodeSPR_8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeSPR_8RegisterClass() argument 1561 DecodeDPR_VFP2RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPR_VFP2RegisterClass() argument 1576 DecodeQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeQPRRegisterClass() argument 1597 DecodeDPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPairRegisterClass() argument 1619 DecodeDPairSpacedRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDPairSpacedRegisterClass() argument 1630 DecodePredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePredicateOperand() argument 1650 DecodeCCOutOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeCCOutOperand() argument 1660 DecodeSORegImmOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegImmOperand() argument 1698 DecodeSORegRegOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegRegOperand() argument 1734 DecodeRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRegListOperand() argument 1782 DecodeSPRRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSPRRegListOperand() argument 1807 DecodeDPRRegListOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeDPRRegListOperand() argument 1833 DecodeBitfieldMaskOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBitfieldMaskOperand() argument 1861 DecodeCopMemInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCopMemInstruction() argument 2040 DecodeAddrMode2IdxInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode2IdxInstruction() argument 2146 DecodeSORegMemOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeSORegMemOperand() argument 2190 DecodeTSBInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTSBInstruction() argument 2203 DecodeAddrMode3Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode3Instruction() argument 2395 DecodeRFEInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeRFEInstruction() argument 2425 DecodeQADDInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeQADDInstruction() argument 2450 DecodeMemMultipleWritebackInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMemMultipleWritebackInstruction() argument 2542 DecodeHINTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeHINTInstruction() argument 2565 DecodeCPSInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCPSInstruction() argument 2613 DecodeT2CPSInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2CPSInstruction() argument 2656 DecodeT2HintSpaceInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2HintSpaceInstruction() argument 2681 DecodeT2MOVTWInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2MOVTWInstruction() argument 2706 DecodeArmMOVTWInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeArmMOVTWInstruction() argument 2734 DecodeSMLAInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSMLAInstruction() argument 2763 DecodeTSTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTSTInstruction() argument 2785 DecodeSETPANInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSETPANInstruction() argument 2814 DecodeAddrModeImm12Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrModeImm12Operand() argument 2835 DecodeAddrMode5Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode5Operand() argument 2856 DecodeAddrMode5FP16Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode5FP16Operand() argument 2877 DecodeAddrMode7Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode7Operand() argument 2883 DecodeT2BInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2BInstruction() argument 2910 DecodeBranchImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeBranchImmInstruction() argument 2940 DecodeAddrMode6Operand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeAddrMode6Operand() argument 2958 DecodeVLDInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDInstruction() argument 3235 DecodeVLDST1Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST1Instruction() argument 3249 DecodeVLDST2Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST2Instruction() argument 3265 DecodeVLDST3Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST3Instruction() argument 3279 DecodeVLDST4Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLDST4Instruction() argument 3290 DecodeVSTInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSTInstruction() argument 3561 DecodeVLD1DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD1DupInstruction() argument 3609 DecodeVLD2DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD2DupInstruction() argument 3658 DecodeVLD3DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD3DupInstruction() argument 3694 DecodeVLD4DupInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD4DupInstruction() argument 3747 DecodeVMOVModImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVModImmInstruction() argument 3793 DecodeMVEModImmInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEModImmInstruction() argument 3822 DecodeMVEVADCInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVADCInstruction() argument 3848 DecodeVSHLMaxInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSHLMaxInstruction() argument 3868 DecodeShiftRight8Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight8Imm() argument 3875 DecodeShiftRight16Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight16Imm() argument 3882 DecodeShiftRight32Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight32Imm() argument 3889 DecodeShiftRight64Imm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeShiftRight64Imm() argument 3896 DecodeTBLInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeTBLInstruction() argument 3933 DecodeThumbAddSpecialReg(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSpecialReg() argument 3958 DecodeThumbBROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBROperand() argument 3967 DecodeT2BROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2BROperand() argument 3976 DecodeThumbCmpBROperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbCmpBROperand() argument 3985 DecodeThumbAddrModeRR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeRR() argument 4001 DecodeThumbAddrModeIS(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeIS() argument 4016 DecodeThumbAddrModePC(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModePC() argument 4027 DecodeThumbAddrModeSP(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddrModeSP() argument 4036 DecodeT2AddrModeSOReg(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeSOReg() argument 4066 DecodeT2LoadShift(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadShift() argument 4150 DecodeT2LoadImm8(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadImm8() argument 4235 DecodeT2LoadImm12(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadImm12() argument 4315 DecodeT2LoadT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadT() argument 4355 DecodeT2LoadLabel(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LoadLabel() argument 4408 DecodeT2Imm8S4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm8S4() argument 4422 DecodeT2Imm7S4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm7S4() argument 4438 DecodeT2AddrModeImm8s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm8s4() argument 4454 DecodeT2AddrModeImm7s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm7s4() argument 4470 DecodeT2AddrModeImm0_1020s4(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm0_1020s4() argument 4485 DecodeT2Imm8(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm8() argument 4498 DecodeT2Imm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Imm7() argument 4513 DecodeT2AddrModeImm8(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm8() argument 4561 DecodeTAddrModeImm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeTAddrModeImm7() argument 4578 DecodeT2AddrModeImm7(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm7() argument 4596 DecodeT2LdStPre(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LdStPre() argument 4658 DecodeT2AddrModeImm12(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddrModeImm12() argument 4685 DecodeThumbAddSPImm(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSPImm() argument 4697 DecodeThumbAddSPReg(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbAddSPReg() argument 4723 DecodeThumbCPS(MCInst & Inst,uint16_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbCPS() argument 4735 DecodePostIdxReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodePostIdxReg() argument 4749 DecodeMveAddrModeRQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveAddrModeRQ() argument 4765 DecodeMveAddrModeQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveAddrModeQ() argument 4788 DecodeThumbBLXOffset(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBLXOffset() argument 4813 DecodeCoprocessor(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeCoprocessor() argument 4829 DecodeThumbTableBranch(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbTableBranch() argument 4847 DecodeThumb2BCCInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeThumb2BCCInstruction() argument 4889 DecodeT2SOImm(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2SOImm() argument 4921 DecodeThumbBCCTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBCCTargetOperand() argument 4930 DecodeThumbBLTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeThumbBLTargetOperand() argument 4954 DecodeMemBarrierOption(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMemBarrierOption() argument 4964 DecodeInstSyncBarrierOption(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeInstSyncBarrierOption() argument 4973 DecodeMSRMask(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMSRMask() argument 5075 DecodeBankedReg(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBankedReg() argument 5091 DecodeDoubleRegLoad(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDoubleRegLoad() argument 5113 DecodeDoubleRegStore(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeDoubleRegStore() argument 5139 DecodeLDRPreImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLDRPreImm() argument 5165 DecodeLDRPreReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLDRPreReg() argument 5193 DecodeSTRPreImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSTRPreImm() argument 5219 DecodeSTRPreReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSTRPreReg() argument 5244 DecodeVLD1LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD1LN() argument 5311 DecodeVST1LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST1LN() argument 5376 DecodeVLD2LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD2LN() argument 5443 DecodeVST2LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST2LN() argument 5506 DecodeVLD3LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD3LN() argument 5576 DecodeVST3LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST3LN() argument 5639 DecodeVLD4LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVLD4LN() argument 5720 DecodeVST4LN(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVST4LN() argument 5792 DecodeVMOVSRR(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVSRR() argument 5818 DecodeVMOVRRS(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVMOVRRS() argument 5844 DecodeIT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeIT() argument 5874 DecodeT2LDRDPreInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2LDRDPreInstruction() argument 5911 DecodeT2STRDPreInstruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2STRDPreInstruction() argument 5945 DecodeT2Adr(MCInst & Inst,uint32_t Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2Adr() argument 5972 DecodeT2ShifterImmOperand(MCInst & Inst,uint32_t Val,uint64_t Address,const MCDisassembler * Decoder) DecodeT2ShifterImmOperand() argument 5982 DecodeSwap(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSwap() argument 6009 DecodeVCVTD(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTD() argument 6068 DecodeVCVTQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTQ() argument 6129 DecodeNEONComplexLane64Instruction(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeNEONComplexLane64Instruction() argument 6160 DecodeLDR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeLDR() argument 6188 DecoderForMRRC2AndMCRR2(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecoderForMRRC2AndMCRR2() argument 6234 DecodeForVMRSandVMSR(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeForVMRSandVMSR() argument 6286 DecodeBFLabelOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBFLabelOperand() argument 6305 DecodeBFAfterTargetOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeBFAfterTargetOperand() argument 6317 DecodePredNoALOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePredNoALOperand() argument 6325 DecodeLOLoop(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeLOLoop() argument 6388 DecodeLongShiftOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeLongShiftOperand() argument 6401 DecodetGPROddRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPROddRegisterClass() argument 6412 DecodetGPREvenRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodetGPREvenRegisterClass() argument 6424 DecodeGPRwithAPSR_NZCVnospRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGPRwithAPSR_NZCVnospRegisterClass() argument 6440 DecodeVSCCLRM(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeVSCCLRM() argument 6467 DecodeMQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQPRRegisterClass() argument 6483 DecodeMQQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQQPRRegisterClass() argument 6499 DecodeMQQQQPRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeMQQQQPRRegisterClass() argument 6510 DecodeVPTMaskOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVPTMaskOperand() argument 6541 DecodeVpredROperand(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVpredROperand() argument 6554 DecodeVpredNOperand(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVpredNOperand() argument 6565 DecodeRestrictedIPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedIPredicateOperand() argument 6572 DecodeRestrictedSPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedSPredicateOperand() argument 6594 DecodeRestrictedUPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedUPredicateOperand() argument 6601 DecodeRestrictedFPPredicateOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeRestrictedFPPredicateOperand() argument 6632 DecodeVCVTImmOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVCVTImmOperand() argument 6676 DecodeVSTRVLDR_SYSREG(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeVSTRVLDR_SYSREG() argument 6719 DecodeMVE_MEM_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder,unsigned Rn,OperandDecoder RnDecoder,OperandDecoder AddrDecoder) DecodeMVE_MEM_pre() argument 6740 DecodeMVE_MEM_1_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_1_pre() argument 6750 DecodeMVE_MEM_2_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_2_pre() argument 6760 DecodeMVE_MEM_3_pre(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVE_MEM_3_pre() argument 6770 DecodePowerTwoOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodePowerTwoOperand() argument 6783 DecodeMVEPairVectorIndexOperand(MCInst & Inst,unsigned Val,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEPairVectorIndexOperand() argument 6793 DecodeMVEVMOVQtoDReg(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVMOVQtoDReg() argument 6817 DecodeMVEVMOVDRegtoQ(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVMOVDRegtoQ() argument 6843 DecodeMVEOverlappingLongShift(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEOverlappingLongShift() argument 6923 DecodeMVEVCVTt1fp(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVCVTt1fp() argument 6943 DecodeMVEVCMP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVCMP() argument 6980 DecodeMveVCTP(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMveVCTP() argument 6991 DecodeMVEVPNOT(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeMVEVPNOT() argument 7000 DecodeT2AddSubSPImm(MCInst & Inst,unsigned Insn,uint64_t Address,const MCDisassembler * Decoder) DecodeT2AddSubSPImm() argument [all...]
/freebsd-src/contrib/openbsm/man/
H A D	audit.log.5	79 .Bl -column -offset 3n ".No Terminal Address Type/Length" ".No N bytes + 1 NUL" 101 .Bl -column -offset 3n ".No Terminal Address Type/Length" ".No N bytes + 1 NUL" 116 token, with the addition of a machine IPv4 or IPv6 address. 125 .Bl -column -offset 3n ".No Terminal Address Type/Length" ".No N bytes + 1 NUL" 132 .It "Address Type/Length 1 byte Host address type and length" 133 .It "Machine Address 4/16 bytes IPv4 or IPv6 address" 147 .Bl -column -offset 3n ".No Terminal Address Type/Length" ".No N bytes + 1 NUL" 167 .Bl -column -offset 3n ".No Terminal Address Type/Length" ".No N bytes + 1 NUL" 178 token holds a network byte order IPv4 address. 183 for an IPv4 address. [all …]
/freebsd-src/share/man/man4/
H A D	stf.4	82 valid 6to4 address needs to be configured to the interface. 83 .Dq A valid 6to4 address 84 is an address which has the following properties. 95 is a hexadecimal notation of an IPv4 address for the node. 96 IPv4 address can be taken from any of interfaces your node has. 97 Since the specification forbids the use of IPv4 private address, 98 the address needs to be a global IPv4 address. 104 are properly filled to avoid address collisions. 108 the prefix length for the IPv6 interface address needs to be 16 so that 115 interface will check the IPv4 source address on packets, [all …]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/
H A D	SystemZDisassembler.cpp	36 ArrayRef<uint8_t> Bytes, uint64_t Address, 61 /// @param Address - The starting address of the instruction 67 /// immediate in the instruction using the Address, Offset and Width. If that 75 uint64_t Address, uint64_t Offset, in tryAddingSymbolicOperand() argument 78 return Decoder->tryAddingSymbolicOperand(MI, Value, Address, IsBranch, Offset, in tryAddingSymbolicOperand() 98 uint64_t Address, in DecodeGR32BitRegisterClass() argument 104 uint64_t Address, in DecodeGRH32BitRegisterClass() argument 110 uint64_t Address, in DecodeGR64BitRegisterClass() argument 116 uint64_t Address, in DecodeGR128BitRegisterClass() argument 122 DecodeADDR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, uint64_t Address, in DecodeADDR32BitRegisterClass() argument [all …]
/freebsd-src/contrib/llvm-project/clang/lib/CodeGen/
H A D	Address.h	`1 //===-- Address.h - An aligned address -------------------------- C++ --===// 27 class Address; 35 /// An abstract representation of an aligned address. This is designed to be an in Address() function 37 /// operations on an address like loads and stores. In particular, it doesn't 59 inline RawAddress(Address Addr); in getType() 76 /// Return the type of the values stored in this address. 82 /// Return the address space that this address resides in. 98 /// Return address wit [all...]`
/freebsd-src/contrib/llvm-project/lldb/source/Core/
H A D	Address.cpp	1 //===-- Address.cpp -------------------------------------------------------===// 9 #include "lldb/Core/Address.h" 64 const Address &address, void dst, size_t dst_len) { in ReadBytes() argument 72 return target_sp->ReadMemory(address, dst, dst_len, error, in ReadBytes() 79 const Address &address, in GetByteOrderAndAddressSize() argument 94 ModuleSP module_sp(address.GetModule()); in GetByteOrderAndAddressSize() 104 const Address &address, uint32_ in ReadUIntMax64() argument 128 ReadAddress(ExecutionContextScope exe_scope,const Address & address,uint32_t pointer_size,Address & deref_so_addr) ReadAddress() argument 164 DumpUInt(ExecutionContextScope * exe_scope,const Address & address,uint32_t byte_size,Stream * strm) DumpUInt() argument 193 ReadCStringFromMemory(ExecutionContextScope * exe_scope,const Address & address,Stream * strm) ReadCStringFromMemory() argument 235 Address::Address(lldb::addr_t abs_addr) : m_section_wp(), m_offset(abs_addr) {} Address() function in Address 237 Address(addr_t address,const SectionList * section_list) Address() argument [all...]
/freebsd-src/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/
H A D	DWARFDebugRangeList.h	27 /// A beginning address offset. This address offset has the size of an 28 /// address and is relative to the applicable base address of the 30 /// of an address range. 32 /// An ending address offset. This address offset again has the size of 33 /// an address and is relative to the applicable base address of the 35 /// address past the end of the address range. The ending address must 36 /// be greater than or equal to the beginning address. 42 /// which consists of a 0 for the beginning address offset 43 /// and a 0 for the ending address offset. 48 /// A base address selection entry consists of: [all …]
/freebsd-src/share/man/man9/
H A D	sglist.9	114 API manages physical address ranges. 116 Each element contains a starting physical address and a length. 148 the physical address ranges mapped by a single kernel virtual address range. 149 The kernel virtual address range starts at 169 the physical address ranges of a buffer backed by an array of virtual memory 181 address ranges mapped by a single kernel virtual address range. 182 The kernel virtual address range starts at 233 family of routines can be used to append the physical address range [all...]
/freebsd-src/bin/ed/
H A D	ed.1	`126 .Op Ar address Op , Ar address 131 The address(es) indicate the line or range of lines to be affected by the 167 An address represents the number of a line in the buffer. 171 .Em current address 173 typically supplied to commands as the default address when none is specified. 174 When a file is first read, the current address is set to the last line 176 In general, the current address is set to the last line 179 A line address is 190 relative to the current address. 193 address [all …]`
/freebsd-src/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A D	MipsDisassembler.cpp	`74 ArrayRef<uint8_t> Bytes, uint64_t Address, 83 uint64_t Address, 87 uint64_t Address, 91 uint64_t Address, 95 DecodeGPRMM16ZeroRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, 99 DecodeGPRMM16MovePRegisterClass(MCInst &Inst, unsigned RegNo, uint64_t Address, 103 uint64_t Address, 107 uint64_t Address, 111 uint64_t Address, 115 uint64_t Address, [all …]`

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