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/freebsd-src/contrib/llvm-project/clang/lib/Headers/
H A Dmmintrin.h1 /*===---- mmintrin.h - MMX intrinsics -----
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H A Demmintrin.h1 /*===---- emmintrin.h - SSE2 intrinsics -----
2685 _mm_slli_si128(a,imm) global() argument
2689 _mm_bslli_si128(a,imm) global() argument
2894 _mm_srli_si128(a,imm) global() argument
2898 _mm_bsrli_si128(a,imm) global() argument
4160 _mm_extract_epi16(a,imm) global() argument
4188 _mm_insert_epi16(a,b,imm) global() argument
4239 _mm_shuffle_epi32(a,imm) global() argument
4272 _mm_shufflelo_epi16(a,imm) global() argument
4305 _mm_shufflehi_epi16(a,imm) global() argument
4651 _mm_shuffle_pd(a,b,i) global() argument
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H A Dsmmintrin.h1 /*===---- smmintrin.h - SSE4 intrinsics -----
1606 _mm_cmpistrm(A,B,M) global() argument
1660 _mm_cmpistri(A,B,M) global() argument
1720 _mm_cmpestrm(A,LA,B,LB,M) global() argument
1779 _mm_cmpestri(A,LA,B,LB,M) global() argument
1831 _mm_cmpistra(A,B,M) global() argument
1880 _mm_cmpistrc(A,B,M) global() argument
1928 _mm_cmpistro(A,B,M) global() argument
1978 _mm_cmpistrs(A,B,M) global() argument
2028 _mm_cmpistrz(A,B,M) global() argument
2082 _mm_cmpestra(A,LA,B,LB,M) global() argument
2136 _mm_cmpestrc(A,LA,B,LB,M) global() argument
2189 _mm_cmpestro(A,LA,B,LB,M) global() argument
2244 _mm_cmpestrs(A,LA,B,LB,M) global() argument
2298 _mm_cmpestrz(A,LA,B,LB,M) global() argument
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H A Davx2intrin.h1 /*===---- avx2intrin.h - AVX2 intrinsics -----------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 __target__("avx2,no-evex512"), __min_vector_width__(256)))
23 __target__("avx2,no-evex512"), __min_vector_width__(128)))
27 /// four unsigned 8-bit integers from the 256-bit integer vectors \a X and
28 /// \a Y.
31 /// vectors, and another eight using the upper half. These 16-bit values
32 /// are returned in the lower and upper halves of the 256-bit result,
35 /// A single SAD operation selects four bytes from \a X and four bytes from
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H A Davxvnniint16intrin.h1 /*===----------- avxvnniint16intrin.h - AVXVNNIINT16 intrinsics-------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
26 /// Multiply groups of 2 adjacent pairs of signed 16-bit integers in \a __A with
27 /// corresponding unsigned 16-bit integers in \a __B, producing 2 intermediate
28 /// signed 16-bit results. Sum these 2 results with the corresponding
29 /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst.
40 /// A 128-bit vector of [4 x int].
42 /// A 128-bit vector of [8 x short].
44 /// A 128-bit vector of [8 x unsigned short].
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H A Dxmmintrin.h1 /*===---- xmmintrin.h - SSE intrinsics -----
2111 _mm_prefetch(a,sel) global() argument
2191 _mm_extract_pi16(a,n) global() argument
2222 _mm_insert_pi16(a,d,n) global() argument
2372 _mm_shuffle_pi16(a,n) global() argument
2617 _mm_shuffle_ps(a,b,mask) global() argument
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H A Dfmaintrin.h1 /*===---- fmaintrin.h - FMA intrinsics -----
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H A Dtmmintrin.h1 /*===---- tmmintrin.h - SSSE3 intrinsics -----
156 _mm_alignr_epi8(a,b,n) global() argument
179 _mm_alignr_pi8(a,b,n) global() argument
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H A Davx512vlbf16intrin.h1 /*===--------- avx512vlbf16intrin.h - AVX512_BF16 intrinsics ---------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 __target__("avx512vl,avx512bf16,no-evex512"), \
24 __target__("avx512vl,avx512bf16,no-evex512"), \
34 /// A 128-bit vector of [4 x float].
36 /// A 128-bit vector of [4 x float].
37 /// \returns A 128-bit vector of [8 x bfloat] whose lower 64 bits come from
52 /// A 128-bit vector of [4 x float].
54 /// A 128-bit vector of [4 x float].
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H A Davxintrin.h1 /*===---- avxintrin.h - AVX intrinsics -----
1005 _mm_permute_pd(A,C) global() argument
1045 _mm256_permute_pd(A,C) global() argument
1101 _mm_permute_ps(A,C) global() argument
1193 _mm256_permute_ps(A,C) global() argument
1526 _mm256_shuffle_ps(a,b,mask) global() argument
1572 _mm256_shuffle_pd(a,b,mask) global() argument
1666 _mm_cmp_pd(a,b,c) global() argument
1726 _mm_cmp_ps(a,b,c) global() argument
1786 _mm256_cmp_pd(a,b,c) global() argument
1846 _mm256_cmp_ps(a,b,c) global() argument
1905 _mm_cmp_sd(a,b,c) global() argument
1964 _mm_cmp_ss(a,b,c) global() argument
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H A Df16cintrin.h1 /*===---- f16cintrin.h - F16C intrinsics -----------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
23 /* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h,
24 * but that's because icc can emulate these without f16c using a library call.
28 /// Converts a 16-bit half-precision float value into a 32-bit float
36 /// A 16-bit half-precision float value.
37 /// \returns The converted 32-bit float value.
46 /// Converts a 32-bit single-precision float value to a 16-bit
47 /// half-precision float value.
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H A Davxvnniint8intrin.h1 /*===-------- avxvnniint8intrin.h - AVXVNNIINT8 intrinsics -----------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
25 /// Multiply groups of 4 adjacent pairs of signed 8-bit integers in \a __A with
26 /// corresponding signed 8-bit integers in \a __B, producing 4 intermediate
27 /// signed 16-bit results. Sum these 4 results with the corresponding
28 /// 32-bit integer in \a __W, and store the packed 32-bit results in \a dst.
39 /// A 128-bit vector of [16 x char].
41 /// A 128-bit vector of [16 x char].
43 /// A 128-bit vector of [4 x int].
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H A Dia32intrin.h1 /* ===-------- ia32intrin.h --
109 _bit_scan_forward(A) global() argument
127 _bit_scan_reverse(A) global() argument
193 _bswap64(A) global() argument
230 _popcnt32(A) global() argument
267 _popcnt64(A) global() argument
534 _rdpmc(A) global() argument
713 _lrotl(a,b) global() argument
733 _lrotr(a,b) global() argument
753 _lrotl(a,b) global() argument
773 _lrotr(a,b) global() argument
794 _rotl(a,b) global() argument
814 _rotr(a,b) global() argument
836 _rotwl(a,b) global() argument
856 _rotwr(a,b) global() argument
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H A Davx512bf16intrin.h1 /*===------------ avx512bf16intrin.h - AVX512_BF16 intrinsics --------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
27 __target__("avx512bf16,no-evex512")))
33 /// This intrinsic does not correspond to a specific instruction.
36 /// A bfloat data.
37 /// \returns A float data whose sign field and exponent field keep unchanged,
50 /// A 512-bit vector of [16 x float].
52 /// A 512-bit vector of [16 x float].
53 /// \returns A 512-bit vector of [32 x bfloat] whose lower 256 bits come from
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H A Davxneconvertintrin.h1 /*===-------------- avxneconvertintrin.h - AVXNECONVERT --------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
28 /// Convert scalar BF16 (16-bit) floating-point element
29 /// stored at memory locations starting at location \a __A to a
30 /// single-precision (32-bit) floating-point, broadcast it to packed
31 /// single-precision (32-bit) floating-point elements, and store the results in
32 /// \a dst.
43 /// A pointer to a 16-bit memory location. The address of the memory
46 /// A 128-bit vector of [4 x float].
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H A Dshaintrin.h1 /*===---- shaintrin.h - SHA intrinsics -------------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 /// Performs four iterations of the inner loop of the SHA-1 message digest
21 /// algorithm using the starting SHA-1 state (A, B, C, D) from the 128-bit
22 /// vector of [4 x i32] in \a V1 and the next four 32-bit elements of the
23 /// message from the 128-bit vector of [4 x i32] in \a V2. Note that the
24 /// SHA-1 state variable E must have already been added to \a V2
26 /// SHA-1 state (A, B, C, D) as a 128-bit vector of [4 x i32].
28 /// The SHA-1 algorithm has an inner loop of 80 iterations, twenty each
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H A Dbmi2intrin.h1 /*===---- bmi2intrin.h - BMI2 intrinsics -----------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 /// Copies the unsigned 32-bit integer \a __X and zeroes the upper bits
21 /// starting at bit number \a __Y.
36 /// The 32-bit source value to copy.
38 /// The lower 8 bits specify the bit number of the lowest bit to zero.
39 /// \returns The partially zeroed 32-bit value.
46 /// Deposit (scatter) low-order bits from the unsigned 32-bit integer \a __X
47 /// into the 32-bit result, according to the mask in the unsigned 32-bit
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H A Draointintrin.h1 /*===----------------------- raointintrin.h - RAOINT ------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
20 /// Atomically add a 32-bit value at memory operand \a __A and a 32-bit \a __B,
31 /// A pointer to a 32-bit memory location.
33 /// A 32-bit integer value.
42 /// Atomically and a 32-bit value at memory operand \a __A and a 32-bit \a __B,
53 /// A pointer to a 32-bit memory location.
55 /// A 32-bit integer value.
64 /// Atomically or a 32-bit value at memory operand \a __A and a 32-bit \a __B,
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H A Dadcintrin.h1 /*===---- adcintrin.h - ADC intrinsics -------------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
31 /// Adds unsigned 32-bit integers \a __x and \a __y, plus 0 or 1 as indicated
32 /// by the carry flag \a __cf. Stores the unsigned 32-bit sum in the memory
33 /// at \a __p, and returns the 8-bit carry-out (carry flag).
46 /// The 8-bit unsigned carry flag; any non-zero value indicates carry.
48 /// A 32-bit unsigned addend.
50 /// A 32-bit unsigned addend.
53 /// \returns The 8-bit unsigned carry-out value.
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/freebsd-src/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRFixupKinds.h1 //===-- AVRFixupKinds.h - AVR Specific Fixup Entries ------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
19 /// Although most of the current fixup types reflect a unique relocation
20 /// one can have multiple fixup types for a given relocation and thus need
27 /// A 32-bit AVR fixup.
30 /// A 7-bit PC-relative fixup for the family of conditional
31 /// branches which take 7-bit targets (BRNE,BRGT,etc).
33 /// A 12-bit PC-relative fixup for the family of branches
34 /// which take 12-bit targets (RJMP,RCALL,etc).
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/freebsd-src/sys/contrib/edk2/Include/Library/
H A DBaseLib.h3 functions, file path functions, and CPU architecture-specific functions.
5 Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
6 Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
10 SPDX-License-Identifier: BSD-2-Clause-Patent
18 // Definitions for architecture-specific types
22 /// The IA-32 architecture context buffer used by SetJump() and LongJump().
54 UINT8 XmmBuffer[160]; ///< XMM6-XMM15.
81 UINT32 R3; ///< A copy of R13.
132 /// The RISC-V architecture context buffer used by SetJump() and LongJump().
161 Returns the length of a Null-terminated Unicode string.
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H A DPcdLib.h4 PCD Library Class provides a PCD usage macro interface for all PCD types.
5 It should be included in any module that uses PCD. If a module uses dynamic/dynamicex
6 PCD, module should be linked to a PEIM/DXE library instance to access that PCD.
7 If a module uses PatchableInModule type PCD, it also needs the library instance to produce
9 translated to a variable or macro that is auto-generated by build tool in
17 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
18 SPDX-License-Identifier: BSD-2-Clause-Patent
27 Retrieves a token number based on a token name.
30 If TokenName is not a valid token in the token space, then the module will not build.
41 Retrieves a Boolean PCD feature flag based on a token name.
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/freebsd-src/sys/contrib/dev/athk/ath11k/
H A Drx_desc.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
88 #define RX_ATTENTION_INFO1_FIRST_MPDU BIT(0)
89 #define RX_ATTENTION_INFO1_RSVD_1A BIT(1)
90 #define RX_ATTENTION_INFO1_MCAST_BCAST BIT(2)
91 #define RX_ATTENTION_INFO1_AST_IDX_NOT_FOUND BIT(3)
92 #define RX_ATTENTION_INFO1_AST_IDX_TIMEDOUT BIT(4)
93 #define RX_ATTENTION_INFO1_POWER_MGMT BIT(5)
94 #define RX_ATTENTION_INFO1_NON_QOS BIT(6)
95 #define RX_ATTENTION_INFO1_NULL_DATA BIT(7)
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/freebsd-src/sys/contrib/dev/athk/ath12k/
H A Drx_desc.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
27 #define RX_MPDU_START_INFO0_FLOW_ID_TOEPLITZ BIT(7)
28 #define RX_MPDU_START_INFO0_PKT_SEL_FP_UCAST_DATA BIT(8)
29 #define RX_MPDU_START_INFO0_PKT_SEL_FP_MCAST_DATA BIT(9)
30 #define RX_MPDU_START_INFO0_PKT_SEL_FP_CTRL_BAR BIT(10)
33 #define RX_MPDU_START_INFO0_MCAST_ECHO_DROP_EN BIT(17)
34 #define RX_MPDU_START_INFO0_WDS_LEARN_DETECT_EN BIT(18)
35 #define RX_MPDU_START_INFO0_INTRA_BSS_CHECK_EN BIT(19)
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/freebsd-src/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
H A DTypeIndex.h1 //===- TypeIndex.h ----------------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
32 SignedCharacter = 0x0010, // 8 bit signed
33 UnsignedCharacter = 0x0020, // 8 bit unsigned
34 NarrowCharacter = 0x0070, // really a char
40 SByte = 0x0068, // 8 bit signed int
41 Byte = 0x0069, // 8 bit unsigned int
42 Int16Short = 0x0011, // 16 bit signed
43 UInt16Short = 0x0021, // 16 bit unsigned
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