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/freebsd-src/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DRelLookupTableConverter.h1 //===-- RelLookupTableConverterPass.h - Rel Table Conv ----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 /// lookup tables to relative lookup tables to make them PIC-friendly.
13 /// Switch lookup table example:
14 /// @switch.table.foo = private unnamed_addr constant [3 x i8*]
17 /// i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.1, i64 0, i64 0),
18 /// i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str.2, i64 0, i64 0)
21 /// switch.lookup:
23 /// %switch.gep = getelementptr inbounds [3 x i8*],
[all …]
/freebsd-src/contrib/tcpdump/
H A Dprint-geonet.c15 * Original code by Ola Martin Lykkja (ola.lykkja@q-free.com)
22 #include "netdissect-stdinc.h"
31 ETSI TS 102 636-5-1 V1.1.1 (2011-02)
33 Part 5: Transport Protocols; Sub-part 1: Basic Transport Protocol
35 ETSI TS 102 636-4-1 V1.1.1 (2011-0
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H A Dprint-lmp.c21 /* OIF UNI 1.0: https://web.archive.org/web/20160401194747/http://www.oiforum.com/public/documents/OIF-UNI-01.0.pdf */
25 #include "netdissect-stdinc.h"
38 * 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
39 * +-+-+-+-
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/freebsd-src/sys/contrib/device-tree/Bindings/net/dsa/
H A Dmt7530.txt1 Mediatek MT7530 Ethernet switch
6 - compatible: may be compatible = "mediatek,mt7530"
9 - #address-cells: Must be 1.
10 - #size-cells: Must be 0.
11 - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part
12 on multi-chip module belong to MT7623A has or the remotely standalone
17 - core-supply: Phandle to the regulator node necessary for the core power.
18 - io-supply: Phandle to the regulator node necessary for the I/O power.
19 See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt
24 - reset-gpios: Should be a gpio specifier for a reset line.
[all …]
H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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H A Docelot.txt1 Microchip Ocelot switch driver family
5 -----
9 - VSC9959 (Felix)
10 - VSC9953 (Seville)
12 The VSC9959 switch is found in the NXP LS1028A. It is a PCI device, part of the
13 larger ENETC root complex. As a result, the ethernet-switch node is a sub-node
25 For the external switch ports, depending on board configuration, "phy-mode" and
26 "phy-handle" are populated by board specific device tree instances. Ports 4 and
32 By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal
33 2.5Gbps port@4, but can be moved to the 1Gbps port@5, depending on the specific
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H A Dqca8k.txt1 * Qualcomm Atheros QCA8xxx switch family
5 - compatible: should be one of:
10 - #size-cells: must be 0
11 - #address-cells: must be 1
15 - reset-gpios: GPIO to be used to reset the whole device
19 The integrated switch subnode should be specified according to the binding
20 described in dsa/dsa.txt. If the QCA8K switch is connect to a SoC's external
21 mdio-bus each subnode describing a port needs to have a valid phandle
24 To declare the internal mdio-bus configuration, declare a mdio node in the
25 switch node and declare the phandle for the port referencing the internal
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H A Drenesas,rzn1-a5psw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/N1 Advanced 5 ports ethernet switch
10 - Clément Léger <clement.leger@bootlin.com>
13 The advanced 5 ports switch is present on the Renesas RZ/N1 SoC family and
14 handles 4 ports + 1 CPU management port.
17 - $ref: dsa.yaml#/$defs/ethernet-ports
22 - enum:
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H A Dmscc,ocelot.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Ocelot Switch Family
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - UNGLinuxDriver@microchip.com
16 There are multiple switches which are either part of the Ocelot-1 family, or
20 them performs packet I/O primarily through an Ethernet port of the switch
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H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Atheros QCA83xx switch family
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
17 the switch node and declare the phandle for the port, referencing the internal
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
20 mdio-bus configurations are not supported by the hardware.
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H A Dar9331.txt1 Atheros AR9331 built-in switch
4 It is a switch built-in to Atheros AR9331 WiSoC and addressable over internal
5 MDIO bus. All PHYs are built-in as well.
9 - compatible: should be: "qca,ar9331-switch"
10 - reg: Address on the MII bus for the switch.
11 - resets : Must contain an entry for each entry in reset-names.
12 - reset-names : Must include the following entries: "switch"
13 - interrupt-parent: Phandle to the parent interrupt controller
14 - interrupts: IRQ line for the switch
15 - interrupt-controller: Indicates the switch is itself an interrupt
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-facebook-minipack.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2500-facebook-netbmc-common.dtsi"
9 compatible = "facebook,minipack-bmc", "aspeed,ast2500";
23 * i2c switch 2-0070, pca9548, 8 child channels assigned
24 * with bus number 16-23.
36 * i2c switch 8-0070, pca9548, 8 child channels assigned
37 * with bus number 24-31.
49 * i2c switch 9-0070, pca9548, 8 child channels assigned
50 * with bus number 32-39.
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/freebsd-src/crypto/openssl/test/ssl-tests/
H A D09-alpn.cnf5 test-0 = 0-alpn-simple
6 test-1 = 1-alpn-server-finds-match
7 test-2 = 2-alp
[all...]
H A D05-sni.cnf5 test-0 = 0-SNI-switch-context
6 test-1 = 1-SNI-keep-context
7 test-2 = 2-SNI-no-server-support
8 test-3 = 3-SNI-no-client-support
9 test-4 = 4-SNI-bad-sni-ignore-mismatch
10 test-5 = 5-SNI-bad-sni-reject-mismatch
11 test-6 = 6-SNI-bad-clienthello-sni-ignore-mismatch
12 test-7 = 7-SNI-bad-clienthello-sni-reject-mismatch
13 test-8 = 8-SNI-clienthello-disable-v12
16 [0-SNI-switch-context]
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/freebsd-src/share/man/man4/
H A Dvale.425 .\" This document is derived in part from the enet man page (enet.4)
30 .Dt VALE 4
40 .Xr netmap 4
55 .Xr netmap 4
63 is the prefix indicating a VALE switch rather than a standard interface,
65 indicates a specific switch (the colon is a separator),
68 indicates a port within the switch.
69 Both SSS and PPP have the form [0-9a-zA-Z
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H A Darswitch.41 .\"-
30 .Nd driver for Atheros Fast Ethernet switch
39 fast ethernet switch chips:
40 .Bl -tag -compact -width "AR8216"
42 Fast Ethernet Switch
45 Six-port Gigabit Ethernet Switch
47 Seven-port Gigabit Ethernet Switch
51 .Xr mdio 4
53 .Xr miibus 4
72 Setting the switch MAC address is not supported.
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/freebsd-src/sys/amd64/linux/
H A Dlinux_systrace_args.c6 * DO NOT EDIT-- this file is automatically @generated.
14 switch (sysnum) { in systrace_args()
18 iarg[a++] = p->fd; /* int */ in systrace_args()
19 uarg[a++] = (intptr_t)p->buf; /* char * */ in systrace_args()
20 iarg[a++] = p->nbyte; /* l_size_t */ in systrace_args()
27 iarg[a++] = p->fd; /* int */ in systrace_args()
28 uarg[a++] = (intptr_t)p->buf; /* char * */ in systrace_args()
29 iarg[a++] = p->nbyte; /* l_size_t */ in systrace_args()
36 uarg[a++] = (intptr_t)p->pat in systrace_args()
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/freebsd-src/sys/arm64/linux/
H A Dlinux_systrace_args.c6 * DO NOT EDIT-- this file is automatically @generated.
14 switch (sysnum) { in systrace_args()
18 uarg[a++] = (intptr_t)p->path; /* const char * */ in systrace_args()
19 uarg[a++] = (intptr_t)p->name; /* const char * */ in systrace_args()
20 uarg[a++] = (intptr_t)p->value; /* void * */ in systrace_args()
21 iarg[a++] = p->size; /* l_size_t */ in systrace_args()
22 iarg[a++] = p->flags; /* l_int */ in systrace_args()
29 uarg[a++] = (intptr_t)p->path; /* const char * */ in systrace_args()
30 uarg[a++] = (intptr_t)p->nam in systrace_args()
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/freebsd-src/sys/amd64/linux32/
H A Dlinux32_systrace_args.c6 * DO NOT EDIT-- this file is automatically @generated.
14 switch (sysnum) { in systrace_args()
18 iarg[a++] = p->rval; /* int */ in systrace_args()
30 iarg[a++] = p->fd; /* int */ in systrace_args()
31 uarg[a++] = (intptr_t)p->buf; /* char * */ in systrace_args()
32 uarg[a++] = p->nbyte; /* u_int */ in systrace_args()
37 case 4: { in systrace_args()
39 iarg[a++] = p->fd; /* int */ in systrace_args()
40 uarg[a++] = (intptr_t)p->bu in systrace_args()
[all...]
/freebsd-src/sys/compat/freebsd32/
H A Dfreebsd32_systrace_args.c9 * DO NOT EDIT-- this file is automatically @generated.
17 switch (sysnum) { in systrace_args()
26 iarg[a++] = p->rval; /* int */ in systrace_args()
38 iarg[a++] = p->fd; /* int */ in systrace_args()
39 uarg[a++] = (intptr_t)p->buf; /* void * */ in systrace_args()
40 uarg[a++] = p->nbyte; /* size_t */ in systrace_args()
45 case 4: { in systrace_args()
47 iarg[a++] = p->fd; /* int */ in systrace_args()
48 uarg[a++] = (intptr_t)p->bu in systrace_args()
[all...]
/freebsd-src/sys/i386/linux/
H A Dlinux_systrace_args.c6 * DO NOT EDIT-- this file is automatically @generated.
14 switch (sysnum) { in systrace_args()
18 iarg[a++] = p->rval; /* int */ in systrace_args()
30 iarg[a++] = p->fd; /* int */ in systrace_args()
31 uarg[a++] = (intptr_t)p->buf; /* char * */ in systrace_args()
32 uarg[a++] = p->nbyte; /* u_int */ in systrace_args()
37 case 4: { in systrace_args()
39 iarg[a++] = p->fd; /* int */ in systrace_args()
40 uarg[a++] = (intptr_t)p->bu in systrace_args()
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dkeystone-netcp.txt6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
28 |-> NetCP Devices -> |
[all …]
/freebsd-src/sys/kern/
H A Dsystrace_args.c6 * DO NOT EDIT-- this file is automatically @generated.
14 switch (sysnum) { in systrace_args()
23 iarg[a++] = p->rval; /* int */ in systrace_args()
35 iarg[a++] = p->fd; /* int */ in systrace_args()
36 uarg[a++] = (intptr_t)p->buf; /* void * */ in systrace_args()
37 uarg[a++] = p->nbyte; /* size_t */ in systrace_args()
42 case 4: { in systrace_args()
44 iarg[a++] = p->fd; /* int */ in systrace_args()
45 uarg[a++] = (intptr_t)p->bu in systrace_args()
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/freebsd-src/sys/arm/nvidia/drm2/
H A Dhdmi.c17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
44 return 256 - csum; in hdmi_infoframe_checksum()
55 * hdmi_avi_infoframe_init() - initialize an HDMI AVI infoframe
64 frame->type = HDMI_INFOFRAME_TYPE_AVI; in hdmi_avi_infoframe_init()
65 frame->version = 2; in hdmi_avi_infoframe_init()
66 frame->length = HDMI_AVI_INFOFRAME_SIZE; in hdmi_avi_infoframe_init()
73 * hdmi_avi_infoframe_pack() - write HDMI AVI infoframe to binary buffer
92 length = HDMI_INFOFRAME_HEADER_SIZE + frame->length; in hdmi_avi_infoframe_pack()
95 return -ENOSPC; in hdmi_avi_infoframe_pack()
99 ptr[0] = frame->type; in hdmi_avi_infoframe_pack()
[all …]
/freebsd-src/sys/dev/etherswitch/e6000sw/
H A De6000swreg.h1 /*-
40 * Definitions for the Marvell 88E6000 series Ethernet Switch.
43 /* Switch IDs. */
51 #define MVSWITCH(_sc, id) ((_sc)->swid == (id))
52 #define MVSWITCH_MULTICHIP(_sc) ((_sc)->sw_addr != 0)
55 * Switch Registers
64 * Per-Port Switch Registers
83 #define PSC_CONTROL_FORCED_LINK (1 << 4)
125 * Switch Global Register 1 accessed via REG_GLOBAL_ADDR
129 #define SWITCH_GLOBAL_CONTROL 4
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