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/freebsd-src/contrib/llvm-project/llvm/lib/DebugInfo/PDB/Native/
H A DFormatUtil.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
35 Result += std::string(formatv("{0}", fmt_repeat(' ', IndentLevel))); in typesetItemList()
45 Result += std::string(formatv("\n{0}{1}", fmt_repeat(' ', IndentLevel), S)); in typesetStringList()
123 return formatv("UNKNOWN RECORD ({0:X})", llvm::to_underlying(K)).str(); in formatTypeLeafKind()
128 return std::string(formatv("{0:4}:{1:4}", Segment, Offset)); in formatSegmentOffset()
152 if (C == 0) in formatSectionCharacteristics()
170 PUSH_MASKED_CHARACTERISTIC_FLAG(SC, 0xF00000, IMAGE_SCN_ALIGN_1BYTES, C, in formatSectionCharacteristics()
172 PUSH_MASKED_CHARACTERISTIC_FLAG(SC, 0xF00000, IMAGE_SCN_ALIGN_2BYTES, C, in formatSectionCharacteristics()
174 PUSH_MASKED_CHARACTERISTIC_FLAG(SC, 0xF00000, IMAGE_SCN_ALIGN_4BYTES, C, in formatSectionCharacteristics()
176 PUSH_MASKED_CHARACTERISTIC_FLAG(SC, 0xF00000, IMAGE_SCN_ALIGN_8BYTES, C, in formatSectionCharacteristics()
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am68-sk-som.dtsi16 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
17 <0x00000008 0x80000000 0x00000003 0x80000000>;
26 reg = <0x00 0x9e80000
[all...]
H A Dk3-j721e-som-p0.dtsi17 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
18 <0x00000008 0x80000000 0x00000000 0x80000000>;
27 reg = <0x00 0x9e80000
[all...]
H A Dk3-j721s2-som-p0.dtsi18 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
19 <0x00000008 0x80000000 0x00000003 0x80000000>;
29 reg = <0x00 0x9e80000
[all...]
H A Dk3-j784s4-evm.dts38 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
39 <0x00000008 0x80000000 0x00000007 0x80000000>;
48 reg = <0x00 0x9e80000
[all...]
H A Dk3-am69-sk.dts38 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
39 <0x00000008 0x80000000 0x00000007 0x80000000>;
48 reg = <0x00 0x9e80000
[all...]
H A Dk3-am642-tqma64xxl.dtsi19 reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
29 reg = <0x00 0x9e800000 0x00 0x01800000>;
30 alignment = <0x1000>;
36 reg = <0x0
[all...]
H A Dk3-am64-phycore-som.dtsi29 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
38 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
39 alignment = <0x1000>;
45 reg = <0x0
[all...]
H A Dk3-j721e-beagleboneai64.dts40 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
41 <0x00000008 0x80000000 0x00000000 0x80000000>;
50 reg = <0x00 0x9e80000
[all...]
H A Dk3-j7200-som-p0.dtsi17 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
18 <0x00000008 0x80000000 0x00000000 0x80000000>;
27 reg = <0x00 0x9e80000
[all...]
H A Dk3-j721e-sk.dts36 reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
37 <0x00000008 0x80000000 0x00000000 0x80000000>;
46 reg = <0x00 0x9e80000
[all...]
H A Dk3-am642-sk.dts40 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
49 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
50 alignment = <0x1000>;
56 reg = <0x0
[all...]
H A Dk3-am642-evm.dts42 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
51 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
52 alignment = <0x1000>;
58 reg = <0x0
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/mtd/partitions/
H A Dbrcm,bcm4908-partitions.yaml33 "^partition@[0-9a-f]+$":
53 partition@0 {
55 reg = <0x0 0x100000>;
60 reg = <0x100000 0xf00000>;
65 reg = <0x1000000 0xf00000>;
70 reg = <0x1f00000 0x100000>;
H A Dlinksys,ns-partitions.yaml34 "^partition@[0-9a-f]+$":
56 partition@0 {
58 reg = <0x0 0x100000>;
64 reg = <0x100000 0x100000>;
69 reg = <0x200000 0xf00000>;
74 reg = <0x1100000 0xf00000>;
H A Dfixed-partitions.yaml51 "@[0-9a-f]+$":
77 partition@0 {
79 reg = <0x0000000 0x100000>;
84 reg = <0x0100000 0x200000>;
96 partition@0 {
98 reg = <0x00000000 0x1 0x00000000>;
110 partition@0 {
112 reg = <0x0 0x00000000 0x2 0x00000000>;
118 reg = <0x2 0x00000000 0x1 0x00000000>;
128 partition@0 {
[all …]
H A Dnvmem-cells.yaml45 reg = <0x1200000 0x0140000>;
51 macaddr_gmac1: macaddr_gmac1@0 {
52 reg = <0x0 0x6>;
56 reg = <0x6 0x6>;
60 reg = <0x1000 0x2f20>;
64 reg = <0x5000 0x2f20>;
73 partition@0 {
75 reg = <0x000000 0x100000>;
82 reg = <0x100000 0xe00000>;
88 reg = <0xf00000 0x100000>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-80x0.dtsi24 #define CP11X_PCIEx_MEM_BASE(iface) (0xf6000000 + (iface * 0x1000000))
25 #define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
45 #define CP11X_PCIEx_MEM_BASE(iface) (0xfa000000 + (iface * 0x1000000))
46 #define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
H A Dcn9130.dtsi29 #define CP11X_PCIEx_MEM_BASE(iface) ((iface == 0) ? 0xc0000000 : \
30 0xe0000000 + ((iface - 1) * 0x1000000))
31 #define CP11X_PCIEx_MEM_SIZE(iface) ((iface == 0) ? 0x1ff00000 : 0xf00000)
H A Darmada-70x0.dtsi22 #define CP11X_PCIEx_MEM_BASE(iface) (0xf6000000 + (iface * 0x1000000))
23 #define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
H A Dac5-98dx35xx-rd.dts30 memory@0 {
32 reg = <0x2 0x00000000 0x0 0x40000000>;
37 #phy-cells = <0>;
42 phy0: ethernet-phy@0 {
43 reg = <0>;
76 spiflash0: flash@0 {
81 reg = <0>;
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm53340-ubnt-unifi-switch8.dts22 memory@0 {
24 reg = <0x00000000 0x08000000>,
25 <0x68000000 0x08000000>;
35 bspi-sel = <0>;
37 flash: flash@0 {
39 reg = <0>;
46 partition@0 {
48 reg = <0x0 0xc0000>;
53 reg = <0xc0000 0x10000>;
58 reg = <0xd0000 0x10000>;
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/pci/
H A Dpci-armada8k.txt32 reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>;
40 bus-range = <0 0xff>;
41 ranges = <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 /* downstream I/O */
42 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; /* non-prefetchable memory */
43 interrupt-map-mask = <0 0 0 0>;
44 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
/freebsd-src/sys/contrib/device-tree/src/mips/netlogic/
H A Dxlp_gvp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x112100 0xa00>;
32 #address-cells = <0>;
34 reg = <0 0x110000 0x200>;
38 nor_flash@1,0 {
43 reg = <1 0 0x1000000>;
45 partition@0 {
47 reg = <0x0 0x100000>; /* 1M */
53 reg = <0x100000 0x100000>; /* 1M */
[all …]
H A Dxlp_rvp.dts17 ranges = <0 0 0 0x18000000 0x04000000 // PCIe CFG
18 1 0 0 0x16000000 0x02000000>; // GBU chipselects
23 reg = <0 0x112100 0xa00>;
32 #address-cells = <0>;
34 reg = <0 0x110000 0x200>;
38 nor_flash@1,0 {
43 reg = <1 0 0x1000000>;
45 partition@0 {
47 reg = <0x0 0x100000>; /* 1M */
53 reg = <0x100000 0x100000>; /* 1M */
[all …]

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