Searched +full:0 +full:xae90200 (Results 1 – 10 of 10) sorted by relevance
/freebsd-src/sys/contrib/device-tree/Bindings/display/msm/ |
H A D | dp-controller.yaml | 74 - description: phy 0 parent 104 const: 0 106 vdda-0p9-supply: 114 port@0: 131 enum: [ 0, 1, 2, 3 ] 140 - port@0 187 reg = <0xae90000 0x200>, 188 <0xae90200 [all...] |
H A D | qcom,sc7180-mdss.yaml | 49 "^display-controller@[0-9a-f]+$": 57 "^displayport-controller@[0-9a-f]+$": 65 "^dsi@[0-9a-f]+$": 75 "^phy@[0-9a-f]+$": 101 reg = <0xae00000 0x1000>; 118 iommus = <&apps_smmu 0x800 0x2>; 123 reg = <0x0ae01000 0x8f000>, 124 <0x0aeb0000 0x2008>; 138 interrupts = <0>; 144 #size-cells = <0>; [all …]
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H A D | qcom,sc7280-mdss.yaml | 49 "^display-controller@[0-9a-f]+$": 57 "^displayport-controller@[0-9a-f]+$": 65 "^dsi@[0-9a-f]+$": 75 "^edp@[0-9a-f]+$": 83 "^phy@[0-9a-f]+$": 111 reg = <0xae00000 0x1000>; 130 iommus = <&apps_smmu 0x900 0x402>; 135 reg = <0x0ae01000 0x8f000>, 136 <0x0aeb0000 0x2008>; 154 interrupts = <0>; [all …]
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/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sc8180x.dtsi | 29 #clock-cells = <0>; 35 #clock-cells = <0>; 43 #size-cells = <0>; 45 CPU0: cpu@0 { 48 reg = <0x0 0x0>; 52 qcom,freq-domain = <&cpufreq_hw 0>; 59 clocks = <&cpufreq_hw 0>; 77 reg = <0x0 0x10 [all...] |
H A D | sm8350.dtsi | 38 #clock-cells = <0>; 46 #clock-cells = <0>; 52 #size-cells = <0>; 54 CPU0: cpu@0 { 57 reg = <0x0 0x0>; 58 clocks = <&cpufreq_hw 0>; 61 qcom,freq-domain = <&cpufreq_hw 0>; 81 reg = <0x0 0x10 [all...] |
H A D | sm8150.dtsi | 34 #clock-cells = <0>; 41 #clock-cells = <0>; 49 #size-cells = <0>; 51 CPU0: cpu@0 { 54 reg = <0x0 0x0>; 55 clocks = <&cpufreq_hw 0>; 60 qcom,freq-domain = <&cpufreq_hw 0>; 62 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, [all...] |
H A D | sm8450.dtsi | 39 #clock-cells = <0>; 45 #clock-cells = <0>; 52 #size-cells = <0>; 54 CPU0: cpu@0 { 57 reg = <0x0 0x0>; 62 qcom,freq-domain = <&cpufreq_hw 0>; 64 clocks = <&cpufreq_hw 0>; 81 reg = <0x0 0x10 [all...] |
H A D | sc8280xp.dtsi | 33 #clock-cells = <0>; 38 #clock-cells = <0>; 45 #size-cells = <0>; 47 CPU0: cpu@0 { 50 reg = <0x0 0x0>; 51 clocks = <&cpufreq_hw 0>; 58 qcom,freq-domain = <&cpufreq_hw 0>; 78 reg = <0x0 0x10 [all...] |
H A D | sm8550.dtsi | 38 #clock-cells = <0>; 43 #clock-cells = <0>; 47 #clock-cells = <0>; 55 #clock-cells = <0>; 65 #size-cells = <0>; 67 CPU0: cpu@0 { 70 reg = <0 0>; 71 clocks = <&cpufreq_hw 0>; 76 qcom,freq-domain = <&cpufreq_hw 0>; [all...] |
H A D | sm8250.dtsi | 80 #clock-cells = <0>; 88 #clock-cells = <0>; 94 #size-cells = <0>; 96 CPU0: cpu@0 { 99 reg = <0x0 0x0>; 100 clocks = <&cpufreq_hw 0>; 107 qcom,freq-domain = <&cpufreq_hw 0>; 109 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>, [all...] |