| /freebsd-src/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/ |
| H A D | fsl,cpm1-tsa.yaml | 39 const: 0
42 '^tdm@[0-1]$':
51 minimum: 0
54 The TDM number for this TDM, 0 for TDMa and 1 for TDMb
81 enum: [0, 1, 2, 3]
82 default: 0
86 frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.
89 enum: [0, 1, 2, 3]
90 default: 0
94 frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.
[all …]
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| /freebsd-src/sys/dev/ath/ath_hal/ |
| H A D | ah_eeprom_v14.h | 26 #define AR5416_EEPROM_OFFSET 0x2000
27 #define AR5416_EEPROM_START_ADDR 0x503f1200
28 #define AR5416_EEPROM_MAX 0xae0 /* Ignore for the moment used only on the flash implementations */
29 #define AR5416_EEPROM_MAGIC 0xa55a
30 #define AR5416_EEPROM_MAGIC_OFFSET 0x0
36 #define owl_eep_start_loc 0
43 #define AR5416_EEP_NO_BACK_VER 0x1
44 #define AR5416_EEP_VER 0xE
45 #define AR5416_EEP_VER_MINOR_MASK 0xFFF
47 #define AR5416_EEP_MINOR_VER_2 0x2
[all …]
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| /freebsd-src/crypto/heimdal/lib/wind/ |
| H A D | bidi_table.c | 9 {0x5be, 1},
10 {0x5c0, 1},
11 {0x5c3, 1},
12 {0x5d0, 0x1b},
13 {0x5f0, 0x5},
14 {0x61b, 1},
15 {0x61f, 1},
16 {0x621, 0x1a},
17 {0x640, 0xb},
18 {0x66d, 0x3},
[all …]
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| /freebsd-src/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300eep.h | 33 #define AR_EEPROM_EEPCAP_COMPRESS_DIS 0x0001
34 #define AR_EEPROM_EEPCAP_AES_DIS 0x0002
35 #define AR_EEPROM_EEPCAP_FASTFRAME_DIS 0x0004
36 #define AR_EEPROM_EEPCAP_BURST_DIS 0x0008
37 #define AR_EEPROM_EEPCAP_MAXQCU 0x01F0
39 #define AR_EEPROM_EEPCAP_HEAVY_CLIP_EN 0x0200
40 #define AR_EEPROM_EEPCAP_KC_ENTRIES 0xF000
51 _compress_none = 0,
64 calibration_data_none = 0,
79 // Yes, the first one is 2. Do not use 0 o
[all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm64/hisilicon/ |
| H A D | hip06.dtsi | 23 #size-cells = <0>;
87 reg = <0x10000>;
95 reg = <0x10001>;
103 reg = <0x10002>;
111 reg = <0x10003>;
119 reg = <0x10100>;
127 reg = <0x10101>;
135 reg = <0x10102>;
143 reg = <0x10103>;
151 reg = <0x1020
[all...] |
| H A D | hip07.dtsi | 23 #size-cells = <0>;
270 reg = <0x10000>;
273 numa-node-id = <0>;
279 reg = <0x10001>;
282 numa-node-id = <0>;
288 reg = <0x10002>;
291 numa-node-id = <0>;
297 reg = <0x10003>;
300 numa-node-id = <0>;
306 reg = <0x1010
[all...] |
| /freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | am437x-gp-evm.dts | 57 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
58 brightness-levels = <0 51 53 56 62 75 101 152 255>;
68 pinctrl-0 = <&matrix_keypad_default>;
80 linux,keymap = <0x00000201 /* P1 */
81 0x00010202 /* P2 */
82 0x01000067 /* UP */
83 0x0101006a /* RIGHT */
84 0x02000069 /* LEFT */
85 0x0201006c>; /* DOWN */
103 #clock-cells = <0>;
[all …]
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| /freebsd-src/sys/arm64/nvidia/tegra210/ |
| H A D | tegra210_pinmux.c | 49 #define TEGRA_MUX_FUNCTION_MASK 0x03
50 #define TEGRA_MUX_FUNCTION_SHIFT 0
51 #define TEGRA_MUX_PUPD_MASK 0x03
65 #define TEGRA_GRP_DRV_TYPE_MASK 0x03
67 #define TEGRA_GRP_DRV_DRVDN_SLWR_MASK 0x03
69 #define TEGRA_GRP_DRV_DRVUP_SLWF_MASK 0x03
79 {NULL, 0},
132 #define GPIO_BANK_A 0
177 .reg = r - 0x8D4, \
186 GRP(0x9c0, pa6, 12, 5, 20, 5),
[all …]
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| /freebsd-src/tools/tools/cxgbtool/ |
| H A D | reg_defs_t3b.c | 7 { "SG_CONTROL", 0x0, 0 },
26 { "GlobalEnable", 0, 1 },
27 { "SG_KDOORBELL", 0x4, 0 },
29 { "EgrCntx", 0, 16 },
30 { "SG_GTS", 0x8, 0 },
33 { "NewIndex", 0, 16 },
34 { "SG_CONTEXT_CMD", 0xc, 0 },
42 { "Context", 0, 16 },
43 { "SG_CONTEXT_DATA0", 0x10, 0 },
44 { "SG_CONTEXT_DATA1", 0x14, 0 },
[all …]
|
| H A D | reg_defs_t3c.c | 7 { "SG_CONTROL", 0x0, 0 },
29 { "GlobalEnable", 0, 1 },
30 { "SG_KDOORBELL", 0x4, 0 },
32 { "EgrCntx", 0, 16 },
33 { "SG_GTS", 0x8, 0 },
36 { "NewIndex", 0, 16 },
37 { "SG_CONTEXT_CMD", 0xc, 0 },
45 { "Context", 0, 16 },
46 { "SG_CONTEXT_DATA0", 0x10, 0 },
47 { "SG_CONTEXT_DATA1", 0x14, 0 },
[all …]
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| /freebsd-src/sys/contrib/dev/rtw88/ |
| H A D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201F
[all...] |
| /freebsd-src/sys/dev/cxgbe/common/ |
| H A D | t4_regs.h | 36 #define MYPF_BASE 0x1b000
39 #define PF0_BASE 0x1e000
42 #define PF1_BASE 0x1e400
45 #define PF2_BASE 0x1e800
48 #define PF3_BASE 0x1ec00
51 #define PF4_BASE 0x1f000
54 #define PF5_BASE 0x1f400
57 #define PF6_BASE 0x1f800
60 #define PF7_BASE 0x1fc00
63 #define PF_STRIDE 0x400
[all …]
|