Home
last modified time | relevance | path

Searched +full:0 +full:xa000 (Results 1 – 25 of 163) sorted by relevance

1234567

/freebsd-src/sys/contrib/device-tree/src/powerpc/
H A Dmvme5100.dts26 #size-cells = <0>;
30 reg = <0x0>;
44 reg = <0x0 0x20000000>;
51 ranges = <0x0 0xfef80000 0x10000>;
52 reg = <0xfef80000 0x10000>;
57 reg = <0x8000 0x80>;
68 reg = <0x8200 0x80>;
78 #address-cells = <0>;
82 reg = <0xf3f80000 0x40000>;
92 reg = <0xfec00000 0x400000>;
[all …]
H A Dstxssa8555.dts30 #size-cells = <0>;
32 PowerPC,8555@0 {
34 reg = <0x0>;
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
39 timebase-frequency = <0>; // 33 MHz, from uboot
40 bus-frequency = <0>; // 166 MHz
41 clock-frequency = <0>; // 825 MHz, from uboot
48 reg = <0x00000000 0x10000000>;
56 ranges = <0x0 0xe0000000 0x100000>;
[all …]
/freebsd-src/contrib/processor-trace/libipt/test/src/
H A Dptunit-config.c111 ptu_int_eq(errcode, 0); in from_user()
126 memset(&config, 0xcd, sizeof(config)); in from_user_small()
133 ptu_int_eq(errcode, 0); in from_user_small()
138 ptu_uint_eq(config.errata.bdm70, 0); in from_user_small()
155 ptu_int_eq(errcode, 0); in from_user_big()
188 ptu_uint_eq(config.addr_filter.config.addr_cfg, 0ull); in addr_filter_none()
190 for (filter = 0; filter < 4; ++filter) { in addr_filter_none()
210 config.addr_filter.addr0_a = 0xa000ull; in addr_filter_0()
211 config.addr_filter.addr0_b = 0xb000ull; in addr_filter_0()
213 ptu_uint_ne(config.addr_filter.config.addr_cfg, 0ull); in addr_filter_0()
[all …]
/freebsd-src/sys/dev/uart/
H A Duart_bus_pci.c82 #define PCI_NO_MSI 0x40000000
83 #define PCI_RID_MASK 0x0000ffff
86 { 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14,
88 { 0x1028, 0x0012, 0xfff
[all...]
/freebsd-src/sys/contrib/device-tree/src/powerpc/fsl/
H A Dmpc8548cds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x01000000>;
44 partition@0 {
45 reg = <0x0 0x0b00000>;
50 reg = <0x0b00000 0x0400000>;
55 reg = <0x0f00000 0x060000>;
60 reg = <0x0f60000 0x020000>;
66 reg = <0x0f80000 0x080000>;
72 board-control@1,0 {
74 reg = <0x1 0x0 0x1000>;
[all …]
H A Dmpc8540ads.dts29 #size-cells = <0>;
31 PowerPC,8540@0 {
33 reg = <0x0>;
36 d-cache-size = <0x8000>; // L1, 32K
37 i-cache-size = <0x8000>; // L1, 32K
38 timebase-frequency = <0>; // 33 MHz, from uboot
39 bus-frequency = <0>; // 166 MHz
40 clock-frequency = <0>; // 825 MHz, from uboot
47 reg = <0x0 0x8000000>; // 128M at 0x0
55 ranges = <0x0 0xe0000000 0x100000>;
[all …]
H A Dmpc8555cds.dts29 #size-cells = <0>;
31 PowerPC,8555@0 {
33 reg = <0x0>;
36 d-cache-size = <0x8000>; // L1, 32K
37 i-cache-size = <0x8000>; // L1, 32K
38 timebase-frequency = <0>; // 33 MHz, from uboot
39 bus-frequency = <0>; // 166 MHz
40 clock-frequency = <0>; // 825 MHz, from uboot
47 reg = <0x0 0x8000000>; // 128M at 0x0
55 ranges = <0x0 0xe0000000 0x100000>;
[all …]
H A Dmpc8541cds.dts29 #size-cells = <0>;
31 PowerPC,8541@0 {
33 reg = <0x0>;
36 d-cache-size = <0x8000>; // L1, 32K
37 i-cache-size = <0x8000>; // L1, 32K
38 timebase-frequency = <0>; // 33 MHz, from uboot
39 bus-frequency = <0>; // 166 MHz
40 clock-frequency = <0>; // 825 MHz, from uboot
47 reg = <0x0 0x8000000>; // 128M at 0x0
55 ranges = <0x0 0xe0000000 0x100000>;
[all …]
H A Dmpc8560ads.dts30 #size-cells = <0>;
32 PowerPC,8560@0 {
34 reg = <0x0>;
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
47 reg = <0x0 0x10000000>;
55 ranges = <0x0 0xe0000000 0x100000>;
58 ecm-law@0 {
60 reg = <0x0 0x1000>;
66 reg = <0x1000 0x1000>;
[all …]
/freebsd-src/sys/dev/syscons/
H A Dscvgarndr.c54 #define SC_RENDER_DEBUG 0
108 RENDERER(mda, 0, txtrndrsw, vga_set);
109 RENDERER(cga, 0, txtrndrsw, vga_set);
110 RENDERER(ega, 0, txtrndrsw, vga_set);
111 RENDERER(vga, 0, txtrndrsw, vga_set);
161 0xC000, 0xA000, 0x9000, 0x8800, 0x8400, 0x8200, 0x8100, 0x8200,
162 0x8400, 0x8400, 0x8400, 0x9200, 0xB200, 0xA900, 0xC900, 0x8600, }, {
163 0x0000, 0x4000, 0x6000, 0x7000, 0x7800, 0x7C00, 0x7E00, 0x7C00,
164 0x7800, 0x7800, 0x7800, 0x6C00, 0x4C00, 0x4600, 0x0600, 0x0000, },
169 0xC000, 0xA000, 0x9000, 0x8800, 0x8400, 0x8200, 0x8100, 0x8700,
[all …]
/freebsd-src/sys/dts/powerpc/
H A Dmpc8555cds.dts80 #size-cells = <0>;
82 PowerPC,8555@0 {
84 reg = <0x0>;
87 d-cache-size = <0x8000>; // L1, 32K
88 i-cache-size = <0x8000>; // L1, 32K
89 timebase-frequency = <0>; // 33 MHz, from uboot
90 bus-frequency = <0>; // 166 MHz
91 clock-frequency = <0>; // 825 MHz, from uboot
98 reg = <0x0 0x10000000>; // 256M at 0x0
105 reg = <0xe0005000 0x1000>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc4357.dtsi18 cpu@0 {
26 reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */
31 reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */
36 reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */
/freebsd-src/sys/contrib/device-tree/Bindings/mailbox/
H A Dxgene-slimpro-mailbox.txt14 - interrupts: 8 interrupts must be from 0 to 7, interrupt 0 define the
15 the interrupt for mailbox channel 0 and interrupt 1 for
25 reg = <0x0 0x10540000 0x0 0xa000>;
27 interrupts = <0x0 0x0 0x4>,
28 <0x0 0x1 0x4>,
29 <0x0 0x2 0x4>,
30 <0x0 0x3 0x4>,
31 <0x0 0x4 0x4>,
32 <0x0 0x5 0x4>,
33 <0x0 0x6 0x4>,
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-pm8841.dtsi10 polling-delay = <0>;
40 reg = <0x4 SPMI_USID>;
42 #size-cells = <0>;
46 reg = <0xa000>;
49 gpio-ranges = <&pm8841_mpps 0 0 4>;
56 reg = <0x2400>;
57 interrupts = <4 0x24 0 IRQ_TYPE_EDGE_RISING>;
58 #thermal-sensor-cells = <0>;
64 reg = <0x5 SPMI_USID>;
66 #size-cells = <0>;
H A Dpm8841.dtsi10 polling-delay = <0>;
40 reg = <0x4 SPMI_USID>;
42 #size-cells = <0>;
46 reg = <0xa000>;
49 gpio-ranges = <&pm8841_mpps 0 0 4>;
56 reg = <0x2400>;
57 interrupts = <4 0x24 0 IRQ_TYPE_EDGE_RISING>;
58 #thermal-sensor-cells = <0>;
64 reg = <0x5 SPMI_USID>;
66 #size-cells = <0>;
H A Dqcom-pma8084.dtsi8 pma8084_0: pma8084@0 {
10 reg = <0x0 SPMI_USID>;
12 #size-cells = <0>;
16 reg = <0x6000>,
17 <0x6100>;
19 interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
24 reg = <0x800>;
25 interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
32 reg = <0xc000>;
34 gpio-ranges = <&pma8084_gpios 0 0 22>;
[all …]
H A Dpma8084.dtsi9 pma8084_0: pma8084@0 {
11 reg = <0x0 SPMI_USID>;
13 #size-cells = <0>;
17 reg = <0x6000>,
18 <0x6100>;
20 interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
25 reg = <0x800>;
29 interrupts = <0x
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/
H A Dpmi8994.dtsi9 reg = <0x2 SPMI_USID>;
11 #size-cells = <0>;
15 reg = <0xc000>;
17 gpio-ranges = <&pmi8994_gpios 0 0 10>;
25 reg = <0xa000>;
27 gpio-ranges = <&pmi8994_mpps 0 0 4>;
36 reg = <0x
[all...]
H A Dpmi8950.dtsi11 reg = <0x2 SPMI_USID>;
13 #size-cells = <0>;
17 reg = <0x3100>;
18 interrupts = <0x2 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
20 #size-cells = <0>;
23 channel@0 {
62 reg = <0xa000>;
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,sm8450-gpucc.yaml60 reg = <0 0x03d90000 0 0xa000>;
/freebsd-src/stand/i386/libi386/
H A Damd64_tramp.S31 #define MSR_EFER 0xc0000080
32 #define EFER_LME 0x00000100
33 #define CR4_PAE 0x00000020
34 #define CR4_PSE 0x00000010
35 #define CR0_PG 0x80000000
38 #define VPBASE 0xa000
43 .p2align 12,0x40
47 .space 0x1000
50 .space 0x1000
53 .space 0x1000
[all …]
/freebsd-src/stand/i386/zfsboot/
H A Dzfsldr.S17 .set MEM_ARG,0x900 # Arguments
18 .set MEM_ORG,0x7c00 # Origin
19 .set MEM_BUF,0x8000 # Load area
20 .set MEM_BTX,0x9000 # BTX start
21 .set MEM_JMP,0x9010 # BTX entry point
22 .set MEM_USR,0xa000 # Client start
23 .set BDA_BOOT,0x472 # Boot howto flag
26 .set PRT_OFF,0x1be # Partition offset
27 .set PRT_NUM,0x4 # Partitions
28 .set PRT_BSD,0xa5 # Partition type
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/arm/
H A Dversatile-pb.dts11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x10000
48 0x42000000 0x100000>;
49 bus-range = <0 0xff>;
54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/display/
H A Dzte,vou.txt79 ranges = <0 0x1440000 0x10000>;
81 dpc: dpc@0 {
83 reg = <0x0000 0x1000>, <0x1000 0x1000>,
84 <0x5000 0x1000>, <0x6000 0x1000>,
85 <0xa000 0x1000>;
98 reg = <0x8000 0x1000>;
102 zte,vga-power-control = <&sysctrl 0x170 0xe0>;
107 reg = <0xc000 0x4000>;
117 reg = <0x2000 0x1000>;
118 zte,tvenc-power-control = <&sysctrl 0x170 0x10>;
/freebsd-src/sys/dev/mwl/
H A Dmwldiag.h46 MWL_DIAG_CMD_REVS = 0, /* MAC/PHY/Radio revs */
74 #define MWL_DIAG_BASE_MAC 0xa000
76 (MWL_DIAG_BASE_MAC <= (r) && (r) < (MWL_DIAG_BASE_MAC+0x1000))
77 #define MWL_DIAG_BASE_BB 0xe000
79 (MWL_DIAG_BASE_BB <= (r) && (r) < (MWL_DIAG_BASE_BB+0x1000))
80 #define MWL_DIAG_BASE_RF 0xf000
82 (MWL_DIAG_BASE_RF <= (r) && (r) < (MWL_DIAG_BASE_RF+0x1000))
96 #define MWL_DIAG_DYN 0x8000 /* allocate buffer in caller */
97 #define MWL_DIAG_IN 0x4000 /* copy in parameters */
98 #define MWL_DIAG_OUT 0x0000 /* copy out results (always) */
[all …]

1234567