/llvm-project/llvm/test/MC/Disassembler/ARM/ |
H A D | move-banked-regs-arm.txt | 4 [0x00,0x22,0x00,0xe1] 5 [0x00,0x32,0x01,0xe1] 6 [0x00,0x52,0x02,0xe1] 7 [0x00,0x72,0x03,0xe1] 8 [0x00,0xb2,0x04,0xe1] 9 [0x00,0x12,0x05,0xe1] 10 [0x00,0x22,0x06,0xe1] 19 [0x00,0x22,0x08,0xe1] 20 [0x00,0x32,0x09,0xe1] 21 [0x00,0x52,0x0a,0xe1] [all …]
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H A D | load-store-acquire-release-v8.txt | 2 0x9f 0x0e 0xd8 0xe1 3 0x9f 0x1e 0xfc 0xe1 4 0x9f 0x1e 0x90 0xe1 5 0x9f 0x8e 0xbd 0xe1 6 # CHECK: ldaexb r0, [r8] @ encoding: [0x9f,0x0e,0xd8,0xe1] 7 # CHECK: ldaexh r1, [r12] @ encoding: [0x9f,0x1e,0xfc,0xe1] 8 # CHECK: ldaex r1, [r0] @ encoding: [0x9f,0x1e,0x90,0xe1] 9 # CHECK: ldaexd r8, r9, [sp] @ encoding: [0x9f,0x8e,0xbd,0xe1] 11 0x93 0x1e 0xc4 0xe1 12 0x92 0x4e 0xe5 0xe1 [all …]
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H A D | vmrs-vmsr-invalid.txt | 5 # CHECK: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] 6 [0xe1,0xee,0x11,0x0a] 9 # CHECK: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] 10 [0xe1,0xee,0x12,0x0a] 13 # CHECK: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] 14 [0xe1,0xee,0x13,0x0a] 17 # CHECK: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] 18 [0xe1,0xee,0x14,0x0a] 21 # CHECK: vmsr fpscr, r0 @ encoding: [0xe1,0xee,0x10,0x0a] 22 [0xe1,0xee,0x15,0x0a] [all …]
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H A D | arm-LDREXD-reencoding.txt | 3 0x9f 0x0f 0xb0 0xe1 4 0x9f 0xcf 0xb1 0xe1 5 0x9f 0xcf 0xb3 0xe1 6 0x9f 0x8f 0xbd 0xe1 7 0x9f 0xcf 0xbe 0xe1 9 # CHECK: ldrexd r0, r1, [r0] @ encoding: [0x9f,0x0f,0xb0,0xe1] 10 # CHECK: ldrexd r12, sp, [r1] @ encoding: [0x9f,0xcf,0xb1,0xe1] 11 # CHECK: ldrexd r12, sp, [r3] @ encoding: [0x9f,0xcf,0xb3,0xe1] 12 # CHECK: ldrexd r8, r9, [sp] @ encoding: [0x9f,0x8f,0xbd,0xe1] 13 # CHECK: ldrexd r12, sp, [lr] @ encoding: [0x9f,0xcf,0xbe,0xe1]
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H A D | arm-STREXD-reencoding.txt | 3 0x92 0x1f 0xa0 0xe1 4 0x90 0x4f 0xa3 0xe1 5 0x92 0xdf 0xa4 0xe1 6 0x90 0xaf 0xa6 0xe1 7 0x9c 0x5f 0xa8 0xe1 9 # CHECK: strexd r1, r2, r3, [r0] @ encoding: [0x92,0x1f,0xa0,0xe1] 10 # CHECK: strexd r4, r0, r1, [r3] @ encoding: [0x90,0x4f,0xa3,0xe1] 11 # CHECK: strexd sp, r2, r3, [r4] @ encoding: [0x92,0xdf,0xa4,0xe1] 12 # CHECK: strexd r10, r0, r1, [r6] @ encoding: [0x90,0xaf,0xa6,0xe1] 13 # CHECK: strexd r5, r12, sp, [r8] @ encoding: [0x9c,0x5f,0xa8,0xe1]
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H A D | arm-vmrs_vmsr.txt | 8 [0x10,0xfa,0xf1,0xee] 9 [0x10,0xfa,0xf1,0xee] 10 [0x10,0xfa,0xf1,0xee] 11 [0x10,0xaa,0xf1,0xee] 12 [0x10,0x2a,0xf0,0xee] 13 [0x10,0x3a,0xf0,0xee] 14 [0x10,0x4a,0xf7,0xee] 15 [0x10,0x5a,0xf6,0xee] 16 [0x10,0x6a,0xf5,0xee] 17 [0x10,0xda,0xf1,0xee] [all …]
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H A D | unpredictable-MVN-arm.txt | 6 # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 8 # | cond | 0 0| 0| 1 1 1 1| S|(0)(0)(0)(0)| Rd | imm5 |type | 0| Rm | 13 # CHECK: 0x03 0x20 0xe1 0xe1 14 0x03 0x20 0xe1 0xe1 19 # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 21 # | cond | 0 0| 0| 1 1 1 1| S|(0)(0)(0)(0)| Rd | Rs | 0|type | 1| Rm | 27 # CHECK: 0x1f 0x57 0xe0 0xe1 28 0x1f 0x57 0xe0 0xe1 32 # CHECK: 0x16 0xf7 0xe0 0xe1 33 0x16 0xf7 0xe0 0xe1 [all …]
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/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
H A D | gfx908-atomic-fadd-insts.txt | 3 …omic_add_f32 v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x03] 4 0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x03 6 …ic_add_f32 v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0xff,0x02,0x03] 7 0xff,0x0f,0x34,0xe1,0x00,0xff,0x02,0x03 9 …mic_add_f32 v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x03,0x03] 10 0xff,0x0f,0x34,0xe1,0x00,0x05,0x03,0x03 12 …mic_add_f32 v5, off, s[96:99], s3 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x18,0x03] 13 0xff,0x0f,0x34,0xe1,0x00,0x05,0x18,0x03 15 …ic_add_f32 v5, off, s[8:11], s101 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x65] 16 0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x65 [all …]
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H A D | gfx8_mubuf.txt | 3 …oad_format_x v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03] 4 0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03 6 …d_format_x v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0xff,0x02,0x03] 7 0xff,0x0f,0x00,0xe0,0x00,0xff,0x02,0x03 9 …ad_format_x v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x03,0x03] 10 0xff,0x0f,0x00,0xe0,0x00,0x05,0x03,0x03 12 …ad_format_x v5, off, s[96:99], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x18,0x03] 13 0xff,0x0f,0x00,0xe0,0x00,0x05,0x18,0x03 15 …_format_x v5, off, ttmp[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x1e,0x03] 16 0xff,0x0f,0x00,0xe0,0x00,0x05,0x1e,0x03 [all …]
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H A D | gfx9_mubuf.txt | 3 …oad_format_x v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03] 4 0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03 6 …d_format_x v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0xff,0x02,0x03] 7 0xff,0x0f,0x00,0xe0,0x00,0xff,0x02,0x03 9 …ad_format_x v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x03,0x03] 10 0xff,0x0f,0x00,0xe0,0x00,0x05,0x03,0x03 12 …ad_format_x v5, off, s[96:99], s3 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x18,0x03] 13 0xff,0x0f,0x00,0xe0,0x00,0x05,0x18,0x03 15 …d_format_x v5, off, s[8:11], s101 offset:4095 ; encoding: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x65] 16 0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x65 [all …]
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H A D | gfx10_mubuf.txt | 5 # GFX10: buffer_atomic_add v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0xc8,0xe0,0x00,0xff,0x02,0x03] 6 0xff,0x0 [all...] |
H A D | gfx11_dasm_mubuf.txt | 3 … ; encoding: [0x00,0x00,0xac,0xe0,0x00,0x00,0x00,0x00] 4 0x00,0x00,0xac,0xe0,0x00,0x00,0x00,0x00 6 … ; encoding: [0x00,0x00,0xb0,0xe0,0x00,0x00,0x00,0x00] 7 0x00,0x00,0xb0,0xe0,0x00,0x00,0x00,0x00 9 … s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03] 10 0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03 12 …], s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03] 13 0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03 15 …, s3 offset:4095 ; encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x03,0x03] 16 0xff,0x0f,0x50,0xe0,0x00,0x05,0x03,0x03 [all …]
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/llvm-project/llvm/test/MC/ARM/ |
H A D | move-banked-regs.s | 11 @ CHECK-ARM: mrs r2, r8_usr @ encoding: [0x00,0x22,0x00,0xe1] 12 @ CHECK-ARM: mrs r3, r9_usr @ encoding: [0x00,0x32,0x01,0xe1] 13 @ CHECK-ARM: mrs r5, r10_usr @ encoding: [0x00,0x52,0x02,0xe1] 14 @ CHECK-ARM: mrs r7, r11_usr @ encoding: [0x00,0x72,0x03,0xe1] 15 @ CHECK-ARM: mrs r11, r12_usr @ encoding: [0x00,0xb2,0x04,0xe1] 16 @ CHECK-ARM: mrs r1, sp_usr @ encoding: [0x00,0x12,0x05,0xe1] 17 @ CHECK-ARM: mrs r2, lr_usr @ encoding: [0x00,0x22,0x06,0xe1] 18 @ CHECK-THUMB: mrs r2, r8_usr @ encoding: [0xe0,0xf3,0x20,0x82] 19 @ CHECK-THUMB: mrs r3, r9_usr @ encoding: [0xe1,0xf3,0x20,0x83] 20 @ CHECK-THUMB: mrs r5, r10_usr @ encoding: [0xe2,0xf3,0x20,0x85] [all …]
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H A D | load-store-acquire-release-v8.s | 9 @ CHECK: ldaexb r3, [r4] @ encoding: [0x9f,0x3e,0xd4,0xe1] 10 @ CHECK: ldaexh r2, [r5] @ encoding: [0x9f,0x2e,0xf5,0xe1] 11 @ CHECK: ldaex r1, [r7] @ encoding: [0x9f,0x1e,0x97,0xe1] 12 @ CHECK: ldaexd r6, r7, [r8] @ encoding: [0x9f,0x6e,0xb8,0xe1] 23 @ CHECK: ldaexd r6, r7, [r8] @ encoding: [0x9f,0x6e,0xb8,0xe1] 29 @ CHECK: stlexb r1, r3, [r4] @ encoding: [0x93,0x1e,0xc4,0xe1] 30 @ CHECK: stlexh r4, r2, [r5] @ encoding: [0x92,0x4e,0xe5,0xe1] 31 @ CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1] 32 @ CHECK: stlexd r6, r2, r3, [r8] @ encoding: [0x92,0x6e,0xa8,0xe1] 43 @ CHECK: stlexd r6, r2, r3, [r8] @ encoding: [0x92,0x6e,0xa8,0xe1] [all …]
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H A D | lsl-zero-errors.s | 5 // lsl #0 is actually mov, so here we check that it behaves the same as 9 lsl pc, r0, #0 10 lsl r0, pc, #0 11 lsl pc, pc, #0 12 lsls pc, r0, #0 13 lsls r0, pc, #0 14 lsls pc, pc, #0 17 // CHECK-NONARM-NEXT: lsl pc, r0, #0 22 // CHECK-NONARM-NEXT: lsl r0, pc, #0 27 // CHECK-NONARM-NEXT: lsl pc, pc, #0 [all …]
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/llvm-project/llvm/test/MC/AMDGPU/ |
H A D | atomic-fadd-insts.s | 5 // GFX908: encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x03] 8 // GFX908: encoding: [0xff,0x0f,0x34,0xe1,0x00,0xff,0x02,0x03] 11 // GFX908: encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x03,0x03] 14 // GFX908: encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x18,0x03] 17 // GFX908: encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x65] 20 // GFX908: encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x7c] 22 buffer_atomic_add_f32 v5, off, s[8:11], 0 offset:4095 23 // GFX908: encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x80] 26 // GFX908: encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0xc1] 29 // GFX908: encoding: [0xff,0x2f,0x34,0xe1,0x00,0x05,0x02,0x03] [all …]
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H A D | gfx8_asm_mubuf.s | 4 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03] 7 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0xff,0x02,0x03] 10 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x03,0x03] 13 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x18,0x03] 16 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x1e,0x03] 19 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x65] 22 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x66] 25 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x67] 28 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x6a] 31 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x6b] [all …]
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H A D | gfx9_asm_mubuf.s | 4 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03] 7 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0xff,0x02,0x03] 10 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x03,0x03] 13 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x18,0x03] 16 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x1e,0x03] 19 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x65] 22 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x66] 25 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x67] 28 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x6a] 31 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x6b] [all …]
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H A D | gfx7_asm_mubuf.s | 4 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x03] 7 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0xff,0x02,0x03] 10 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x03,0x03] 13 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x19,0x03] 16 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x1e,0x03] 19 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x67] 22 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x68] 25 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x69] 28 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x6a] 31 // CHECK: [0xff,0x0f,0x00,0xe0,0x00,0x05,0x02,0x6b] [all …]
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H A D | gfx11_asm_mubuf.s | 5 // GFX11: encoding: [0x00,0x00,0xac,0xe0,0x00,0x00,0x00,0x00] 8 // GFX11: encoding: [0x00,0x00,0xb0,0xe0,0x00,0x00,0x00,0x00] 11 // GFX11: encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x03] 14 // GFX11: encoding: [0xff,0x0f,0x50,0xe0,0x00,0xff,0x02,0x03] 17 // GFX11: encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x03,0x03] 20 // GFX11: encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x18,0x03] 23 // GFX11: encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x65] 26 // GFX11: encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x7d] 28 buffer_load_b32 v5, off, s[8:11], 0 offset:4095 29 // GFX11: encoding: [0xff,0x0f,0x50,0xe0,0x00,0x05,0x02,0x80] [all …]
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/llvm-project/llvm/test/MC/AArch64/SME/ |
H A D | st1q.s | 18 st1q {za0h.q[w12, 0]}, p0, [x0, x0, lsl #4] 19 // CHECK-INST: st1q {za0h.q[w12, 0]}, p0, [x0, x0, lsl #4] 20 // CHECK-ENCODING: [0x00,0x00,0xe0,0xe1] 24 st1q {za5h.q[w14, 0]}, p5, [x10, x21, lsl #4] 25 // CHECK-INST: st1q {za5h.q[w14, 0]}, p5, [x10, x21, lsl #4] 26 // CHECK-ENCODING: [0x45,0x55,0xf5,0xe1] 30 st1q {za7h.q[w15, 0]}, p3, [x13, x8, lsl #4] 31 // CHECK-INST: st1q {za7h.q[w15, 0]}, p3, [x13, x8, lsl #4] 32 // CHECK-ENCODING: [0xa7,0x6d,0xe8,0xe1] 36 st1q {za15h.q[w15, 0]}, p7, [sp] [all …]
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H A D | ld1q.s | 18 ld1q {za0h.q[w12, 0]}, p0/z, [x0, x0, lsl #4] 19 // CHECK-INST: ld1q {za0h.q[w12, 0]}, p0/z, [x0, x0, lsl #4] 20 // CHECK-ENCODING: [0x00,0x00,0xc0,0xe1] 24 ld1q {za5h.q[w14, 0]}, p5/z, [x10, x21, lsl #4] 25 // CHECK-INST: ld1q {za5h.q[w14, 0]}, p5/z, [x10, x21, lsl #4] 26 // CHECK-ENCODING: [0x45,0x55,0xd5,0xe1] 30 ld1q {za7h.q[w15, 0]}, p3/z, [x13, x8, lsl #4] 31 // CHECK-INST: ld1q {za7h.q[w15, 0]}, p3/z, [x13, x8, lsl #4] 32 // CHECK-ENCODING: [0xa7,0x6d,0xc8,0xe1] 36 ld1q {za15h.q[w15, 0]}, p7/z, [sp] [all …]
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H A D | ldr.s | 15 ldr za[w12, 0], [x0] 16 // CHECK-INST: ldr za[w12, 0], [x0] 17 // CHECK-ENCODING: [0x00,0x00,0x00,0xe1] 23 // CHECK-ENCODING: [0x45,0x41,0x00,0xe1] 29 // CHECK-ENCODING: [0xa7,0x61,0x00,0xe1] 35 // CHECK-ENCODING: [0xef,0x63,0x00,0xe1] 41 // CHECK-ENCODING: [0x25,0x02,0x00,0xe1] 47 // CHECK-ENCODING: [0x21,0x00,0x00,0xe1] 53 // CHECK-ENCODING: [0x68,0x42,0x00,0xe1] 57 ldr za[w12, 0], [x12] [all …]
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H A D | str.s | 15 str za[w12, 0], [x0] 16 // CHECK-INST: str za[w12, 0], [x0] 17 // CHECK-ENCODING: [0x00,0x00,0x20,0xe1] 23 // CHECK-ENCODING: [0x45,0x41,0x20,0xe1] 29 // CHECK-ENCODING: [0xa7,0x61,0x20,0xe1] 35 // CHECK-ENCODING: [0xef,0x63,0x20,0xe1] 41 // CHECK-ENCODING: [0x25,0x02,0x20,0xe1] 47 // CHECK-ENCODING: [0x21,0x00,0x20,0xe1] 53 // CHECK-ENCODING: [0x68,0x42,0x20,0xe1] 57 str za[w12, 0], [x12] [all …]
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/llvm-project/llvm/test/MC/AArch64/ |
H A D | arm64-verbose-vector-case.s | 7 // CHECK: pmull v8.8h, v8.8b, v8.8b // encoding: [0x08,0xe1,0x28,0x0e] 8 // CHECK: pmull2 v8.8h, v8.16b, v8.16b // encoding: [0x08,0xe1,0x28,0x4e] 9 // CHECK: pmull v8.1q, v8.1d, v8.1d // encoding: [0x08,0xe1,0xe8,0x0e] 10 // CHECK: pmull2 v8.1q, v8.2d, v8.2d // encoding: [0x08,0xe1,0xe8,0x4e] 16 // CHECK: pmull v8.8h, v8.8b, v8.8b // encoding: [0x08,0xe1,0x28,0x0e] 17 // CHECK: pmull2 v8.8h, v8.16b, v8.16b // encoding: [0x08,0xe1,0x28,0x4e] 18 // CHECK: pmull v8.1q, v8.1d, v8.1d // encoding: [0x08,0xe1,0xe8,0x0e] 19 // CHECK: pmull2 v8.1q, v8.2d, v8.2d // encoding: [0x08,0xe1,0xe8,0x4e]
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