/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
H A D | gfx8_flat.txt | 3 # CHECK: flat_load_ubyte v5, v[1:2] ; encoding: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x… 4 0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x05 6 # CHECK: flat_load_ubyte v255, v[1:2] ; encoding: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x… 7 0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0xff 9 # CHECK: flat_load_ubyte v5, v[254:255] ; encoding: [0x00,0x00,0x40,0xdc,0xfe,0x00,0x00,0x… 10 0x00,0x00,0x40,0xdc,0xfe,0x00,0x00,0x05 12 # CHECK: flat_load_ubyte v5, v[1:2] glc ; encoding: [0x00,0x00,0x41,0xdc,0x01,0x00,0x00,0x… 13 0x00,0x00,0x41,0xdc,0x01,0x00,0x00,0x05 15 # CHECK: flat_load_ubyte v5, v[1:2] slc ; encoding: [0x00,0x00,0x42,0xdc,0x01,0x00,0x00,0x… 16 0x00,0x00,0x42,0xdc,0x01,0x00,0x00,0x05 [all …]
|
H A D | gfx9_flat.txt | 3 # CHECK: flat_load_ubyte v5, v[1:2] offset:4095 ; encoding: [0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0x… 4 0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0x05 6 # CHECK: flat_load_ubyte v255, v[1:2] offset:4095 ; encoding: [0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0… 7 0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0xff 9 …K: flat_load_ubyte v5, v[254:255] offset:4095 ; encoding: [0xff,0x0f,0x40,0xdc,0xfe,0x00,0x00,0x05] 10 0xff,0x0f,0x40,0xdc,0xfe,0x00,0x00,0x05 12 # CHECK: flat_load_ubyte v5, v[1:2] ; encoding: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x… 13 0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x05 15 # CHECK: flat_load_ubyte v5, v[1:2] offset:7 ; encoding: [0x07,0x00,0x40,0xdc,0x01,0x00,0x00,0x… 16 0x07,0x00,0x40,0xdc,0x01,0x00,0x00,0x05 [all …]
|
H A D | gfx11_dasm_flat.txt | 7 # GFX11: flat_atomic_add_f32 v[1:2], v2 ; encoding: [0x00,0x00,0x58,0xdd,0x01,0x02,0x7c,0x00] 8 0x00,0x00,0x58,0xdd,0x01,0x02,0x7c,0x00 10 …atomic_add_f32 v5, v[1:2], v2 offset:4095 glc ; encoding: [0xff,0x4f,0x58,0xdd,0x01,0x02,0x7c,0x05] 11 0xff,0x4f,0x58,0xdd,0x01,0x02,0x7c,0x05 13 …2 v255, v[254:255], v255 offset:7 glc slc dlc ; encoding: [0x07,0xe0,0x58,0xdd,0xfe,0xff,0x7c,0xff] 14 0x07,0xe0,0x58,0xdd,0xfe,0xff,0x7c,0xff 16 # GFX11: flat_atomic_add_u32 v[1:2], v2 ; encoding: [0x00,0x00,0xd4,0xdc,0x01,0x02,0x7c,0x00] 17 0x00,0x00,0xd4,0xdc,0x01,0x02,0x7c,0x00 19 …atomic_add_u32 v5, v[1:2], v2 offset:4095 glc ; encoding: [0xff,0x4f,0xd4,0xdc,0x01,0x02,0x7c,0x05] 20 0xff,0x4f,0xd4,0xdc,0x01,0x02,0x7c,0x05 [all …]
|
H A D | gfx10_flat.txt | 9 # GFX10: scratch_load_dword v1, v255, off offset:-1 glc dlc ; encoding: [0xff,0x5f,0x31,0xdc,0xff,0x00,0x7d,0x01] 10 0xff 0x5 [all...] |
H A D | gfx90a_features.txt | 3 # GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] ; encoding: [0x08,0x40,0xb0,0xd3,0x00,0x01,0x… 4 0x08,0x40,0xb0,0xd3,0x00,0x01,0x10,0x1c 6 # GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] ; encoding: [0x08,0x40,0xb0,0xd3,0x00,0x01,0x… 7 0x08,0x40,0xb0,0xd3,0x00,0x01,0x10,0x1c 9 # GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] ; encoding: [0x08,0x40,0xb0,0xd3,0x00,0x01,0x… 10 0x08,0x40,0xb0,0xd3,0x00,0x01,0x10,0x1c 12 # GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] ; encoding: [0x08,0x40,0xb0,0xd3,0x00,0x01,0x… 13 0x08,0x40,0xb0,0xd3,0x00,0x01,0x10,0x1c 15 … GFX90A: v_pk_fma_f32 v[8:9], v[0:1], s[0:1], v[4:5] op_sel_hi:[0,0,0] ; encoding: [0x08,0x00,0xb0… 16 0x08,0x00,0xb0,0xd3,0x00,0x01,0x10,0x04 [all …]
|
H A D | gfx908-atomic-fadd-insts.txt | 3 …omic_add_f32 v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x03] 4 0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x03 6 …ic_add_f32 v255, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0xff,0x02,0x03] 7 0xff,0x0f,0x34,0xe1,0x00,0xff,0x02,0x03 9 …mic_add_f32 v5, off, s[12:15], s3 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x03,0x03] 10 0xff,0x0f,0x34,0xe1,0x00,0x05,0x03,0x03 12 …mic_add_f32 v5, off, s[96:99], s3 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x18,0x03] 13 0xff,0x0f,0x34,0xe1,0x00,0x05,0x18,0x03 15 …ic_add_f32 v5, off, s[8:11], s101 offset:4095 ; encoding: [0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x65] 16 0xff,0x0f,0x34,0xe1,0x00,0x05,0x02,0x65 [all …]
|
/llvm-project/llvm/test/MC/AMDGPU/ |
H A D | gfx8_asm_flat.s | 4 // CHECK: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x05] 7 // CHECK: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0xff] 10 // CHECK: [0x00,0x00,0x40,0xdc,0xfe,0x00,0x00,0x05] 13 // CHECK: [0x00,0x00,0x41,0xdc,0x01,0x00,0x00,0x05] 16 // CHECK: [0x00,0x00,0x42,0xdc,0x01,0x00,0x00,0x05] 19 // CHECK: [0x00,0x00,0x44,0xdc,0x01,0x00,0x00,0x05] 22 // CHECK: [0x00,0x00,0x44,0xdc,0x01,0x00,0x00,0xff] 25 // CHECK: [0x00,0x00,0x44,0xdc,0xfe,0x00,0x00,0x05] 28 // CHECK: [0x00,0x00,0x45,0xdc,0x01,0x00,0x00,0x05] 31 // CHECK: [0x00,0x00,0x46,0xdc,0x01,0x00,0x00,0x05] [all …]
|
H A D | gfx9_asm_flat.s | 4 // CHECK: [0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0x05] 7 // CHECK: [0xff,0x0f,0x40,0xdc,0x01,0x00,0x00,0xff] 10 // CHECK: [0xff,0x0f,0x40,0xdc,0xfe,0x00,0x00,0x05] 13 // CHECK: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x05] 15 flat_load_ubyte v5, v[1:2] offset:0 16 // CHECK: [0x00,0x00,0x40,0xdc,0x01,0x00,0x00,0x05] 19 // CHECK: [0x07,0x00,0x40,0xdc,0x01,0x00,0x00,0x05] 22 // CHECK: [0xff,0x0f,0x41,0xdc,0x01,0x00,0x00,0x05] 25 // CHECK: [0xff,0x0f,0x42,0xdc,0x01,0x00,0x00,0x05] 28 // CHECK: [0xff,0x0f,0x44,0xdc,0x01,0x00,0x00,0x05] [all …]
|
H A D | gfx7_asm_flat.s | 4 // CHECK: [0x00,0x00,0x20,0xdc,0x01,0x00,0x00,0x05] 7 // CHECK: [0x00,0x00,0x20,0xdc,0x01,0x00,0x00,0xff] 10 // CHECK: [0x00,0x00,0x20,0xdc,0xfe,0x00,0x00,0x05] 13 // CHECK: [0x00,0x00,0x21,0xdc,0x01,0x00,0x00,0x05] 16 // CHECK: [0x00,0x00,0x22,0xdc,0x01,0x00,0x00,0x05] 19 // CHECK: [0x00,0x00,0x24,0xdc,0x01,0x00,0x00,0x05] 22 // CHECK: [0x00,0x00,0x24,0xdc,0x01,0x00,0x00,0xff] 25 // CHECK: [0x00,0x00,0x24,0xdc,0xfe,0x00,0x00,0x05] 28 // CHECK: [0x00,0x00,0x25,0xdc,0x01,0x00,0x00,0x05] 31 // CHECK: [0x00,0x00,0x26,0xdc,0x01,0x00,0x00,0x05] [all …]
|
H A D | flat.s | 13 // NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU 14 // CI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x30,0xdc,0x03,0x00,0x00,0x01] 15 // VI: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x00,0x01] 18 // NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU 19 // CI: flat_load_dword v1, v[3:4] glc ; encoding: [0x00,0x00,0x31,0xdc,0x03,0x00,0x00,0x01] 20 // VI: flat_load_dword v1, v[3:4] glc ; encoding: [0x00,0x00,0x51,0xdc,0x03,0x00,0x00,0x01] 23 // NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU 24 // CI: flat_load_dword v1, v[3:4] glc slc ; encoding: [0x00,0x00,0x33,0xdc,0x03,0x00,0x00,0x01] 25 // VI: flat_load_dword v1, v[3:4] glc slc ; encoding: [0x00,0x00,0x53,0xdc,0x03,0x00,0x00,0x01] 28 // NOSI: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU [all …]
|
H A D | gfx10_asm_flat.s | 9 // GFX10: encoding: [0x00,0x00,0x20,0xdc,0x01,0x00,0x7d,0x05] 12 // GFX10: encoding: [0x00,0x0 [all...] |
H A D | flat-global.s | 9 // GFX10: encoding: [0x00,0x80,0x20,0xdc,0x03,0x00,0x7d,0x01] 10 // GFX9: global_load_ubyte v1, v[3:4], off ; encoding: [0x00,0x8 [all...] |
H A D | gfx11_asm_flat.s | 9 // GFX11: [0x00,0x00,0xd4,0xdc,0x01,0x02,0x7c,0x00] 12 // GFX11: [0xff,0x0 [all...] |
H A D | flat-gfx9.s | 8 flat_load_dword v1, v[3:4] offset:0 9 // GCN: flat_load_dword v1, v[3:4] ; encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x00,0x01] 16 // GFX9: flat_load_dword v1, v[3:4] offset:4095 ; encoding: [0xff,0x0f,0x50,0xdc,0x03,0x00,0x00,0x0… 24 // GFX9: flat_load_dword v1, v[3:4] offset:4 glc ; encoding: [0x04,0x00,0x51,0xdc,0x03,0x00,0x00,0x… 28 …: flat_load_dword v1, v[3:4] offset:4 glc slc ; encoding: [0x04,0x00,0x53,0xdc,0x03,0x00,0x00,0x01] 32 // GFX9: flat_atomic_add v[3:4], v5 offset:8 slc ; encoding: [0x08,0x00,0x0a,0xdd,0x03,0x05,0x00,0x… 36 // GFX9: flat_atomic_add v[3:4], v5 offset:8 slc ; encoding: [0x08,0x00,0x0a,0xdd,0x03,0x05,0x00,0x… 40 …lat_atomic_cmpswap v[1:2], v[3:4] offset:4095 ; encoding: [0xff,0x0f,0x04,0xdd,0x01,0x03,0x00,0x00] 44 …atomic_cmpswap v[1:2], v[3:4] offset:4095 slc ; encoding: [0xff,0x0f,0x06,0xdd,0x01,0x03,0x00,0x00] 48 // GFX9: flat_atomic_cmpswap v[1:2], v[3:4] ; encoding: [0x00,0x00,0x04,0xdd,0x01,0x03,0x00,0x00] [all …]
|
/llvm-project/llvm/test/MC/X86/ |
H A D | avx512vl_gfni-att.s | 4 // CHECK: encoding: [0x62,0xf3,0xdd,0x00,0xcf,0xca,0x07] 8 // CHECK: encoding: [0x62,0xf [all...] |
H A D | AVX2-32.s | 4 // CHECK: encoding: [0xc4,0xe2,0x7d,0x5a,0xa4,0x82,0x10,0xe3,0x0f,0xe3] 8 // CHECK: encoding: [0xc4,0xe2,0x7d,0x5a,0xa4,0x82,0xf0,0x1c,0xf0,0x1c] 12 // CHECK: encoding: [0xc4,0xe2,0x7d,0x5a,0xa2,0xf0,0x1c,0xf0,0x1c] 16 // CHECK: encoding: [0xc4,0xe2,0x7d,0x5a,0x25,0xf0,0x1c,0xf0,0x1c] 20 // CHECK: encoding: [0xc4,0xe2,0x7d,0x5a,0x64,0x02,0x40] 24 // CHECK: encoding: [0xc4,0xe2,0x7d,0x5a,0x22] 28 // CHECK: encoding: [0xc4,0xe2,0x7d,0x19,0xe1] 32 // CHECK: encoding: [0xc4,0xe2,0x79,0x18,0xc9] 36 // CHECK: encoding: [0xc4,0xe2,0x7d,0x18,0xe1] 39 // CHECK: vextracti128 $0, %ymm4, -485498096(%edx,%eax,4) [all …]
|
H A D | avx512gfni-att.s | 4 // CHECK: encoding: [0x62,0xf3,0xdd,0x40,0xcf,0xca,0x07] 8 // CHECK: encoding: [0x62,0xf [all...] |
H A D | FMA-32.s | 4 // CHECK: encoding: [0xc4,0xe2,0xf1,0x98,0x8c,0x82,0x10,0xe3,0x0f,0xe3] 8 // CHECK: encoding: [0xc4,0xe2,0xf1,0x98,0x8c,0x82,0xf0,0x1c,0xf0,0x1c] 12 // CHECK: encoding: [0xc4,0xe2,0xdd,0x98,0xa4,0x82,0x10,0xe3,0x0f,0xe3] 16 // CHECK: encoding: [0xc4,0xe2,0xdd,0x98,0xa4,0x82,0xf0,0x1c,0xf0,0x1c] 20 // CHECK: encoding: [0xc4,0xe2,0xf1,0x98,0x8a,0xf0,0x1c,0xf0,0x1c] 24 // CHECK: encoding: [0xc4,0xe2,0xdd,0x98,0xa2,0xf0,0x1c,0xf0,0x1c] 28 // CHECK: encoding: [0xc4,0xe2,0xf1,0x98,0x0d,0xf0,0x1c,0xf0,0x1c] 32 // CHECK: encoding: [0xc4,0xe2,0xdd,0x98,0x25,0xf0,0x1c,0xf0,0x1c] 36 // CHECK: encoding: [0xc4,0xe2,0xf1,0x98,0x4c,0x02,0x40] 40 // CHECK: encoding: [0xc4,0xe2,0xdd,0x98,0x64,0x02,0x40] [all …]
|
/llvm-project/llvm/test/MC/Disassembler/X86/ |
H A D | fp-stack.txt | 4 # CHECK: fadd %st(0), %st 5 0xd8,0xc0 8 0xd8,0xc1 11 0xd8,0xc2 14 0xd8,0xc3 17 0xd8,0xc4 20 0xd8,0xc5 23 0xd8,0xc6 26 0xd8,0xc7 28 # CHECK: fmul %st(0), %st [all …]
|
/llvm-project/llvm/unittests/DebugInfo/CodeView/ |
H A D | GUIDFormatTest.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 39 std::string GuidText(formatv("{0}", Item.second).str()); in checkData() 70 EXPECT_TRUE(to_integer(Component[0], G.Data0, 16)); in checkData() 82 // Shifting 2 (0x00) in TEST() 86 {0x44, 0x33, 0x22, 0x11, 0x66, 0x55, 0x88, 0x77, 0x99, 0xaa, 0xbb, 0xcc, in TEST() 87 0xdd, 0xee, 0xff, 0xaa}}, in TEST() 91 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, in TEST() 92 0x00, 0x00, 0x00, 0x00}}, in TEST() 94 // Shift 2 (0x00) across all components in TEST() 96 {0x44, 0x33, 0x00, 0x00, 0x66, 0x55, 0x88, 0x77, 0x99, 0xaa, 0xbb, 0xcc, in TEST() [all …]
|
/llvm-project/llvm/test/MC/PowerPC/ |
H A D | htm.s | 4 # CHECK-BE: tbegin. 0 # encoding: [0x7c,0x00,0x05,0x1d] 5 # CHECK-LE: tbegin. 0 # encoding: [0x1d,0x05,0x00,0x7c] 6 tbegin. 0 7 # CHECK-BE: tbegin. 1 # encoding: [0x7c,0x20,0x05,0x1d] 8 # CHECK-LE: tbegin. 1 # encoding: [0x1d,0x05,0x20,0x7c] 11 # CHECK-BE: tend. # encoding: [0x7c,0x00,0x05,0x5d] 12 # CHECK-LE: tend. # encoding: [0x5d,0x05,0x00,0x7c] 13 tend. 0 14 # CHECK-BE: tendall. # encoding: [0x7e,0x00,0x05,0x5d] 15 # CHECK-LE: tendall. # encoding: [0x5d,0x05,0x00,0x7e] [all …]
|
/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
H A D | armv8.4a-actmon.txt | 4 [0x00,0xd2,0x1b,0xd5] 5 [0x60,0xd2,0x1b,0xd5] 6 [0x80,0xd2,0x1b,0xd5] 7 [0xa0,0xd2,0x1b,0xd5] 8 [0x00,0xd4,0x1b,0xd5] 9 [0x20,0xd4,0x1b,0xd5] 10 [0x40,0xd4,0x1b,0xd5] 11 [0x60,0xd4,0x1b,0xd5] 12 [0x00,0xd3,0x1b,0xd5] 13 [0x20,0xd3,0x1b,0xd5] [all …]
|
/llvm-project/llvm/test/MC/Disassembler/PowerPC/ |
H A D | vsx.txt | 4 0x7c 0xe5 0xfc 0x98 7 0x7c 0xe5 0xf8 0x98 10 0x7c 0xe5 0xf8 0x18 13 0x7c 0xe5 0xfc 0x18 16 0x7c 0xe5 0xfe 0x98 19 0x7c 0xe5 0xfa 0x98 22 0x7c 0xe5 0xfe 0x18 25 0x7d 0x05 0xfd 0x98 28 0x7d 0x05 0xf9 0x18 31 0x7d 0x05 0xfd 0x18 [all …]
|
/llvm-project/llvm/test/MC/VE/ |
H A D | VFDV.s | 7 # CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xdd] 11 # CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xdd] 15 # CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0xa0,0xdd] 19 # CHECK-ENCODING: encoding: [0x00,0x00,0x16,0xff,0x00,0x16,0x90,0xdd] 23 # CHECK-ENCODING: encoding: [0x00,0x00,0x16,0x0b,0x00,0x3f,0x9b,0xdd]
|
/llvm-project/llvm/test/MC/Disassembler/X86/KEYLOCKER/ |
H A D | Keylocker-x86-32-intel.txt | 4 0xf3,0x0f,0x38,0xdd,0x94,0xf4,0x00,0x00,0x00,0x10 7 0xf3,0x0f,0x38,0xdd,0x94,0x87,0x23,0x01,0x00,0x00 10 0xf3,0x0f,0x38,0xdd,0x10 13 0xf3,0x0f,0x38,0xdd,0x14,0x6d,0x00,0xfa,0xff,0xff 16 0xf3,0x0f,0x38,0xdd,0x91,0xd0,0x17,0x00,0x00 19 0xf3,0x0f,0x38,0xdd,0x92,0x00,0xe8,0xff,0xff 22 0xf3,0x0f,0x38,0xdf,0x94,0xf4,0x00,0x00,0x00,0x10 25 0xf3,0x0f,0x38,0xdf,0x94,0x87,0x23,0x01,0x00,0x00 28 0xf3,0x0f,0x38,0xdf,0x10 31 0xf3,0x0f,0x38,0xdf,0x14,0x6d,0x00,0xf8,0xff,0xff [all …]
|