/llvm-project/llvm/test/MC/AMDGPU/ |
H A D | gfx7_asm_vintrp.s | 4 // CHECK: [0x01,0x00,0x14,0xc8] 7 // CHECK: [0x01,0x00,0xfc,0xcb] 10 // CHECK: [0xff,0x00,0x14,0xc8] 13 // CHECK: [0x01,0x04,0x14,0xc8] 16 // CHECK: [0x01,0x7c,0x14,0xc8] 19 // CHECK: [0x01,0x80,0x14,0xc8] 22 // CHECK: [0x01,0x01,0x14,0xc8] 25 // CHECK: [0x01,0x02,0x14,0xc8] 28 // CHECK: [0x01,0x03,0x14,0xc8] 31 // CHECK: [0x01,0x00,0x15,0xc8] [all …]
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H A D | vintrp.s | 5 // SI: v_interp_p1_f32 v1, v0, attr0.x ; encoding: [0x00,0x00,0x04,0xc8] 6 // VI: v_interp_p1_f32_e32 v1, v0, attr0.x ; encoding: [0x00,0x00,0x04,0xd4] 9 // SI: v_interp_p1_f32 v2, v0, attr0.y ; encoding: [0x0 [all...] |
H A D | gfx11_asm_vopd_features.s | 10 v_dual_mul_f32 v11, v1, v2 :: v_dual_mul_f32 v10, 0x24681357, v5 11 // GFX11: encoding: [0x01,0x05,0xc6,0xc8,0xff,0x0a,0x0a,0x0b,0x57,0x13,0x68,0x24] 15 v_dual_mul_f32 v11, 0x24681357, v2 :: v_dual_mul_f32 v10, 0x24681357, v5 16 // GFX11: encoding: [0xff,0x04,0xc6,0xc8,0xff,0x0a,0x0a,0x0b,0x57,0x13,0x68,0x24] 20 v_dual_add_f32 v6, 0xfe0b, v5 :: v_dual_dot2acc_f32_f16 v255, 0xfe0b, v4 21 // GFX11: encoding: [0xff,0x0a,0x18,0xc9,0xff,0x08,0xfe,0x06,0x0b,0xfe,0x00,0x00] 25 v_dual_add_f32 v5, 0xaf123456, v2 :: v_dual_fmaak_f32 v6, v3, v1, 0xaf123456 ; 26 // GFX11: encoding: [0xff,0x04,0x02,0xc9,0x03,0x03,0x06,0x05,0x56,0x34,0x12,0xaf] 30 v_dual_fmamk_f32 v122, v74, 0xa0172923, v161 :: v_dual_lshlrev_b32 v247, 0xa0172923, v99 31 // GFX11: encoding: [0x4a,0x43,0xa3,0xc8,0xff,0xc6,0xf6,0x7a,0x23,0x29,0x17,0xa0] [all …]
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H A D | gfx12_asm_vopd.s | 6 // GFX12: encoding: [0x04,0x05,0x08,0xc9,0x01,0x07,0x06,0xff] 7 // W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error 10 // GFX12: encoding: [0x0 [all...] |
H A D | gfx12_asm_vopd_features.s | 10 v_dual_mul_f32 v11, v1, v2 :: v_dual_mul_f32 v10, 0x24681357, v5 11 // GFX12: encoding: [0x01,0x05,0xc6,0xc8,0xff,0x0a,0x0a,0x0b,0x57,0x13,0x68,0x24] 15 v_dual_mul_f32 v11, 0x24681357, v2 :: v_dual_mul_f32 v10, 0x24681357, v5 16 // GFX12: encoding: [0xff,0x04,0xc6,0xc8,0xff,0x0a,0x0a,0x0b,0x57,0x13,0x68,0x24] 20 v_dual_add_f32 v5, 0xaf123456, v2 :: v_dual_fmaak_f32 v6, v3, v1, 0xaf123456 ; 21 // GFX12: encoding: [0xff,0x04,0x02,0xc9,0x03,0x03,0x06,0x05,0x56,0x34,0x12,0xaf] 25 v_dual_fmamk_f32 v122, v74, 0xa0172923, v161 :: v_dual_lshlrev_b32 v247, 0xa0172923, v99 26 // GFX12: encoding: [0x4a,0x43,0xa3,0xc8,0xff,0xc6,0xf6,0x7a,0x23,0x29,0x17,0xa0] 30 v_dual_fmamk_f32 v122, 0xdeadbeef, 0xdeadbeef, v161 :: v_dual_fmamk_f32 v123, 0xdeadbeef, 0xde… 31 // GFX12: encoding: [0xff,0x42,0x85,0xc8,0xff,0x44,0x7b,0x7a,0xef,0xbe,0xad,0xde] [all …]
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H A D | gfx11_asm_vopd.s | 6 // GFX11: encoding: [0x04,0x05,0x08,0xc9,0x01,0x07,0x06,0xff] 7 // W64-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: instruction requires wavesize=32 10 // GFX11: encoding: [0x0 [all...] |
/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
H A D | gfx12_dasm_vopd.txt | 3 # GFX12: v_dual_add_f32 v255, v4, v2 :: v_dual_add_f32 v6, v1, v3 ; encoding: [0x04,0x05,0x08,0xc9,0x01,0x07,0x06,0xff] 4 0x04,0x0 [all...] |
H A D | gfx11_dasm_vopd.txt | 3 # GFX11: v_dual_add_f32 v255, v4, v2 :: v_dual_add_f32 v6, v1, v3 ; encoding: [0x04,0x05,0x08,0xc9,0x01,0x07,0x06,0xff] 4 0x04,0x0 [all...] |
H A D | gfx12_dasm_vopd_features.txt | 7 …_add_f32 v5, 0xaf123456, v2 :: v_dual_fmaak_f32 v6, v3, v1, 0xaf123456 ; encoding: [0xff,0x04,0x02… 8 0xff,0x04,0x02,0xc9,0x03,0x03,0x06,0x05,0x56,0x34,0x12,0xaf 10 …22, s74, v161, 0x402f6c8b :: v_dual_fmamk_f32 v3, v6, 0x402f6c8b, v1 ; encoding: [0x4a,0x42,0x45,0… 11 0x4a,0x42,0x45,0xc8,0x06,0x03,0x02,0x7a,0x8b,0x6c,0x2f,0x40 13 …k_f32 v6, v3, v1, 0xaf123456 :: v_dual_add_f32 v5, 0xaf123456, v2 ; encoding: [0x03,0x03,0x48,0xc8… 14 0x03,0x03,0x48,0xc8,0xff,0x04,0x04,0x06,0x56,0x34,0x12,0xaf 16 …0xdeadbeef, 0xdeadbeef, v161 :: v_dual_fmamk_f32 v123, 0xdeadbeef, 0xdeadbeef, v162 ; encoding: [0… 17 0xff,0x42,0x85,0xc8,0xff,0x44,0x7b,0x7a,0xef,0xbe,0xad,0xde 19 …2 v122, s74, v161, 0x402f6c8b :: v_dual_mov_b32 v247, 0x402f6c8b ; encoding: [0x4a,0x42,0x51,0xc8,… 20 0x4a,0x42,0x51,0xc8,0xff,0x00,0xf6,0x7a,0x8b,0x6c,0x2f,0x40 [all …]
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H A D | gfx11_dasm_vopd_features.txt | 7 …_add_f32 v5, 0xaf123456, v2 :: v_dual_fmaak_f32 v6, v3, v1, 0xaf123456 ; encoding: [0xff,0x04,0x02… 8 0xff,0x04,0x02,0xc9,0x03,0x03,0x06,0x05,0x56,0x34,0x12,0xaf 10 …22, s74, v161, 0x402f6c8b :: v_dual_fmamk_f32 v3, v6, 0x402f6c8b, v1 ; encoding: [0x4a,0x42,0x45,0… 11 0x4a,0x42,0x45,0xc8,0x06,0x03,0x02,0x7a,0x8b,0x6c,0x2f,0x40 13 …k_f32 v6, v3, v1, 0xaf123456 :: v_dual_add_f32 v5, 0xaf123456, v2 ; encoding: [0x03,0x03,0x48,0xc8… 14 0x03,0x03,0x48,0xc8,0xff,0x04,0x04,0x06,0x56,0x34,0x12,0xaf 16 …0xdeadbeef, 0xdeadbeef, v161 :: v_dual_fmamk_f32 v123, 0xdeadbeef, 0xdeadbeef, v162 ; encoding: [0… 17 0xff,0x42,0x85,0xc8,0xff,0x44,0x7b,0x7a,0xef,0xbe,0xad,0xde 19 …2 v122, s74, v161, 0x402f6c8b :: v_dual_mov_b32 v247, 0x402f6c8b ; encoding: [0x4a,0x42,0x51,0xc8,… 20 0x4a,0x42,0x51,0xc8,0xff,0x00,0xf6,0x7a,0x8b,0x6c,0x2f,0x40 [all …]
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/llvm-project/llvm/test/MC/RISCV/ |
H A D | rv32-user-csr-names.s | 14 # CHECK-ENC: encoding: [0x73,0x23,0x00,0xc8] 18 # CHECK-ENC: encoding: [0xf3,0x23,0x00,0xc8] [all...] |
H A D | rv64-user-csr-names.s | 17 # CHECK-ENC: encoding: [0xf3,0x23,0x00,0xc8] 18 # CHECK-INST-ALIAS: csrr t2, 0xc80 19 csrrs t2, 0xC80, zero 24 # CHECK-ENC: encoding: [0xf3,0x23,0x1 [all...] |
/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
H A D | gicv3-regs.txt | 4 0x8 0xcc 0x38 0xd5 6 0x1a 0xc8 0x38 0xd5 8 0x42 0xcc 0x38 0xd5 10 0x51 0xc8 0x38 0xd5 12 0x7d 0xcb 0x38 0xd5 14 0x24 0xcb 0x3c 0xd5 16 0x78 0xcb 0x3c 0xd5 18 0xa9 0xcb 0x3c 0xd5 20 0x78 0xcc 0x38 0xd5 22 0x6e 0xc8 0x38 0xd5 [all …]
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H A D | armv8a-fpmul-err.txt | 8 [0x20,0xec,0x22,0x0e] 9 [0x20,0xec,0xa2,0x0e] 10 [0x20,0xec,0x22,0x4e] 11 [0x20,0xec,0xa2,0x4e] 12 [0x20,0xcc,0x22,0x2e] 13 [0x20,0xcc,0xa2,0x2e] 14 [0x20,0xcc,0x22,0x6e] 15 [0x20,0xcc,0xa2,0x6e] 19 [0x20,0x08,0xb2,0x0f] 20 [0x20,0x48,0xb2,0x0f] [all …]
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/llvm-project/llvm/test/MC/X86/apx/ |
H A D | ror-encopt.s | 4 # CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xd0,0xc8] 7 # CHECK: encoding: [0x62,0xf4,0x7d,0x08,0xd1,0xc8] 10 # CHECK: encoding: [0x62,0xf4,0x7c,0x08,0xd1,0xc8] 13 # CHECK: encoding: [0x62,0xf4,0xfc,0x08,0xd1,0xc8] 16 # CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0xd0,0xc8] 19 # CHECK: encoding: [0x62,0xf4,0x7d,0x0c,0xd1,0xc8] 22 # CHECK: encoding: [0x62,0xf4,0x7c,0x0c,0xd1,0xc8] 25 # CHECK: encoding: [0x62,0xf4,0xfc,0x0c,0xd1,0xc8] 28 # CHECK: encoding: [0x62,0xf4,0x64,0x18,0xd0,0xc8] 31 # CHECK: encoding: [0x62,0xf4,0x65,0x18,0xd1,0xc8] [all …]
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H A D | adx-intel.s | 4 # CHECK: encoding: [0x62,0xec,0x7d,0x08,0x66,0xc8] 7 # CHECK: encoding: [0x62,0xec,0x6d,0x10,0x66,0xc8] 10 # CHECK: encoding: [0x62,0xec,0xfd,0x08,0x66,0xc8] 13 # CHECK: encoding: [0x62,0xec,0xed,0x10,0x66,0xc8] 16 # CHECK: encoding: [0x62,0xec,0x7d,0x08,0x66,0x08] 19 # CHECK: encoding: [0x62,0xec,0x6d,0x10,0x66,0x08] 22 # CHECK: encoding: [0x62,0xec,0xfd,0x08,0x66,0x08] 25 # CHECK: encoding: [0x62,0xec,0xed,0x10,0x66,0x08] 28 # CHECK: encoding: [0x62,0xec,0x7e,0x08,0x66,0xc8] 31 # CHECK: encoding: [0x62,0xec,0x6e,0x10,0x66,0xc8] [all …]
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H A D | adx-att.s | 7 # CHECK: encoding: [0x62,0xec,0x7d,0x08,0x66,0xc8] 10 # CHECK: encoding: [0x62,0xec,0x6d,0x10,0x66,0xc8] 13 # CHECK: encoding: [0x62,0xec,0xfd,0x08,0x66,0xc8] 16 # CHECK: encoding: [0x62,0xec,0xed,0x10,0x66,0xc8] 19 # CHECK: encoding: [0x62,0xec,0x7d,0x08,0x66,0x08] 22 # CHECK: encoding: [0x62,0xec,0x6d,0x10,0x66,0x08] 25 # CHECK: encoding: [0x62,0xec,0xfd,0x08,0x66,0x08] 28 # CHECK: encoding: [0x62,0xec,0xed,0x10,0x66,0x08] 31 # CHECK: encoding: [0x62,0xec,0x7e,0x08,0x66,0xc8] 34 # CHECK: encoding: [0x62,0xec,0x6e,0x10,0x66,0xc8] [all …]
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/llvm-project/llvm/test/MC/Mips/ |
H A D | micromips-fpu-instructions.s | 12 # CHECK-EL: add.s $f4, $f6, $f8 # encoding: [0x06,0x55,0x30,0x20] 13 # CHECK-EL: add.d $f4, $f6, $f8 # encoding: [0x06,0x55,0x30,0x21] 14 # CHECK-EL: div.s $f4, $f6, $f8 # encoding: [0x06,0x55,0xf0,0x20] 15 # CHECK-EL: div.d $f4, $f6, $f8 # encoding: [0x06,0x55,0xf0,0x21] 16 # CHECK-EL: mul.s $f4, $f6, $f8 # encoding: [0x06,0x55,0xb0,0x20] 17 # CHECK-EL: mul.d $f4, $f6, $f8 # encoding: [0x06,0x55,0xb0,0x21] 18 # CHECK-EL: sub.s $f4, $f6, $f8 # encoding: [0x06,0x55,0x70,0x20] 19 # CHECK-EL: sub.d $f4, $f6, $f8 # encoding: [0x06,0x55,0x70,0x21] 20 # CHECK-EL: lwc1 $f2, 4($6) # encoding: [0x46,0x9c,0x04,0x00] 21 # CHECK-EL: ldc1 $f2, 4($6) # encoding: [0x46,0xbc,0x04,0x00] [all …]
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/llvm-project/llvm/test/MC/Disassembler/X86/apx/ |
H A D | adx.txt | 6 0x62,0xec,0x7d,0x08,0x66,0xc8 10 0x62,0xec,0x6d,0x10,0x66,0xc8 14 0x62,0xec,0xfd,0x08,0x66,0xc8 18 0x62,0xec,0xed,0x10,0x66,0xc8 22 0x62,0xec,0x7d,0x08,0x66,0x08 26 0x62,0xec,0x6d,0x10,0x66,0x08 30 0x62,0xec,0xfd,0x08,0x66,0x08 34 0x62,0xec,0xed,0x10,0x66,0x08 38 0x62,0xec,0x7e,0x08,0x66,0xc8 42 0x62,0xec,0x6e,0x10,0x66,0xc8 [all …]
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/llvm-project/llvm/test/MC/AArch64/ |
H A D | gicv3-regs.s | 57 // CHECK: mrs x8, {{icc_iar1_el1|ICC_IAR1_EL1}} // encoding: [0x08,0xcc,0x38,0xd5] 58 // CHECK: mrs x26, {{icc_iar0_el1|ICC_IAR0_EL1}} // encoding: [0x1a,0xc8,0x38,0xd5] 59 // CHECK: mrs x2, {{icc_hppir1_el1|ICC_HPPIR1_EL1}} // encoding: [0x42,0xcc,0x38,0xd5] 60 // CHECK: mrs x17, {{icc_hppir0_el1|ICC_HPPIR0_EL1}} // encoding: [0x51,0xc8,0x38,0xd5] 61 // CHECK: mrs x29, {{icc_rpr_el1|ICC_RPR_EL1}} // encoding: [0x7d,0xcb,0x38,0xd5] 62 // CHECK: mrs x4, {{ich_vtr_el2|ICH_VTR_EL2}} // encoding: [0x24,0xcb,0x3c,0xd5] 63 // CHECK: mrs x24, {{ich_eisr_el2|ICH_EISR_EL2}} // encoding: [0x78,0xcb,0x3c,0xd5] 64 // CHECK: mrs x9, {{ich_elrsr_el2|ICH_ELRSR_EL2}} // encoding: [0xa9,0xcb,0x3c,0xd5] 65 // CHECK: mrs x24, {{icc_bpr1_el1|ICC_BPR1_EL1}} // encoding: [0x78,0xcc,0x38,0xd5] 66 // CHECK: mrs x14, {{icc_bpr0_el1|ICC_BPR0_EL1}} // encoding: [0x6e,0xc8,0x38,0xd5] [all …]
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/llvm-project/llvm/test/MC/VE/ |
H A D | VADD.s | 7 # CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xc8] 11 # CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xc8] 15 # CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0xc8] 19 # CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0xc8] 23 # CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0xc8] 27 # CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0xc8]
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/llvm-project/llvm/test/MC/Disassembler/X86/ |
H A D | x86-64-avx2.txt | 4 0xc4 0xe2 0x6d 0x2b 0xc8 7 0xc4 0xe2 0xed 0x2b 0xc8 10 0xc4 0xe2 0x6d 0x06 0xc8 13 0xc4 0xe2 0xed 0x06 0xc8
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H A D | padlock.txt | 4 0x0f 0xa7 0xc0 7 0x0f 0xa7 0xc8 10 0x0f 0xa7 0xd0 13 0x0f 0xa7 0xd8 16 0x0f 0xa7 0xe0 19 0x0f 0xa7 0xe8 22 0x0f 0xa6 0xc8 25 0x0f 0xa6 0xd0 28 0x0f 0xa6 0xc0 32 0x0f 0xa7 0xc0 [all …]
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/llvm-project/llvm/test/MC/X86/ |
H A D | x86-32.s | 5 // CHECK: encoding: [0xf3,0x90] 8 // CHECK: encoding: [0x0f,0xae,0xf8] 11 // CHECK: encoding: [0x0f,0xae,0xe8] 14 // CHECK: encoding: [0x0f,0xae,0xf0] 17 // CHECK: encoding: [0x0f,0x01,0xc8] 20 // CHECK: encoding: [0x0f,0x01,0xc8] 23 // CHECK: encoding: [0x0f,0x01,0xc9] 26 // CHECK: encoding: [0x0f,0x01,0xc9] 30 // CHECK: encoding: [0x0f,0x01,0xc1] 33 // CHECK: encoding: [0x0f,0x01,0xd4] [all …]
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/llvm-project/llvm/test/CodeGen/X86/ |
H A D | sse4a.ll | 9 ; CHECK: # %bb.0: 10 ; CHECK-NEXT: extrq $2, $3, %xmm0 # encoding: [0x66,0x0f,0x78,0xc0,0x03,0x02] 11 ; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3] 18 ; X86-SSE: # %bb.0: 19 ; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04] 20 ; X86-SSE-NEXT: movdqa (%eax), %xmm0 # encoding: [0x66,0x0f,0x6f,0x00] 21 ; X86-SSE-NEXT: extrq $2, $3, %xmm0 # encoding: [0x66,0x0f,0x78,0xc0,0x03,0x02] 22 ; X86-SSE-NEXT: retl # encoding: [0xc3] 25 ; X86-AVX: # %bb.0: 26 ; X86-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x04] [all …]
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