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/freebsd-src/sys/crypto/des/arch/i386/
H A Ddes_enc.S85 andl $0xf0f0f0f0, %eax
92 andl $0xfff0000f, %edi
99 andl $0x33333333, %eax
106 andl $0x03fc03fc, %esi
113 andl $0xaaaaaaaa, %eax
120 cmpl $0, %ebx
123 /* Round 0 */
129 andl $0xfcfcfcfc, %eax
130 andl $0xcfcfcfcf, %edx
137 movl 0x200+_C_LABEL(des_SPtrans)(%ecx),%ebp
[all …]
/freebsd-src/sys/crypto/openssl/i386/
H A Dcrypt586.S52 andl $0xfcfcfcfc,%eax
54 andl $0xcfcfcfcf,%edx
62 xorl 0x200(%ebp,%ecx,1),%edi
65 xorl 0x100(%ebp,%ebx,1),%edi
68 xorl 0x300(%ebp,%ecx,1),%edi
70 andl $0xff,%eax
71 andl $0xff,%edx
72 movl 0x600(%ebp,%ebx,1),%ebx
74 movl 0x700(%ebp,%ecx,1),%ebx
76 movl 0x400(%ebp,%eax,1),%ebx
[all …]
H A Ddes-586.S21 andl $0xfcfcfcfc,%eax
22 andl $0xcfcfcfcf,%edx
28 xorl 0x200(%ebp,%ecx,1),%edi
31 xorl 0x100(%ebp,%ebx,1),%edi
34 xorl 0x300(%ebp,%ecx,1),%edi
36 andl $0xff,%eax
37 andl $0xff,%edx
38 xorl 0x600(%ebp,%ebx,1),%edi
39 xorl 0x700(%ebp,%ecx,1),%edi
41 xorl 0x400(%ebp,%eax,1),%edi
[all …]
/freebsd-src/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dlpc18xx-ccu.h13 #define CLK_APB3_BUS 0x100
14 #define CLK_APB3_I2C1 0x108
15 #define CLK_APB3_DAC 0x110
16 #define CLK_APB3_ADC0 0x118
17 #define CLK_APB3_ADC1 0x120
18 #define CLK_APB3_CAN0 0x128
19 #define CLK_APB1_BUS 0x200
20 #define CLK_APB1_MOTOCON_PWM 0x208
21 #define CLK_APB1_I2C0 0x210
22 #define CLK_APB1_I2S 0x218
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/phy/
H A Drenesas,usb2-phy.yaml56 enum: [0, 1] # and 0 is deprecated.
123 reg = <0xee080200 0x700>;
131 reg = <0xee0a0200 0x700>;
H A Dphy-mtk-tphy.txt5 controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
23 the child's base address to 0, the physical address
72 reg = <0 0x11290000 0 0x800>;
78 reg = <0 0x11290800 0 0x100>;
85 reg = <0 0x11290800 0 0x700>;
92 reg = <0 0x11291000 0 0x100>;
113 phy-names = "usb2-0", "usb3-0";
122 shared 0x0000 SPLLC
123 0x0100 FMREG
124 u2 port0 0x0800 U2PHY_COM
[all …]
/freebsd-src/sys/netinet/
H A Dtcp_syncache.h84 #define SCF_NOOPT 0x01 /* no TCP options */
85 #define SCF_WINSCALE 0x02 /* negotiated window scaling */
86 #define SCF_TIMESTAMP 0x04 /* negotiated timestamps */
88 #define SCF_UNREACH 0x10 /* icmp unreachable received */
89 #define SCF_SIGNATURE 0x20 /* send MD5 digests */
90 #define SCF_SACK 0x80 /* send SACK option */
91 #define SCF_ECN_MASK 0x700 /* ECN codepoint mask */
92 #define SCF_ECN 0x100 /* send ECN setup packet */
93 #define SCF_ACE_N 0x40
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8188.dtsi27 #size-cells = <0>;
29 cpu0: cpu@0 {
32 reg = <0x000>;
50 reg = <0x100>;
68 reg = <0x200>;
86 reg = <0x300>;
104 reg = <0x400>;
122 reg = <0x500>;
140 reg = <0x600>;
158 reg = <0x70
[all...]
H A Dmt7986a.dtsi21 #size-cells = <0>;
22 cpu0: cpu@0 {
24 reg = <0x0>;
32 reg = <0x1>;
40 reg = <0x2>;
48 reg = <0x3>;
58 #clock-cells = <0>;
73 reg = <0 0x43000000 0
[all...]
H A Dmt2712e.dtsi22 cluster0_opp: opp-table-0 {
66 #size-cells = <0>;
85 cpu0: cpu@0 {
88 reg = <0x000>;
100 reg = <0x001>;
113 reg = <0x200>;
126 CPU_SLEEP_0: cpu-sleep-0 {
132 arm,psci-suspend-param = <0x0010000>;
135 CLUSTER_SLEEP_0: cluster-sleep-0 {
141 arm,psci-suspend-param = <0x101000
[all...]
/freebsd-src/sys/contrib/alpine-hal/
H A Dal_hal_pcie_regs.h54 #define AL_PCIE_AXI_REGS_OFFSET 0x0
55 #define AL_PCIE_REV_1_2_APP_REGS_OFFSET 0x1000
56 #define AL_PCIE_REV_3_APP_REGS_OFFSET 0x2000
57 #define AL_PCIE_REV_1_2_CORE_CONF_BASE_OFFSET 0x2000
58 #define AL_PCIE_REV_3_CORE_CONF_BASE_OFFSET 0x10000
80 uint32_t rsrvd[(0x270 - 0x224) >> 2];
85 uint32_t reserved1[(0x10 - 0x4) >> 2];
87 uint32_t reserved2[(0x18 - 0x14) >> 2];
90 uint32_t reserved3[(0x48 - 0x20) >> 2];
94 uint32_t reserved4[(0x10C - 0x54) >> 2];
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/display/msm/
H A Dedp.txt34 reg = <0xfd923400 0x700>,
35 <0xfd923a00 0xd4>;
37 interrupts = <12 0>;
54 panel-en-gpios = <&tlmm 137 0>;
55 panel-hpd-gpios = <&tlmm 103 0>;
/freebsd-src/sys/contrib/device-tree/src/arm/mediatek/
H A Dmt7629.dtsi24 #size-cells = <0>;
27 cpu0: cpu@0 {
30 reg = <0x0>;
38 reg = <0x1>;
51 clk20m: oscillator-0 {
53 #clock-cells = <0>;
60 #clock-cells = <0>;
83 reg = <0x10000000 0x1000>;
89 reg = <0x10002000 0x1000>;
97 reg = <0x10006000 0x1000>;
[all …]
/freebsd-src/stand/i386/gptboot/
H A DMakefile8 BOOT_COMCONSOLE_PORT?= 0x3f8
10 B2SIOFMT?= 0x3
12 REL1= 0x700
13 ORG1= 0x7c00
14 ORG2= 0x0
/freebsd-src/stand/i386/isoboot/
H A DMakefile9 BOOT_COMCONSOLE_PORT?= 0x3f8
11 B2SIOFMT?= 0x3
13 REL1= 0x700
14 ORG1= 0x7c00
15 ORG2= 0x0
43 echo "$$x bytes available"; test $$x -ge 0
/freebsd-src/stand/i386/gptzfsboot/
H A DMakefile10 BOOT_COMCONSOLE_PORT?= 0x3f8
12 B2SIOFMT?= 0x3
14 REL1= 0x700
15 ORG1= 0x7c00
16 ORG2= 0x0
/freebsd-src/sys/dev/hwpmc/
H A Dhwpmc_uncore.h39 #define UCF_EN 0x1
40 #define UCF_PMI 0x4
49 #define UCP_EVSEL(C) ((C) & 0xFF)
50 #define UCP_UMASK(C) ((C) & 0xFF00)
56 #define UCP_CMASK(C) (((C) & 0xFF) << 24)
65 #define UCF_MASK 0xF
67 #define UCF_CTR0 0x394
71 #define UCF_CTRL 0x395
77 #define UCP_PMC0 0x3B0
78 #define UCP_EVSEL0 0x3C0
[all …]
/freebsd-src/stand/i386/boot2/
H A DMakefile5 # A value of 0x80 enables LBA support.
6 BOOT_BOOT1_FLAGS?= 0x80
8 BOOT_COMCONSOLE_PORT?= 0x3f8
10 B2SIOFMT?= 0x3
12 REL1= 0x700
13 ORG1= 0x7c00
14 ORG2= 0x2000
62 echo "$$x bytes available"; test $$x -ge 0
86 ${NM} -t d ${.ALLSRC} | awk '/([0
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/
H A Dxlnx,zynq-pinctrl.txt43 Valid arguments for 'slew-rate' are '0' and '1' to select between slow and fast
49 spi0_X_ssY (X=0..2, Y=0..2), spi1_0_grp - spi1_3_grp,
50 spi1_X_ssY (X=0..3, Y=0..2), sdio0_0_grp - sdio0_2_grp,
80 reg = <0x700 0x200>;
91 slew-rate = <0>;
/freebsd-src/sys/contrib/device-tree/src/c6x/
H A Dtms320c6472.dtsi9 #size-cells = <0>;
11 cpu@0 {
13 reg = <0>;
60 reg = <0x1800000 0x1000>;
66 reg = <0x01840000 0x8400>;
71 ti,core-mask = < 0x01 >;
72 reg = <0x25e0000 0x40>;
77 ti,core-mask = < 0x02 >;
78 reg = <0x25f0000 0x40>;
83 ti,core-mask = < 0x04 >;
[all …]
/freebsd-src/sys/crypto/des/
H A Ddes_locl.h76 l1=l2=0; \
89 #define l2c(l,c) (*((c)++)=(unsigned char)(((l) )&0xff), \
90 *((c)++)=(unsigned char)(((l)>> 8L)&0xff), \
91 *((c)++)=(unsigned char)(((l)>>16L)&0xff), \
92 *((c)++)=(unsigned char)(((l)>>24L)&0xff))
103 #define l2n(l,c) (*((c)++)=(unsigned char)(((l)>>24L)&0xff), \
104 *((c)++)=(unsigned char)(((l)>>16L)&0xff), \
105 *((c)++)=(unsigned char)(((l)>> 8L)&0xff), \
106 *((c)++)=(unsigned char)(((l) )&0xff))
112 case 8: *(--(c))=(unsigned char)(((l2)>>24L)&0xff); \
[all …]
/freebsd-src/stand/i386/zfsboot/
H A DMakefile8 BOOT_COMCONSOLE_PORT?= 0x3f8
10 B2SIOFMT?= 0x3
12 REL1= 0x700
13 ORG1= 0x7c00
14 ORG2= 0x2000
74 echo "$$x bytes available"; test $$x -ge 0
/freebsd-src/sys/contrib/device-tree/Bindings/cpufreq/
H A Dcpufreq-qcom-hw.txt40 phandle to a cpufreq_hw followed by the Domain ID(0/1) in the CPU DT node.
51 #size-cells = <0>;
53 CPU0: cpu@0 {
56 reg = <0x0 0x0>;
59 qcom,freq-domain = <&cpufreq_hw 0>;
72 reg = <0x0 0x100>;
75 qcom,freq-domain = <&cpufreq_hw 0>;
85 reg = <0x0 0x200>;
88 qcom,freq-domain = <&cpufreq_hw 0>;
98 reg = <0x0 0x300>;
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/c6x/
H A Ddscr.txt60 index (1-6) of the byte within the register. A value of 0 means the byte
75 disable is the value to disable a device (0xffffffff if cannot disable)
105 reg = <0x02a80000 0x41000>;
107 ti,dscr-devstat = <0>;
108 ti,dscr-silicon-rev = <8 28 0xf>;
109 ti,dscr-rmii-resets = <0x40020 0x00040000>;
111 ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
113 <0 12 0x40008 1 0 0 2
114 12 1 0x40008 3 0 30 2
115 13 2 0x4002c 1 0xffffffff 0 1>;
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/power/supply/
H A Dqcom_smbb.txt127 reg = <0x1000 0x700>;
128 interrupts = <0x0 0x10 7 IRQ_TYPE_EDGE_BOTH>,
129 <0x0 0x10 5 IRQ_TYPE_EDGE_BOTH>,
130 <0x0 0x10 4 IRQ_TYPE_EDGE_BOTH>,
131 <0x0 0x12 1 IRQ_TYPE_EDGE_BOTH>,
132 <0x0 0x12 0 IRQ_TYPE_EDGE_BOTH>,
133 <0x0 0x13 2 IRQ_TYPE_EDGE_BOTH>,
134 <0x0 0x13 1 IRQ_TYPE_EDGE_BOTH>,
135 <0x0 0x14 1 IRQ_TYPE_EDGE_BOTH>;

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