/llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
H A D | gfx1150_dasm_salu_float.txt | 3 # GFX1150: s_cvt_f32_i32 s5, s1 ; encoding: [0x01,0x64,0x85,0xbe] 4 0x01,0x64,0x85,0xbe 6 # GFX1150: s_cvt_f32_i32 s105, s1 ; encoding: [0x01,0x64,0xe9,0xbe] 7 0x01,0x64,0xe9,0xbe 9 # GFX1150: s_cvt_f32_i32 s5, s105 ; encoding: [0x69,0x64,0x85,0xbe] 10 0x69,0x64,0x85,0xbe 12 # GFX1150: s_cvt_f32_i32 s5, s103 ; encoding: [0x67,0x64,0x85,0xbe] 13 0x67,0x64,0x85,0xbe 15 # GFX1150: s_cvt_f32_i32 s5, vcc_lo ; encoding: [0x6a,0x64,0x85,0xbe] 16 0x6a,0x64,0x85,0xbe [all …]
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H A D | gfx11_dasm_sopc.txt | 4 # GFX11: s_bitcmp0_b32 exec_hi, s1 ; encoding: [0x7f,0x01,0x0c,0xbf] 5 0x7f,0x01,0x0c,0xbf 7 # GFX11: s_bitcmp0_b32 exec_lo, s1 ; encoding: [0x7e,0x0 [all...] |
H A D | gfx10_sopc.txt | 5 # GFX10: s_bitcmp0_b32 exec_hi, s1 ; encoding: [0x7f,0x01,0x0c,0xbf] 6 0x7f,0x01,0x0c,0xbf 8 # GFX10: s_bitcmp0_b32 exec_lo, s1 ; encoding: [0x7e,0x0 [all...] |
H A D | gfx12_dasm_sopc.txt | 3 # GFX12: s_cmp_lt_f32 s1, s2 ; encoding: [0x01,0x02,0x41,0xbf] 4 0x01,0x02,0x41,0xbf 6 # GFX12: s_cmp_lt_f32 s105, s2 ; encoding: [0x69,0x02,0x41,0xbf] 7 0x69,0x02,0x41,0xbf 9 # GFX12: s_cmp_lt_f32 s101, s2 ; encoding: [0x65,0x02,0x41,0xbf] 10 0x65,0x02,0x41,0xbf 12 # GFX12: s_cmp_lt_f32 vcc_lo, s2 ; encoding: [0x6a,0x02,0x41,0xbf] 13 0x6a,0x02,0x41,0xbf 15 # GFX12: s_cmp_lt_f32 vcc_hi, s2 ; encoding: [0x6b,0x02,0x41,0xbf] 16 0x6b,0x02,0x41,0xbf [all …]
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H A D | gfx12_dasm_sop2.txt | 4 # GFX12: s_add_nc_u64 s[0:1], s[2:3], s[4:5] ; encoding: [0x02,0x04,0x80,0xa9] 5 0x02,0x04,0x80,0xa9 7 # GFX12: s_add_nc_u64 s[100:101], s[102:103], s[104:105] ; encoding: [0x6 [all...] |
H A D | gfx12_dasm_vop1.txt |
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H A D | gfx11_dasm_vop1.txt | 7 0x01,0x71,0x0a,0x7e 8 # GFX11: v_bfrev_b32_e32 v5, v1 ; encoding: [0x01,0x71,0x0a,0x7e] 10 0xff,0x7 [all...] |
H A D | gfx11_dasm_vop2.txt | 7 0x01,0x05,0x0a,0x40 8 # W32: v_add_co_ci_u32_e32 v5, vcc_lo, v1, v2, vcc_lo ; encoding: [0x01,0x05,0x0a,0x40] 9 # W64: v_add_co_ci_u32_e32 v5, vcc, v1, v2, vcc ; encoding: [0x01,0x0 [all...] |
H A D | gfx11_dasm_sop2.txt | 4 # GFX11: s_absdiff_i32 exec_hi, s1, s2 ; encoding: [0x01,0x02,0x7f,0x83] 5 0x01,0x02,0x7f,0x83 7 # GFX11: s_absdiff_i32 exec_lo, s1, s2 ; encoding: [0x01,0x0 [all...] |
H A D | gfx10_sopk.txt | 5 # GFX10: s_addk_i32 exec_hi, 0x1234 ; encoding: [0x34,0x12,0xff,0xb7] 6 0x34,0x12,0xff,0xb7 8 # GFX10: s_addk_i32 exec_lo, 0x123 [all...] |
H A D | gfx10_sop2.txt | 5 # GFX10: s_absdiff_i32 exec_hi, s1, s2 ; encoding: [0x01,0x02,0x7f,0x96] 6 0x01,0x02,0x7f,0x96 8 # GFX10: s_absdiff_i32 exec_lo, s1, s2 ; encoding: [0x01,0x0 [all...] |
H A D | gfx11_dasm_vopd.txt | 3 # GFX11: v_dual_add_f32 v255, v4, v2 :: v_dual_add_f32 v6, v1, v3 ; encoding: [0x04,0x05,0x08,0xc9,0x01,0x07,0x06,0xff] 4 0x04,0x0 [all...] |
H A D | gfx10-sgpr-max.txt | 3 # GFX10: v_mov_b32_e32 v0, s105 ; encoding: [0x69,0x02,0x00,0x7e] 4 0x69,0x02,0x00,0x7e 7 0xf9,0x02,0x00,0x7e,0x69,0x16,0x86,0x00 9 # GFX10: s_mov_b32 s105, s104 ; encoding: [0x68,0x03,0xe9,0xbe] 10 0x68,0x03,0xe9,0xbe 13 0x69,0x00,0x02,0xd4,0x00,0xd3,0x00,0x00 16 0xf9,0xd2,0x04,0x7c,0x00,0xe9,0x06,0x86
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/llvm-project/llvm/test/MC/AMDGPU/ |
H A D | gfx1150_asm_salu_float.s | 4 // GFX1150: encoding: [0x01,0x64,0x85,0xbe] 7 // GFX1150: encoding: [0x01,0x64,0xe9,0xbe] 10 // GFX1150: encoding: [0x69,0x64,0x85,0xbe] 13 // GFX1150: encoding: [0x67,0x64,0x85,0xbe] 16 // GFX1150: encoding: [0x6a,0x64,0x85,0xbe] 19 // GFX1150: encoding: [0x6b,0x64,0x85,0xbe] 22 // GFX1150: encoding: [0x77,0x64,0x85,0xbe] 25 // GFX1150: encoding: [0x7d,0x64,0x85,0xbe] 28 // GFX1150: encoding: [0x7e,0x64,0x85,0xbe] 31 // GFX1150: encoding: [0x7f,0x64,0x85,0xbe] [all …]
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H A D | gfx12_asm_sopc.s | 4 // GFX12: encoding: [0x01,0x02,0x41,0xbf] 7 // GFX12: encoding: [0x69,0x02,0x41,0xbf] 10 // GFX12: encoding: [0x65,0x02,0x41,0xbf] 13 // GFX12: encoding: [0x6a,0x02,0x41,0xbf] 16 // GFX12: encoding: [0x6b,0x02,0x41,0xbf] 19 // GFX12: encoding: [0x7d,0x02,0x41,0xbf] 22 // GFX12: encoding: [0x7e,0x02,0x41,0xbf] 25 // GFX12: encoding: [0x7f,0x02,0x41,0xbf] 27 s_cmp_lt_f32 0, s2 28 // GFX12: encoding: [0x80,0x02,0x41,0xbf] [all …]
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/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
H A D | armv8r-sysreg.txt | 3 [0x00,0x20,0x3c,0xd5] 4 [0x80,0x00,0x38,0xd5] 5 [0x80,0x0 [all...] |
H A D | armv8.5a-mte.txt | 5 [0x20,0x10,0xdf,0x9a] 6 [0x3f,0x10,0xdf,0x9a] 7 [0xe0,0x13,0xdf,0x9a] 8 [0x20,0x10,0xc2,0x9a] 9 [0x3f,0x10,0xc2,0x9a] 18 # NOMTE-NEXT: [0x20,0x10,0xdf,0x9a] 20 # NOMTE-NEXT: [0x3f,0x10,0xdf,0x9a] 22 # NOMTE-NEXT: [0xe0,0x13,0xdf,0x9a] 24 # NOMTE-NEXT: [0x20,0x10,0xc2,0x9a] 26 # NOMTE-NEXT: [0x3f,0x10,0xc2,0x9a] [all …]
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/llvm-project/llvm/test/MC/X86/ |
H A D | XOP-64.s | 4 // CHECK: encoding: [0x8f,0x69,0x78,0x81,0x3c,0x25,0xf0,0x1c,0xf0,0x1c] 8 // CHECK: encoding: [0x8f,0xe9,0x78,0x81,0x34,0x25,0xf0,0x1c,0xf0,0x1c] 12 // CHECK: encoding: [0x8f,0xe9,0x7c,0x81,0x3c,0x25,0xf0,0x1c,0xf0,0x1c] 16 // CHECK: encoding: [0x8f,0x69,0x7c,0x81,0x0c,0x25,0xf0,0x1c,0xf0,0x1c] 20 // CHECK: encoding: [0x8f,0x69,0x78,0x81,0x7c,0x82,0x40] 24 // CHECK: encoding: [0x8f,0x69,0x78,0x81,0x7c,0x82,0xc0] 28 // CHECK: encoding: [0x8f,0xe9,0x78,0x81,0x74,0x82,0x40] 32 // CHECK: encoding: [0x8f,0xe9,0x78,0x81,0x74,0x82,0xc0] 36 // CHECK: encoding: [0x8f,0xe9,0x7c,0x81,0x7c,0x82,0x40] 40 // CHECK: encoding: [0x8f,0xe9,0x7c,0x81,0x7c,0x82,0xc0] [all …]
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/llvm-project/llvm/test/CodeGen/X86/ |
H A D | cmpccxadd-intrinsics.ll | 7 ; CHECK: # %bb.0: # %entry 8 ; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0] 9 ; CHECK-NEXT: cmpoxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe0,0x07] 10 ; CHECK-NEXT: retq # encoding: [0xc [all...] |
/llvm-project/llvm/test/MC/AArch64/ |
H A D | armv8r-sysreg.s | 293 # CHECK-NEXT: mrs x0, VSCTLR_EL2 // encoding: [0x00,0x20,0x3c,0xd5] 294 # CHECK-NEXT: mrs x0, MPUIR_EL1 // encoding: [0x80,0x00,0x38,0xd5] 295 # CHECK-NEXT: mrs x0, MPUIR_EL2 // encoding: [0x80,0x00,0x3c,0xd5] 296 # CHECK-NEXT: mrs x0, PRENR_EL1 // encoding: [0x20,0x61,0x38,0xd5] 297 # CHECK-NEXT: mrs x0, PRENR_EL2 // encoding: [0x20,0x61,0x3c,0xd5] 298 # CHECK-NEXT: mrs x0, PRSELR_EL1 // encoding: [0x20,0x62,0x38,0xd5] 299 # CHECK-NEXT: mrs x0, PRSELR_EL2 // encoding: [0x20,0x62,0x3c,0xd5] 300 # CHECK-NEXT: mrs x0, PRBAR_EL1 // encoding: [0x00,0x68,0x38,0xd5] 301 # CHECK-NEXT: mrs x0, PRBAR_EL2 // encoding: [0x00,0x68,0x3c,0xd5] 302 # CHECK-NEXT: mrs x0, PRLAR_EL1 // encoding: [0x20,0x68,0x38,0xd5] [all …]
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/llvm-project/llvm/test/MC/X86/apx/ |
H A D | imulzu-intel.s | 4 # CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x6b,0xd2,0x7b] 7 # CHECK: encoding: [0x62,0xf4,0x7c,0x18,0x6b,0xc9,0x7b] 10 # CHECK: encoding: [0x62,0x54,0xfc,0x18,0x6b,0xc9,0x7b] 13 # CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x6b,0x94,0x80,0x23,0x01,0x00,0x00,0x7b] 16 # CHECK: encoding: [0x62,0xd4,0x7c,0x18,0x6b,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b] 19 # CHECK: encoding: [0x62,0x54,0xfc,0x18,0x6b,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b] 22 # CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x69,0xd2,0xd2,0x04] 25 # CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x69,0x94,0x80,0x23,0x01,0x00,0x00,0xd2,0x04] 28 # CHECK: encoding: [0x62,0xf4,0x7c,0x18,0x69,0xc9,0x40,0xe2,0x01,0x00] 31 # CHECK: encoding: [0x62,0x54,0xfc,0x18,0x69,0xc9,0x40,0xe2,0x01,0x00] [all …]
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H A D | imulzu-att.s | 7 # CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x6b,0xd2,0x7b] 10 # CHECK: encoding: [0x62,0xf4,0x7c,0x18,0x6b,0xc9,0x7b] 13 # CHECK: encoding: [0x62,0x54,0xfc,0x18,0x6b,0xc9,0x7b] 16 # CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x6b,0x94,0x80,0x23,0x01,0x00,0x00,0x7b] 19 # CHECK: encoding: [0x62,0xd4,0x7c,0x18,0x6b,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b] 22 # CHECK: encoding: [0x62,0x54,0xfc,0x18,0x6b,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b] 25 # CHECK: encoding: [0x62,0xf4,0x7d,0x18,0x69,0xd2,0xd2,0x04] 28 # CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x69,0x94,0x80,0x23,0x01,0x00,0x00,0xd2,0x04] 31 # CHECK: encoding: [0x62,0xf4,0x7c,0x18,0x69,0xc9,0x40,0xe2,0x01,0x00] 34 # CHECK: encoding: [0x62,0x54,0xfc,0x18,0x69,0xc9,0x40,0xe2,0x01,0x00] [all …]
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/llvm-project/llvm/test/MC/Disassembler/X86/apx/ |
H A D | imulzu.txt | 6 0x62,0xf4,0x7d,0x18,0x6b,0xd2,0x7b 10 0x62,0xf4,0x7c,0x18,0x6b,0xc9,0x7b 14 0x62,0x54,0xfc,0x18,0x6b,0xc9,0x7b 18 0x62,0xd4,0x7d,0x18,0x6b,0x94,0x80,0x23,0x01,0x00,0x00,0x7b 22 0x62,0xd4,0x7c,0x18,0x6b,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b 26 0x62,0x54,0xfc,0x18,0x6b,0x8c,0x80,0x23,0x01,0x00,0x00,0x7b 30 0x62,0xf4,0x7d,0x18,0x69,0xd2,0xd2,0x04 34 0x62,0xd4,0x7d,0x18,0x69,0x94,0x80,0x23,0x01,0x00,0x00,0xd2,0x04 38 0x62,0xf4,0x7c,0x18,0x69,0xc9,0x40,0xe2,0x01,0x00 42 0x62,0x54,0xfc,0x18,0x69,0xc9,0x40,0xe2,0x01,0x00 [all …]
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H A D | cmpccxadd.txt | 6 0x62,0xf2,0x75,0x08,0xe7,0x54,0x98,0x7b 10 0x62,0x7 [all...] |
/llvm-project/llvm/test/MC/ARM/ |
H A D | fullfp16.s | 7 @ ARM: vadd.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x30,0xee] 8 @ THUMB: vadd.f16 s0, s1, s0 @ encoding: [0x30,0xee,0x80,0x09] 11 @ ARM: vsub.f16 s0, s1, s0 @ encoding: [0xc0,0x09,0x30,0xee] 12 @ THUMB: vsub.f16 s0, s1, s0 @ encoding: [0x30,0xee,0xc0,0x09] 15 @ ARM: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x80,0xee] 16 @ THUMB: vdiv.f16 s0, s1, s0 @ encoding: [0x80,0xee,0x80,0x09] 19 @ ARM: vmul.f16 s0, s1, s0 @ encoding: [0x80,0x09,0x20,0xee] 20 @ THUMB: vmul.f16 s0, s1, s0 @ encoding: [0x20,0xee,0x80,0x09] 23 @ ARM: vnmul.f16 s0, s1, s0 @ encoding: [0xc0,0x09,0x20,0xee] 24 @ THUMB: vnmul.f16 s0, s1, s0 @ encoding: [0x20,0xee,0xc0,0x09] [all …]
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