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/llvm-project/llvm/test/MC/Disassembler/AArch64/
H A Darmv8.4a-actmon.txt4 [0x00,0xd2,0x1b,0xd5]
5 [0x60,0xd2,0x1b,0xd5]
6 [0x80,0xd2,0x1b,0xd5]
7 [0xa0,0xd2,0x1b,0xd5]
8 [0x00,0xd4,0x1b,0xd5]
9 [0x20,0xd4,0x1b,0xd5]
10 [0x40,0xd4,0x1b,0xd5]
11 [0x60,0xd4,0x1b,0xd5]
12 [0x00,0xd3,0x1b,0xd5]
13 [0x20,0xd3,0x1b,0xd5]
[all …]
/llvm-project/llvm/test/MC/Mips/
H A Dmips-hwr-register-names.s12 # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b]
17 # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b]
18 rdhwr $a0,$0
23 # CHECK-NEXT: .set pop # encoding: [0x7c,0x05,0x08,0x3b]
28 # CHECK-NEXT: .set pop # encoding: [0x7c,0x05,0x08,0x3b]
34 # CHECK-NEXT: .set pop # encoding: [0x7c,0x06,0x10,0x3b]
39 # CHECK-NEXT: .set pop # encoding: [0x7c,0x06,0x10,0x3b]
45 # CHECK-NEXT: .set pop # encoding: [0x7c,0x07,0x18,0x3b]
50 # CHECK-NEXT: .set pop # encoding: [0x7c,0x07,0x18,0x3b]
56 # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x20,0x3b]
[all …]
H A Dmicromips-fpu-instructions.s12 # CHECK-EL: add.s $f4, $f6, $f8 # encoding: [0x06,0x55,0x30,0x20]
13 # CHECK-EL: add.d $f4, $f6, $f8 # encoding: [0x06,0x55,0x30,0x21]
14 # CHECK-EL: div.s $f4, $f6, $f8 # encoding: [0x06,0x55,0xf0,0x20]
15 # CHECK-EL: div.d $f4, $f6, $f8 # encoding: [0x06,0x55,0xf0,0x21]
16 # CHECK-EL: mul.s $f4, $f6, $f8 # encoding: [0x06,0x55,0xb0,0x20]
17 # CHECK-EL: mul.d $f4, $f6, $f8 # encoding: [0x06,0x55,0xb0,0x21]
18 # CHECK-EL: sub.s $f4, $f6, $f8 # encoding: [0x06,0x55,0x70,0x20]
19 # CHECK-EL: sub.d $f4, $f6, $f8 # encoding: [0x06,0x55,0x70,0x21]
20 # CHECK-EL: lwc1 $f2, 4($6) # encoding: [0x46,0x9c,0x04,0x00]
21 # CHECK-EL: ldc1 $f2, 4($6) # encoding: [0x46,0xbc,0x04,0x00]
[all …]
/llvm-project/llvm/test/MC/VE/
H A DCMOV.s7 # CHECK-ENCODING: encoding: [0x0f,0x00,0x00,0x00,0x8c,0x3f,0x0b,0x3b]
11 # CHECK-ENCODING: encoding: [0x8f,0x00,0x00,0x00,0x8c,0x8d,0x0b,0x3b]
14 # CHECK-INST: cmov.d.af %s11, (20)0, %s12
15 # CHECK-ENCODING: encoding: [0x40,0x00,0x00,0x00,0x54,0x8c,0x0b,0x3b]
16 cmov.d.af %s11, (20)0, %s12
19 # CHECK-ENCODING: encoding: [0xc1,0x00,0x00,0x00,0x3f,0x8c,0x0b,0x3b]
23 # CHECK-ENCODING: encoding: [0x02,0x00,0x00,0x00,0x8c,0x3f,0x0b,0x3b]
27 # CHECK-ENCODING: encoding: [0x83,0x00,0x00,0x00,0x8c,0x8d,0x0b,0x3b]
30 # CHECK-INST: cmov.d.eq %s11, (20)0, %s12
31 # CHECK-ENCODING: encoding: [0x44,0x00,0x00,0x00,0x54,0x8c,0x0b,0x3b]
[all …]
/llvm-project/llvm/test/MC/AArch64/
H A Darmv8.4a-actmon.s128 //CHECK: msr AMCR_EL0, x0 // encoding: [0x00,0xd2,0x1b,0xd5]
129 //CHECK: msr AMUSERENR_EL0, x0 // encoding: [0x60,0xd2,0x1b,0xd5]
130 //CHECK: msr AMCNTENCLR0_EL0, x0 // encoding: [0x80,0xd2,0x1b,0xd5]
131 //CHECK: msr AMCNTENSET0_EL0, x0 // encoding: [0xa0,0xd2,0x1b,0xd5]
132 //CHECK: msr AMEVCNTR00_EL0, x0 // encoding: [0x00,0xd4,0x1b,0xd5]
133 //CHECK: msr AMEVCNTR01_EL0, x0 // encoding: [0x20,0xd4,0x1b,0xd5]
134 //CHECK: msr AMEVCNTR02_EL0, x0 // encoding: [0x40,0xd4,0x1b,0xd5]
135 //CHECK: msr AMEVCNTR03_EL0, x0 // encoding: [0x60,0xd4,0x1b,0xd5]
136 //CHECK: msr AMCNTENCLR1_EL0, x0 // encoding: [0x00,0xd3,0x1b,0xd5]
137 //CHECK: msr AMCNTENSET1_EL0, x0 // encoding: [0x20,0xd3,0x1b,0xd5]
[all …]
/llvm-project/lldb/test/Shell/Register/
H A Dx86-64-zmm-write.test10 …0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x1…
11 …0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x1…
12 …0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x1…
13 …0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x1…
14 …0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x1…
15 …0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x1…
16 …0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x1…
17 …0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1…
18 …0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1…
19 …0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1…
[all …]
H A Dx86-64-zmm-read.test11 …0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x1…
12 …0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x1…
13 …0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x1…
14 …0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x1…
15 …0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x1…
16 …0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x1…
17 …0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x1…
18 …0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1…
19 …0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1…
20 …0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1…
[all …]
H A Dx86-zmm-write.test10 …0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x1…
11 …0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x1…
12 …0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x1…
13 …0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x1…
14 …0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x1…
15 …0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x1…
16 …0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x1…
17 …0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1…
22 …0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x1…
23 …0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x1…
[all …]
H A Dx86-zmm-read.test11 …0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x1…
12 …0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x1…
13 …0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x1…
14 …0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x1…
15 …0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x1…
16 …0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x1…
17 …0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x1…
18 …0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1…
21 # CHECK: Process {{[0-9]+}} exited with status = 0
/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r3/
H A Dvalid-fp64.txt4 0x54 0x0c 0x0a 0x3b # CHECK: sqrt.s $f0, $f12
5 0x54 0x0c 0x03 0x7b # CHECK: abs.s $f0, $f12
6 0x54 0x0c 0x4a 0x3b # CHECK: sqrt.d $f0, $f12
7 0x54 0x0c 0x23 0x7b # CHECK: abs.d $f0, $f12
8 0x54 0x80 0x38 0x3b # CHECK: mthc1 $4, $f0
9 0x54 0x80 0x30 0x3b # CHECK: mfhc1 $4, $f0
10 0x54 0x82 0x01 0x30 # CHECK: add.d $f0, $f2, $f4
11 0x54 0x82 0x01 0x70 # CHECK: sub.d $f0, $f2, $f4
12 0x54 0x82 0x01 0xb0 # CHECK: mul.d $f0, $f2, $f4
13 0x54 0x82 0x01 0xf0 # CHECK: div.d $f0, $f2, $f4
[all …]
H A Dvalid-fp64-el.txt4 0x0c 0x54 0x3b 0x0a # CHECK: sqrt.s $f0, $f12
5 0x0c 0x54 0x7b 0x03 # CHECK: abs.s $f0, $f12
6 0x0c 0x54 0x3b 0x4a # CHECK: sqrt.d $f0, $f12
7 0x0c 0x54 0x7b 0x23 # CHECK: abs.d $f0, $f12
8 0x80 0x54 0x3b 0x38 # CHECK: mthc1 $4, $f0
9 0x80 0x54 0x3b 0x30 # CHECK: mfhc1 $4, $f0
10 0x82 0x54 0x30 0x01 # CHECK: add.d $f0, $f2, $f4
11 0x82 0x54 0x70 0x01 # CHECK: sub.d $f0, $f2, $f4
12 0x82 0x54 0xb0 0x01 # CHECK: mul.d $f0, $f2, $f4
13 0x82 0x54 0xf0 0x01 # CHECK: div.d $f0, $f2, $f4
[all …]
H A Dvalid-el.txt4 0xf9 0x4f # CHECK: addiusp -16
5 0xff 0x4f # CHECK: addiusp -1028
6 0xfd 0x4f # CHECK: addiusp -1032
7 0x01 0x4c # CHECK: addiusp 1024
8 0x03 0x4c # CHECK: addiusp 1028
9 0x29 0x2c # CHECK: andi16 $16, $2, 31
10 0x05 0x47 # CHECK: jraddiusp 20
11 0x42 0x07 # CHECK: addu16 $6, $17, $4
12 0xb1 0x06 # CHECK: subu16 $5, $16, $3
13 0x82 0x44 # CHECK: and16 $16, $2
[all …]
H A Dvalid.txt4 0x4f 0xf9 # CHECK: addiusp -16
5 0x4f 0xff # CHECK: addiusp -1028
6 0x4f 0xfd # CHECK: addiusp -1032
7 0x4c 0x01 # CHECK: addiusp 1024
8 0x4c 0x03 # CHECK: addiusp 1028
9 0x2c 0x29 # CHECK: andi16 $16, $2, 31
10 0x47 0x05 # CHECK: jraddiusp 20
11 0x07 0x42 # CHECK: addu16 $6, $17, $4
12 0x06 0xb1 # CHECK: subu16 $5, $16, $3
13 0x44 0x82 # CHECK: and16 $16, $2
[all …]
/llvm-project/llvm/test/MC/Disassembler/ARM/
H A Dfp-armv8.txt3 0xe0 0x3b 0xb2 0xee
6 0xcc 0x2b 0xf3 0xee
9 0x60 0x3b 0xb2 0xee
12 0x41 0x2b 0xb3 0xee
15 0xe0 0x3b 0xb2 0xae
18 0xcc 0x2b 0xf3 0xce
21 0x60 0x3b 0xb2 0x0e
24 0x41 0x2b 0xb3 0xbe
28 0xe1 0x1a 0xbc 0xfe
31 0xc3 0x1b 0xbc 0xfe
[all …]
H A Dthumb-fp-armv8.txt3 0xb2 0xee 0xe0 0x3b
6 0xf3 0xee 0xcc 0x2b
9 0xb2 0xee 0x60 0x3b
12 0xb3 0xee 0x41 0x2b
15 0xa8 0xbf # IT block
16 0xb2 0xee 0xe0 0x3b
19 0xc8 0xbf # IT block
20 0xf3 0xee 0xcc 0x2b
23 0x08 0xbf # IT block
24 0xb2 0xee 0x60 0x3b
[all …]
/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r6/
H A Dvalid.txt3 0x6f 0x83 # CHECK: addiur1sp $7, 4
4 0x6f 0x7e # CHECK: addiur2 $6, $7, -1
5 0x6f 0x76 # CHECK: addiur2 $6, $7, 12
6 0x4c 0xfc # CHECK: addius5 $7, -2
7 0x4f 0xff # CHECK: addiusp -1028
8 0x4f 0xfd # CHECK: addiusp -1032
9 0x4c 0x01 # CHECK: addiusp 1024
10 0x4c 0x03 # CHECK: addiusp 1028
11 0x4f 0xf9 # CHECK: addiusp -16
12 0xcc 0x42 # CHECK: bc16 132
[all …]
/llvm-project/llvm/test/MC/AArch64/SVE/
H A Dinsr.s14 // CHECK-ENCODING: [0x00,0x38,0x24,0x05]
20 // CHECK-ENCODING: [0x00,0x38,0x64,0x05]
26 // CHECK-ENCODING: [0x00,0x38,0xa4,0x05]
32 // CHECK-ENCODING: [0x00,0x38,0xe4,0x05]
38 // CHECK-ENCODING: [0xff,0x3b,0x24,0x05]
44 // CHECK-ENCODING: [0xff,0x3b,0x64,0x05]
50 // CHECK-ENCODING: [0xff,0x3b,0xa4,0x05]
56 // CHECK-ENCODING: [0xff,0x3b,0xe4,0x05]
62 // CHECK-ENCODING: [0xff,0x3b,0x34,0x05]
68 // CHECK-ENCODING: [0xff,0x3b,0x74,0x05]
[all …]
/llvm-project/llvm/test/MC/ARM/
H A Dfp-armv8.s6 @ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xee]
8 @ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xee]
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0x60,0x3b,0xb2,0xee]
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0x41,0x2b,0xb3,0xee]
16 @ CHECK: vcvttge.f64.f16 d3, s1 @ encoding: [0xe0,0x3b,0xb2,0xae]
18 @ CHECK: vcvttgt.f16.f64 s5, d12 @ encoding: [0xcc,0x2b,0xf3,0xce]
21 @ CHECK: vcvtbeq.f64.f16 d3, s1 @ encoding: [0x60,0x3b,0xb2,0x0e]
23 @ CHECK: vcvtblt.f16.f64 s4, d1 @ encoding: [0x41,0x2b,0xb3,0xbe]
29 @ CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xe1,0x1a,0xbc,0xfe]
31 @ CHECK: vcvta.s32.f64 s2, d3 @ encoding: [0xc3,0x1b,0xbc,0xfe]
[all …]
H A Dthumb-fp-armv8.s6 @ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
8 @ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
17 @ CHECK: vcvttge.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
20 @ CHECK: vcvttgt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
23 @ CHECK: vcvtbeq.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
26 @ CHECK: vcvtblt.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
32 @ CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xbc,0xfe,0xe1,0x1a]
34 @ CHECK: vcvta.s32.f64 s2, d3 @ encoding: [0xbc,0xfe,0xc3,0x1b]
[all …]
H A Dfp-armv8-m.s9 @ CHECK-V81M: vcvtt.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
11 @ CHECK-V81M: vcvtt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
14 @ CHECK-V81M: vcvtb.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
16 @ CHECK-V81M: vcvtb.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
20 @ CHECK-V81M: vcvttge.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
23 @ CHECK-V81M: vcvttgt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
27 @ CHECK-V81M: vcvtbeq.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
30 @ CHECK-V81M: vcvtblt.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
36 @ CHECK-V81M: vcvta.s32.f32 s2, s3 @ encoding: [0xbc,0xfe,0xe1,0x1a]
38 @ CHECK-V81M: vcvta.s32.f64 s2, d3 @ encoding: [0xbc,0xfe,0xc3,0x1b]
[all …]
/llvm-project/llvm/test/MC/Disassembler/X86/apx/
H A Dccmp.txt8 0x62,0xf4,0x84,0x00,0x39,0xc3
12 0x62,0xf4,0xc4,0x0
[all...]
/llvm-project/llvm/unittests/Bitcode/
H A DBitReaderTestCode.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
20 0x42, 0x43, 0xc0, 0xde, 0x35, 0x14, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00,
21 0x62, 0x0c, 0x30, 0x24, 0x4d, 0x59, 0xbe, 0x66, 0xad, 0xfb, 0xb4, 0x4f,
22 0x1b, 0xc8, 0x24, 0x44, 0x01, 0x32, 0x05, 0x00, 0x21, 0x0c, 0x00, 0x00,
23 0x3f, 0x01, 0x00, 0x00, 0x0b, 0x02, 0x21, 0x00, 0x02, 0x00, 0x00, 0x00,
24 0x16, 0x00, 0x00, 0x00, 0x07, 0x81, 0x23, 0x91, 0x41, 0xc8, 0x04, 0x49,
25 0x06, 0x10, 0x32, 0x39, 0x92, 0x01, 0x84, 0x0c, 0x25, 0x05, 0x08, 0x19,
26 0x1e, 0x04, 0x8b, 0x62, 0x80, 0x14, 0x45, 0x02, 0x42, 0x92, 0x0b, 0x42,
27 0xa4, 0x10, 0x32, 0x14, 0x38, 0x08, 0x18, 0x4b, 0x0a, 0x32, 0x52, 0x88,
28 0x48, 0x70, 0xc4, 0x21, 0x23, 0x44, 0x12, 0x87, 0x8c, 0x10, 0x41, 0x92,
[all …]
/llvm-project/llvm/test/CodeGen/Mips/
H A Dmicromips-mtc-mfc.ll9 ; MM2: # %bb.0: # %entry
10 ; MM2-NEXT: mov.d $f0, $f12 # encoding: [0x54,0x0c,0x20,0x7b]
11 ; MM2-NEXT: mtc1 $zero, $f2 # encoding: [0x54,0x02,0x28,0x3b]
12 ; MM2-NEXT: mthc1 $zero, $f2 # encoding: [0x54,0x02,0x38,0x3b]
13 ; MM2-NEXT: c.ule.d $f12, $f2 # encoding: [0x54,0x4c,0x05,0xfc]
14 ; MM2-NEXT: bc1t $BB0_2 # encoding: [0x43,0xa0,A,A]
15 ; MM2-NEXT: # fixup A - offset: 0, value: ($BB0_2), kind: fixup_MICROMIPS_PC16_S1
16 ; MM2-NEXT: nop # encoding: [0x00,0x00,0x00,0x00]
18 ; MM2-NEXT: j $BB0_2 # encoding: [0b110101AA,A,A,A]
19 ; MM2-NEXT: # fixup A - offset: 0, value: ($BB0_2), kind: fixup_MICROMIPS_26_S1
[all …]
/llvm-project/llvm/test/MC/Mips/micromips/
H A Dvalid-fp64.s5 abs.d $f0, $f12 # CHECK: abs.d $f0, $f12 # encoding: [0x54,0x0c,0x23,0x7b]
6 # CHECK-NEXT: # <MCInst #{{[0-9]+}} FABS_D64_MM
7 abs.s $f0, $f12 # CHECK: abs.s $f0, $f12 # encoding: [0x54,0x0c,0x03,0x7b]
8 # CHECK-NEXT: # <MCInst #{{[0-9]+}} FABS_S_MM
9 add.d $f0, $f2, $f4 # CHECK: add.d $f0, $f2, $f4 # encoding: [0x54,0x82,0x01,0x30]
10 # CHECK-NEXT: # <MCInst #{{[0-9]+}} FADD_D64_MM
11 cvt.d.s $f0, $f2 # CHECK: cvt.d.s $f0, $f2 # encoding: [0x54,0x02,0x13,0x7b]
12 # CHECK-NEXT: # <MCInst #{{[0-9]+}} CVT_D64_S_MM
13 cvt.d.w $f0, $f2 # CHECK: cvt.d.w $f0, $f2 # encoding: [0x54,0x02,0x33,0x7b]
14 # CHECK-NEXT: # <MCInst #{{[0-9]+}} CVT_D64_W_MM
[all …]
/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
H A Dgfx908-dl-insts.txt4 # CHECK: v_fmac_f32_e32 v5, v1, v2 ; encoding: [0x01,0x05,0x0a,0x76]
5 0x01,0x05,0x0a,0x76
7 # CHECK: v_fmac_f32_e32 v255, v1, v2 ; encoding: [0x01,0x0
[all...]

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