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/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
H A D	gfx8_sopk.txt	`3 # CHECK: s_movk_i32 s5, 0x3141 ; encoding: [0x41,0x31,0x05,0xb0] 4 0x41,0x31,0x05,0xb0 6 # CHECK: s_movk_i32 s101, 0x3141 ; encoding: [0x41,0x31,0x65,0xb0] 7 0x41,0x31,0x65,0xb0 9 # CHECK: s_movk_i32 flat_scratch_lo, 0x3141 ; encoding: [0x41,0x31,0x66,0xb0] 10 0x41,0x31,0x66,0xb0 12 # CHECK: s_movk_i32 flat_scratch_hi, 0x3141 ; encoding: [0x41,0x31,0x67,0xb0] 13 0x41,0x31,0x67,0xb0 15 # CHECK: s_movk_i32 vcc_lo, 0x3141 ; encoding: [0x41,0x31,0x6a,0xb0] 16 0x41,0x31,0x6a,0xb0 [all …]`
H A D	gfx9_sopk.txt	`3 # CHECK: s_movk_i32 s5, 0x3141 ; encoding: [0x41,0x31,0x05,0xb0] 4 0x41,0x31,0x05,0xb0 6 # CHECK: s_movk_i32 s101, 0x3141 ; encoding: [0x41,0x31,0x65,0xb0] 7 0x41,0x31,0x65,0xb0 9 # CHECK: s_movk_i32 flat_scratch_lo, 0x3141 ; encoding: [0x41,0x31,0x66,0xb0] 10 0x41,0x31,0x66,0xb0 12 # CHECK: s_movk_i32 flat_scratch_hi, 0x3141 ; encoding: [0x41,0x31,0x67,0xb0] 13 0x41,0x31,0x67,0xb0 15 # CHECK: s_movk_i32 vcc_lo, 0x3141 ; encoding: [0x41,0x31,0x6a,0xb0] 16 0x41,0x31,0x6a,0xb0 [all …]`
H A D	gfx9_sopp.txt	`3 # CHECK: s_nop 0x3141 ; encoding: [0x41,0x31,0x80,0xbf] 4 0x41,0x31,0x80,0xbf 6 # CHECK: s_nop 0xc1d1 ; encoding: [0xd1,0xc1,0x80,0xbf] 7 0xd1,0xc1,0x80,0xbf 9 # CHECK: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf] 10 0x00,0x00,0x81,0xbf 12 # CHECK: s_endpgm 1 ; encoding: [0x01,0x00,0x81,0xbf] 13 0x01,0x00,0x81,0xbf 15 # CHECK: s_endpgm 65535 ; encoding: [0xff,0xff,0x81,0xbf] 16 0xff,0xff,0x81,0xbf [all …]`
H A D	gfx8_sopp.txt	`3 # CHECK: s_nop 0x3141 ; encoding: [0x41,0x31,0x80,0xbf] 4 0x41,0x31,0x80,0xbf 6 # CHECK: s_nop 0xc1d1 ; encoding: [0xd1,0xc1,0x80,0xbf] 7 0xd1,0xc1,0x80,0xbf 9 # CHECK: s_endpgm ; encoding: [0x00,0x00,0x81,0xbf] 10 0x00,0x00,0x81,0xbf 12 # CHECK: s_endpgm 1 ; encoding: [0x01,0x00,0x81,0xbf] 13 0x01,0x00,0x81,0xbf 15 # CHECK: s_endpgm 65535 ; encoding: [0xff,0xff,0x81,0xbf] 16 0xff,0xff,0x81,0xbf [all …]`
/llvm-project/llvm/test/MC/AMDGPU/
H A D	gfx8_asm_sopk.s	`3 s_movk_i32 s5, 0x3141 4 // CHECK: [0x41,0x31,0x05,0xb0] 6 s_movk_i32 s101, 0x3141 7 // CHECK: [0x41,0x31,0x65,0xb0] 9 s_movk_i32 flat_scratch_lo, 0x3141 10 // CHECK: [0x41,0x31,0x66,0xb0] 12 s_movk_i32 flat_scratch_hi, 0x3141 13 // CHECK: [0x41,0x31,0x67,0xb0] 15 s_movk_i32 vcc_lo, 0x3141 16 // CHECK: [0x41,0x31,0x6a,0xb0] [all …]`
H A D	gfx7_asm_sopk.s	`3 s_movk_i32 s5, 0x3141 4 // CHECK: [0x41,0x31,0x05,0xb0] 6 s_movk_i32 s103, 0x3141 7 // CHECK: [0x41,0x31,0x67,0xb0] 9 s_movk_i32 flat_scratch_lo, 0x3141 10 // CHECK: [0x41,0x31,0x68,0xb0] 12 s_movk_i32 flat_scratch_hi, 0x3141 13 // CHECK: [0x41,0x31,0x69,0xb0] 15 s_movk_i32 vcc_lo, 0x3141 16 // CHECK: [0x41,0x31,0x6a,0xb0] [all …]`
H A D	gfx9_asm_sopk.s	`3 s_movk_i32 s5, 0x3141 4 // CHECK: [0x41,0x31,0x05,0xb0] 6 s_movk_i32 s101, 0x3141 7 // CHECK: [0x41,0x31,0x65,0xb0] 9 s_movk_i32 flat_scratch_lo, 0x3141 10 // CHECK: [0x41,0x31,0x66,0xb0] 12 s_movk_i32 flat_scratch_hi, 0x3141 13 // CHECK: [0x41,0x31,0x67,0xb0] 15 s_movk_i32 vcc_lo, 0x3141 16 // CHECK: [0x41,0x31,0x6a,0xb0] [all …]`
H A D	gfx7_asm_sopp.s	`3 s_nop 0x3141 4 // CHECK: [0x41,0x31,0x80,0xbf] 6 s_nop 0xc1d1 7 // CHECK: [0xd1,0xc1,0x80,0xbf] 10 // CHECK: [0x00,0x00,0x81,0xbf] 13 // CHECK: [0x01,0x00,0x81,0xbf] 16 // CHECK: [0xff,0xff,0x81,0xbf] 19 // CHECK: [0x41,0x31,0x82,0xbf] 22 // CHECK: [0xd1,0xc1,0x82,0xbf] 25 // CHECK: [0x41,0x31,0x84,0xbf] [all …]`
H A D	gfx9_asm_sopp.s	`3 s_nop 0x3141 4 // CHECK: [0x41,0x31,0x80,0xbf] 6 s_nop 0xc1d1 7 // CHECK: [0xd1,0xc1,0x80,0xbf] 10 // CHECK: [0x00,0x00,0x81,0xbf] 13 // CHECK: [0x01,0x00,0x81,0xbf] 16 // CHECK: [0xff,0xff,0x81,0xbf] 19 // CHECK: [0x41,0x31,0x82,0xbf] 22 // CHECK: [0xd1,0xc1,0x82,0xbf] 25 // CHECK: [0x00,0x00,0x83,0xbf] [all …]`
H A D	gfx8_asm_sopp.s	`3 s_nop 0x3141 4 // CHECK: [0x41,0x31,0x80,0xbf] 6 s_nop 0xc1d1 7 // CHECK: [0xd1,0xc1,0x80,0xbf] 10 // CHECK: [0x00,0x00,0x81,0xbf] 13 // CHECK: [0x01,0x00,0x81,0xbf] 16 // CHECK: [0xff,0xff,0x81,0xbf] 19 // CHECK: [0x41,0x31,0x82,0xbf] 22 // CHECK: [0xd1,0xc1,0x82,0xbf] 25 // CHECK: [0x00,0x00,0x83,0xbf] [all …]`
/llvm-project/llvm/test/MC/Disassembler/AArch64/
H A D	trace-regs.txt	`4 0x8 0x3 0x31 0xd5 6 0xc9 0x0 0x31 0xd5 8 0xcb 0x1 0x31 0xd5 10 0xd9 0x2 0x31 0xd5 12 0xc7 0x3 0x31 0xd5 14 0xc7 0x4 0x31 0xd5 16 0xc6 0x5 0x31 0xd5 18 0xfb 0x8 0x31 0xd5 20 0xfd 0x9 0x31 0xd5 22 0xe4 0xa 0x31 0xd5 [all …]`
H A D	armv8.6a-fgt.txt	`4 [0x80,0x11,0x1c,0xd5] 5 [0xa0,0x11,0x1c,0xd5] 6 [0xc0,0x11,0x1c,0xd5] 7 [0x80,0x31,0x1c,0xd5] 8 [0xa0,0x31,0x1c,0xd5] 9 [0xc0,0x31,0x1c,0xd5] 24 [0x80,0x11,0x3c,0xd5] 25 [0xa0,0x11,0x3c,0xd5] 26 [0xc0,0x11,0x3c,0xd5] 27 [0x80,0x31,0x3c,0xd5] [all …]`
H A D	brbe.txt	`4 [0x00,0x90,0x11,0xd5] 5 [0x01,0x90,0x31,0xd5] 11 [0x02,0x90,0x15,0xd5] 12 [0x03,0x90,0x35,0xd5] 18 [0x04,0x90,0x14,0xd5] 19 [0x05,0x90,0x34,0xd5] 25 [0x26,0x90,0x11,0xd5] 26 [0x27,0x90,0x31,0xd5] 32 [0x08,0x92,0x11,0xd5] # expect failure: BRBIDR0_EL1 is RO 33 [0x09,0x92,0x31,0xd5] [all …]`
/llvm-project/llvm/test/MC/AArch64/
H A D	trace-regs.s	211 // CHECK: mrs x8, {{trcstatr\|TRCSTATR}} // encoding: [0x08,0x03,0x31,0xd5] 212 // CHECK: mrs x9, {{trcidr8\|TRCIDR8}} // encoding: [0xc9,0x00,0x31,0xd5] 213 // CHECK: mrs x11, {{trcidr9\|TRCIDR9}} // encoding: [0xcb,0x01,0x31,0xd5] 214 // CHECK: mrs x25, {{trcidr10\|TRCIDR10}} // encoding: [0xd9,0x02,0x31,0xd5] 215 // CHECK: mrs x7, {{trcidr11\|TRCIDR11}} // encoding: [0xc7,0x03,0x31,0xd5] 216 // CHECK: mrs x7, {{trcidr12\|TRCIDR12}} // encoding: [0xc7,0x04,0x31,0xd5] 217 // CHECK: mrs x6, {{trcidr13\|TRCIDR13}} // encoding: [0xc6,0x05,0x31,0xd5] 218 // CHECK: mrs x27, {{trcidr0\|TRCIDR0}} // encoding: [0xfb,0x08,0x31,0xd5] 219 // CHECK: mrs x29, {{trcidr1\|TRCIDR1}} // encoding: [0xfd,0x09,0x31,0xd5] 220 // CHECK: mrs x4, {{trcidr2\|TRCIDR2}} // encoding: [0xe4,0x0a,0x31,0xd5] [all …]
H A D	armv8.6a-fgt.s	11 // CHECK: msr HFGRTR_EL2, x0 // encoding: [0x80,0x11,0x1c,0xd5] 12 // CHECK: msr HFGWTR_EL2, x5 // encoding: [0xa5,0x11,0x1c,0xd5] 13 // CHECK: msr HFGITR_EL2, x10 // encoding: [0xca,0x11,0x1c,0xd5] 14 // CHECK: msr HDFGRTR_EL2, x15 // encoding: [0x8f,0x31,0x1c,0xd5] 15 // CHECK: msr HDFGWTR_EL2, x20 // encoding: [0xb4,0x31,0x1c,0xd5] 16 // CHECK: msr HAFGRTR_EL2, x25 // encoding: [0xd9,0x31,0x1c,0xd5] 30 // CHECK: mrs x30, HFGRTR_EL2 // encoding: [0x9e,0x11,0x3c,0xd5] 31 // CHECK: mrs x25, HFGWTR_EL2 // encoding: [0xb9,0x11,0x3c,0xd5] 32 // CHECK: mrs x20, HFGITR_EL2 // encoding: [0xd4,0x11,0x3c,0xd5] 33 // CHECK: mrs x15, HDFGRTR_EL2 // encoding: [0x8f,0x31,0x3c,0xd5] [all …]
H A D	brbe.s	8 // CHECK: msr BRBCR_EL1, x0 // encoding: [0x00,0x90,0x11,0xd5] 9 // CHECK: mrs x1, BRBCR_EL1 // encoding: [0x01,0x90,0x31,0xd5] 15 // CHECK: msr BRBCR_EL12, x2 // encoding: [0x02,0x90,0x15,0xd5] 16 // CHECK: mrs x3, BRBCR_EL12 // encoding: [0x03,0x90,0x35,0xd5] 22 // CHECK: msr BRBCR_EL2, x4 // encoding: [0x04,0x90,0x14,0xd5] 23 // CHECK: mrs x5, BRBCR_EL2 // encoding: [0x05,0x90,0x34,0xd5] 29 // CHECK: msr BRBFCR_EL1, x6 // encoding: [0x26,0x90,0x11,0xd5] 30 // CHECK: mrs x7, BRBFCR_EL1 // encoding: [0x27,0x90,0x31,0xd5] 37 // CHECK: mrs x9, BRBIDR0_EL1 // encoding: [0x09,0x92,0x31,0xd5] 43 // CHECK: msr BRBINFINJ_EL1, x10 // encoding: [0x0a,0x91,0x11,0xd5] [all …]
H A D	ete-sysregs.s	13 // CHECK: mrs x0, TRCRSR // encoding: [0x00,0x0a,0x31,0xd5] 14 // CHECK: mrs x0, TRCEXTINSELR // encoding: [0x80,0x08,0x31,0xd5] 15 // CHECK: mrs x0, TRCEXTINSELR // encoding: [0x80,0x08,0x31,0xd5] 16 // CHECK: mrs x0, TRCEXTINSELR1 // encoding: [0x80,0x09,0x31,0xd5] 17 // CHECK: mrs x0, TRCEXTINSELR2 // encoding: [0x80,0x0a,0x31,0xd5] 18 // CHECK: mrs x0, TRCEXTINSELR3 // encoding: [0x80,0x0b,0x31,0xd5] 28 // CHECK: msr TRCRSR, x0 // encoding: [0x00,0x0a,0x11,0xd5] 29 // CHECK: msr TRCEXTINSELR, x0 // encoding: [0x80,0x08,0x11,0xd5] 30 // CHECK: msr TRCEXTINSELR, x0 // encoding: [0x80,0x08,0x11,0xd5] 31 // CHECK: msr TRCEXTINSELR1, x0 // encoding: [0x80,0x09,0x11,0xd5] [all …]
/llvm-project/lldb/test/Shell/Register/
H A D	x86-64-zmm-write.test	10 …0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x1… 11 …0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x1… 12 …0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x1… 13 …0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x1… 14 …0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x1… 15 …0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x1… 16 …0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x1… 17 …0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1… 18 …0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1… 19 …0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1… [all …]
H A D	x86-64-ymm16-write.test	11 …0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x2… 12 …0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x2… 13 …0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x2… 14 …0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x2… 15 …0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x2… 16 …0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x2… 17 …0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x2… 18 …0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2… 19 …0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2… 20 …0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2… [all …]
H A D	x86-64-ymm16-read.test	12 …0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x2… 13 …0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x2… 14 …0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x2… 15 …0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x2… 16 …0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x2… 17 …0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x2… 18 …0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x2… 19 …0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2… 20 …0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2… 21 …0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2a 0x2b 0x2… [all …]
H A D	x86-64-zmm-read.test	11 …0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x1… 12 …0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x1… 13 …0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x1… 14 …0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x1… 15 …0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x1… 16 …0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x1… 17 …0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x1… 18 …0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1… 19 …0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1… 20 …0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1… [all …]
H A D	x86-zmm-write.test	10 …0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x1… 11 …0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x1… 12 …0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x1… 13 …0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x1… 14 …0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x1… 15 …0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x1… 16 …0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x1… 17 …0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1… 22 …0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x1… 23 …0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x1… [all …]
/llvm-project/llvm/test/MC/Disassembler/Hexagon/
H A D	xtype_fp.txt	`5 0x11 0xdf 0x15 0xeb 9 0x03 0xd5 0xf1 0x85 11 0xb3 0xc2 0x90 0xdc 15 0x03 0xd5 0xf1 0xc7 17 0x23 0xd5 0xf1 0xc7 19 0x63 0xd5 0xf1 0xc7 21 0x83 0xd5 0xf1 0xc7 23 0x03 0xd4 0xf0 0xd2 25 0x23 0xd4 0xf0 0xd2 27 0x43 0xd4 0xf0 0xd2 [all …]`
H A D	memop.txt	`5 0x95 0xd9 0x11 0x3e 7 0xb5 0xd9 0x11 0x3e 9 0xd5 0xd9 0x11 0x3e 11 0xf5 0xd9 0x11 0x3e 13 0x95 0xd9 0x11 0x3f 15 0xb5 0xd9 0x11 0x3f 17 0xd5 0xd9 0x11 0x3f 19 0xf5 0xd9 0x11 0x3f 23 0x95 0xd9 0x31 0x3e 25 0xb5 0xd9 0x31 0x3e [all …]`
/llvm-project/llvm/test/CodeGen/RISCV/
H A D	pr80052.mir	`12 - { id: 0, size: 1, alignment: 4, local-offset: -4 } 14 varArgsFrameIndex: 0 15 varArgsSaveSize: 0 17 bb.0.entry: 21 ; data into all allocatable GPRs except $x31. Then, volatile storing them 22 ; later, leaving regalloc only $x31 to play with in the middle. 23 $x1 = LW %stack.0, 0 :: (volatile load (s32)) 24 $x5 = LW %stack.0, 0 :: (volatile load (s32)) 25 $x6 = LW %stack.0, 0 :: (volatile load (s32)) 26 $x7 = LW %stack.0, 0 :: (volatile load (s32)) [all …]`

12 3 4 5 6 7 8 9 10 >>...31