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/freebsd-src/sys/contrib/device-tree/src/arm/airoha/
H A Den7523.dtsi20 reg = <0x84000000 0xA00000>;
25 reg = <0x84B00000 0x100000>;
30 reg = <0x85000000 0x1A00000>;
35 reg = <0x86B00000 0x100000>;
40 reg = <0x86D00000 0x100000>;
51 #size-cells = <0>;
64 cpu0: cpu@0 {
67 reg = <0x0>;
76 reg = <0x1>;
91 reg = <0x1fa20000 0x400>,
[all …]
/freebsd-src/sys/dev/cxgbe/firmware/
H A Dt6fw_cfg_hashfilter.txt19 reg[0x10c4] = 0x20000000/0x20000000 # GK_CONTROL, enable 5th thread
21 reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT
32 # TP number of RX channels (0 = auto)
33 tp_nrxch = 0
38 # TP number of TX channels (0 = auto)
39 tp_ntxch = 0
45 reg[0x7d04] = 0x00010008/0x00010008
48 reg[0x7d08] = 0x00000800/0x00000800 # set IssFromCplEnable
51 reg[0x7d48] = 0x00000000/0x00000400 # clear EnableFLMError
54 reg[0x7d4c] = 0x00010000/0x00010000 # set DisableNewPshFlag
[all …]
H A Dt5fw_cfg_hashfilter.txt23 reg[0x1124] = 0x00000400/0x00000400 # SGE_CONTROL2, enable VFIFO; if
28 reg[0x1130] = 0x00d5ffeb # SGE_DBP_FETCH_THRESHOLD, fetch
31 # queues, and 0xfff for LP which
36 reg[0x113c] = 0x0002ffc0 # SGE_VFIFO_SIZE, set to 0x2ffc0 which
42 reg[0x7d04] = 0x00010000/0x00010000
45 reg[0x7d6c] = 0x00000000/0x00007000
48 reg[0x7d78] = 0x00000400/0x00000000
50 reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT
58 # TP number of RX channels (0 = auto)
59 tp_nrxch = 0
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/clock/
H A Dqcom,lcc.txt19 reg = <0x28000000 0x1000>;
H A Dqcom,lcc.yaml117 reg = <0x28000000 0x1000>;
/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dtoshiba,visconti-dwmac.yaml64 reg = <0 0x28000000 0 0x10000>;
76 #address-cells = <0x1>;
77 #size-cells = <0x0>;
82 reg = <0x1>;
/freebsd-src/sys/contrib/device-tree/Bindings/arm/
H A Darm,coresight-stm.yaml90 reg = <0x20100000 0x1000>,
91 <0x28000000 0x180000>;
/freebsd-src/sys/contrib/device-tree/Bindings/pci/
H A Dmediatek-pcie.txt32 where N starting from 0 to one less than the number of root ports.
80 reg = <0 0x1a000000 0 0x1000>;
88 reg = <0 0x1a140000 0 0x1000>, /* PCIe shared registers */
89 <0 0x1a142000 0 0x1000>, /* Port0 registers */
90 <0 0x1a143000 0 0x1000>, /* Port1 registers */
91 <0 0x1a144000 0 0x1000>; /* Port2 registers */
96 interrupt-map-mask = <0xf800 0 0 0>;
97 interrupt-map = <0x0000 0 0 0 &sysirq GIC_SPI 193 IRQ_TYPE_LEVEL_LOW>,
98 <0x0800 0 0 0 &sysirq GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>,
99 <0x1000 0 0 0 &sysirq GIC_SPI 195 IRQ_TYPE_LEVEL_LOW>;
[all …]
H A Dbrcm,iproc-pcie.yaml117 reg = <0x18012000 0x1000>;
120 interrupt-map-mask = <0 0 0 0>;
121 interrupt-map = <0 0 0 0
[all...]
H A Dbrcm,iproc-pcie.txt77 reg = <0x18012000 0x1000>;
80 interrupt-map-mask = <0 0 0 0>;
81 interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
83 linux,pci-domain = <0>;
85 bus-range = <0x00 0xff>;
90 ranges = <0x81000000 0 0 0x28000000 0 0x00010000
91 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
93 phys = <&phy 0 5>;
97 brcm,pcie-ob-axi-offset = <0x00000000>;
115 reg = <0x18013000 0x1000>;
[all …]
H A Dnvidia,tegra20-pcie.txt27 - cell 0 specifies the bus and device numbers of the root port:
30 - cell 1 denotes the upper 32 address bits and should be 0
45 - 0x81000000: I/O memory region
46 - 0x82000000: non-prefetchable memory region
47 - 0xc2000000: prefetchable memory region
73 - pinctrl-0: phandle for the default/active state of pin configurations.
104 - If lanes 0 to 3 are used:
150 - Root port 0 uses 4 lanes, root port 1 is unused.
158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
171 reg = <0x80003000 0x00000800 /* PADS registers */
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc4337-ciaa.dts35 reg = <0x28000000 0x0800000>; /* 8 MB */
173 pinctrl-0 = <&i2c0_pins>;
178 reg = <0x50>;
183 reg = <0x51>;
188 reg = <0x54>;
196 pinctrl-0 = <&enet_rmii_pins>;
206 pinctrl-0 = <&ssp_pins>;
214 pinctrl-0 = <&uart2_pins>;
220 pinctrl-0 = <&uart3_pins>;
/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8ulp-evk.dts20 reg = <0x0 0x80000000 0 0x80000000>;
31 size = <0 0x28000000>;
36 reg = <0 0xa8600000 0
[all...]
H A Dimx8mn-tqma8mqnl.dtsi15 reg = <0x00000000 0x40000000 0 0x40000000>;
43 size = <0 0x28000000>;
45 alloc-ranges = <0 0x40000000 0
[all...]
H A Dimx93.dtsi49 #size-cells = <0>;
56 arm,psci-suspend-param = <0x0010033>;
65 A55_0: cpu@0 {
68 reg = <0x0>;
84 reg = <0x100>;
129 #clock-cells = <0>;
136 #clock-cells = <0>;
143 #clock-cells = <0>;
171 reg = <0 0x4800000
[all...]
H A Dimx8mq-tqma8mq.dtsi15 reg = <0x00000000 0x40000000 0 0x40000000>;
36 pinctrl-0 = <&pinctrl_dvfs>;
43 states = <900000 0x1 1000000 0x0>;
56 size = <0 0x28000000>;
[all...]
H A Dimx8mm-tqma8mqml.dtsi16 reg = <0x00000000 0x40000000 0 0x40000000>;
45 size = <0 0x28000000>;
47 alloc-ranges = <0 0x40000000 0
[all...]
/freebsd-src/contrib/arm-optimized-routines/pl/math/
H A Dsv_erfcf_1u7.c
H A Dv_erfcf_1u7.c
/freebsd-src/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra234.dtsi19 bus@0 {
24 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
28 reg = <0x0 0x00100000 0x
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap3430-sdp.dts15 reg = <0x80000000 0x10000000>; /* 256 MB */
23 reg = <0x48>;
50 ranges = <0 0 0x10000000 0x08000000>,
51 <1 0 0x28000000 0x1000000>, /* CS1: 16MB for NAND */
52 <2 0 0x20000000 0x1000000>; /* CS2: 16MB for OneNAND */
54 nor@0,0 {
59 reg = <0 0 0x08000000>;
63 gpmc,cs-on-ns = <0>;
84 partition@0 {
86 reg = <0 0x40000>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/renesas/
H A Dr9a09g011-v2mevk2.dts33 #size-cells = <0>;
35 port@0 {
36 reg = <0>;
57 reg = <0x0 0x58000000 0x0 0x28000000>;
62 reg = <0x1 0x80000000 0x0 0x80000000>;
90 gpios = <&pwc 0 GPIO_ACTIVE_HIGH>;
92 states = <3300000 0>, <1800000 1>;
102 phy0: ethernet-phy@0 {
105 reg = <0>;
110 pinctrl-0 = <&emmc_pins>;
[all …]
/freebsd-src/sys/dev/rtwn/rtl8192c/pci/
H A Dr92ce_priv.h31 { 0x420, 0x80 }, { 0x423, 0x00 }, { 0x430, 0x00 }, { 0x431, 0x00 },
32 { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 },
33 { 0x436, 0x06 }, { 0x437, 0x07 }, { 0x438, 0x00 }, { 0x439, 0x00 },
34 { 0x43a, 0x00 }, { 0x43b, 0x01 }, { 0x43c, 0x04 }, { 0x43d, 0x05 },
35 { 0x43e, 0x06 }, { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 },
36 { 0x442, 0x00 }, { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f },
37 { 0x447, 0x00 }, { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 },
38 { 0x45b, 0xb9 }, { 0x460, 0x88 }, { 0x461, 0x88 }, { 0x462, 0x06 },
39 { 0x463, 0x03 }, { 0x4c8, 0x04 }, { 0x4c9, 0x08 }, { 0x4cc, 0x02 },
40 { 0x4cd, 0x28 }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 },
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8960.dtsi20 #size-cells = <0>;
21 interrupts = <GIC_PPI 14 0x304>;
23 cpu@0 {
27 reg = <0>;
52 reg = <0x80000000 0>;
57 interrupts = <GIC_PPI 10 0x304>;
64 #clock-cells = <0>;
71 #clock-cells = <0>;
78 #clock-cells = <0>;
[all...]
H A Dqcom-mdm9615.dtsi27 #size-cells = <0>;
29 cpu0: cpu@0 {
31 reg = <0>;
45 #clock-cells = <0>;
66 reg = <0x02040000 0x1000>;
67 arm,data-latency = <2 2 0>;
76 reg = <0x02000000 0x1000>,
77 <0x0200200
[all...]

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