Home
last modified time | relevance | path

Searched +full:0 +full:x1ff (Results 1 – 25 of 194) sorted by relevance

12345678

/freebsd-src/sys/contrib/openzfs/tests/zfs-tests/tests/functional/vdev_disk/
H A Dpage_alignment.c65 * physical (order-0) page boundary, as the kernel expects to be able in vdev_disk_check_pages_cb()
104 return (0);
125 512, 0x1000, {
126 { 0x0, 0x1000 },
130 512, 0x400, {
131 { 0x0, 0x1000 },
135 512, 0x400, {
136 { 0x0c0
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/thermal/
H A Dthermal-sensor.yaml35 0 on sensor nodes with only a single sensor and at least 1 on nodes
37 enum: [0, 1]
57 reg = <0 0x0c263000 0 0x1ff>, /* TM */
58 <0 0x0c222000 0 0x1ff>; /* SROT */
68 reg = <0 0x0c265000 0 0x1ff>, /* TM */
69 <0 0x0c223000 0 0x1ff>; /* SROT */
H A Dthermal-zones.yaml68 checking this thermal zone. Setting this to 0 disables the polling
77 this to 0 disables the polling timers setup by the thermal
134 "^[a-zA-Z][a-zA-Z0-9\\-_]{0,63}$":
254 reg = <0 0x0c263000 0 0x1ff>, /* TM */
255 <0 0x0c22200
[all...]
H A Dqcom-tsens.yaml127 - pattern: '^s[0-9]+_p1$'
128 - pattern: '^s[0-9]+_p2$'
129 - pattern: '^s[0-9]+_p1$'
130 - pattern: '^s[0-9]+_p2$'
131 - pattern: '^s[0-9]+_p1$'
132 - pattern: '^s[0-9]+_p2$'
133 - pattern: '^s[0-9]+_p1$'
134 - pattern: '^s[0-9]+_p2$'
135 - pattern: '^s[0-9]+_p1$'
136 - pattern: '^s[0
[all...]
/freebsd-src/sys/dev/ath/ath_hal/ar9002/
H A Dar9287.c33 #define N(a) (sizeof(a)/sizeof(a[0]))
61 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
65 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
69 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
75 uint16_t bMode, fracMode, aModeRefSel = 0; in ar9287SetChannel()
76 uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; in ar9287SetChannel()
86 reg32 &= 0xc0000000; in ar9287SetChannel()
90 int regWrites = 0; in ar9287SetChannel()
94 aModeRefSel = 0; in ar9287SetChannel()
95 channelSel = (freq * 0x10000)/15; in ar9287SetChannel()
[all …]
H A Dar9285.c34 * nfarray[0]: Chain 0 ctl
37 * nfarray[3]: Chain 0 ext
47 if (nf & 0x100) in ar9285GetNoiseFloor()
48 nf = 0 - ((nf ^ 0x1ff) + 1); in ar9285GetNoiseFloor()
50 "NF calibrated [ctl] [chain 0] is %d\n", nf); in ar9285GetNoiseFloor()
51 nfarray[0] = nf; in ar9285GetNoiseFloor()
54 if (nf & 0x100) in ar9285GetNoiseFloor()
55 nf = 0 - ((nf ^ 0x1ff) + 1); in ar9285GetNoiseFloor()
57 "NF calibrated [ext] [chain 0] is %d\n", nf); in ar9285GetNoiseFloor()
61 nfarray[1] = 0; in ar9285GetNoiseFloor()
[all …]
H A Dar9280.c33 #define N(a) (sizeof(a)/sizeof(a[0]))
61 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
65 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
69 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
75 uint16_t bMode, fracMode, aModeRefSel = 0; in ar9280SetChannel()
76 uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; in ar9280SetChannel()
87 reg32 &= 0xc0000000; in ar9280SetChannel()
90 frac_n_5g = 0; in ar9280SetChannel()
97 aModeRefSel = 0; in ar9280SetChannel()
98 channelSel = (freq * 0x10000)/15; in ar9280SetChannel()
[all …]
/freebsd-src/sys/dev/ath/ath_hal/ar5416/
H A Dar2133.c30 #define N(a) (sizeof(a)/sizeof(a[0]))
68 * bias = 0
73 * else if forceBias > 0
85 * Less than 2412 uses value of 0, 2412 and above uses value of 2
91 int reg_writes = 0; in ar2133ForceBias()
92 uint32_t new_bias = 0; in ar2133ForceBias()
100 new_bias = 0; in ar2133ForceBias()
127 uint32_t channelSel = 0; in ar2133SetChannel()
128 uint32_t bModeSynth = 0; in ar2133SetChannel()
129 uint32_t aModeRefSel = 0; in ar2133SetChannel()
[all …]
H A Dar5416_cal_adcdc.c30 #define totalAdcDcOffsetIOddPhase(i) caldata[0][i].s
41 for (i = 0; i < AR5416_MAX_CHAINS; i++) { in ar5416AdcDcCalCollect()
52 "%d: Chn %d oddi=0x%08x; eveni=0x%08x; oddq=0x%08x; evenq=0x%08x;\n", in ar5416AdcDcCalCollect()
70 for (i = 0; i < numChains; i++) { in ar5416AdcDcCalibration()
93 numSamples) & 0x1ff; in ar5416AdcDcCalibration()
95 numSamples) & 0x1ff; in ar5416AdcDcCalibration()
97 " dc_offset_mismatch_i = 0x%08x\n", iDcMismatch); in ar5416AdcDcCalibration()
99 " dc_offset_mismatch_q = 0x%08x\n", qDcMismatch); in ar5416AdcDcCalibration()
102 val &= 0xc0000fff; in ar5416AdcDcCalibration()
109 OS_REG_SET_BIT(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0), in ar5416AdcDcCalibration()
/freebsd-src/stand/libsa/
H A Dpkgfs.c77 char ut_magic[6]; /* For POSIX: "ustar\0" */
147 if (tf->tf_cachesz > 0) in pkgfs_cleanup()
190 return (0); in pkgfs_init()
232 if (*fn == '\0') { in pkg_open_follow()
234 return (0); in pkg_open_follow()
239 if (strcmp(fn, tf->tf_hdr.ut_name) == 0) { in pkg_open_follow()
241 tf->tf_fp = 0; /* Reset the file pointer. */ in pkg_open_follow()
243 fn, tf->tf_hdr.ut_typeflag[0])); in pkg_open_follow()
244 if (tf->tf_hdr.ut_typeflag[0] == '2') { in pkg_open_follow()
253 return (0); in pkg_open_follow()
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/mailbox/
H A Dxlnx,zynqmp-ipi-mailbox.yaml48 - "smc" : SMC #0, following the SMCCC
49 - "hvc" : HVC #0, following the SMCCC
80 '^mailbox@[0-9a-f]+$':
107 It contains tx(0) or rx(1) channel IPI id number.
190 #address-cells = <0x2>;
191 #size-cells = <0x2>;
195 xlnx,ipi-id = <0>;
202 reg = <0x0 0xff9905c0 0x0 0x20>,
203 <0x0 0xff9905e0 0x0 0x20>,
204 <0x0 0xff990e80 0x0 0x20>,
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/ata/
H A Dexynos-sata.txt24 reg = <0x122f0000 0x1ff>;
25 interrupts = <0 115 0>;
H A Dsnps,dwc-ahci.yaml37 "^sata-port@[0-9a-e]$":
56 reg = <0x122F0000 0x1ff>;
58 #size-cells = <0>;
68 ports-implemented = <0x1>;
70 sata-port@0 {
71 reg = <0>;
/freebsd-src/sys/contrib/device-tree/Bindings/phy/
H A Dsamsung,exynos5250-sata-phy.yaml26 const: 0
58 reg = <0x12170000 0x1ff>;
61 #phy-cells = <0>;
/freebsd-src/contrib/arm-optimized-routines/pl/math/
H A Dsv_acosh_3u5.c
H A Dlogf.c
/freebsd-src/contrib/netbsd-tests/include/sys/
H A Dt_cdefs.c59 { "unsigned char", 0, UCHAR_MAX },
60 { "unsigned short", 0, USHRT_MAX },
61 { "unsigned int", 0, UINT_MAX },
62 { "unsigned long", 0, ULONG_MAX },
63 { "unsigned long long", 0, ULLONG_MAX },
78 CHECK(signed char, 0); in ATF_TC_BODY()
97 CHECK(unsigned char, 0); in ATF_TC_BODY()
131 #define CHECK(a) ATF_REQUIRE(__type_is_signed(a) == 0) in ATF_TC_BODY()
151 CHECK(unsigned char, 0xffffffffffffff00ULL); in ATF_TC_BODY()
152 CHECK(unsigned short, 0xffffffffffff0000ULL); in ATF_TC_BODY()
[all …]
/freebsd-src/lib/libpam/modules/pam_xdg/
H A Dpam_xdg.c82 if (rt_dir_prefix < 0) { in _pam_xdg_open()
84 if (rt_dir_prefix != 0) { in _pam_xdg_open()
94 if (rt_dir < 0) { in _pam_xdg_open()
96 if (rt_dir != 0) { in _pam_xdg_open()
101 rv = fchownat(rt_dir_prefix, user, passwd->pw_uid, passwd->pw_gid, 0); in _pam_xdg_open()
102 if (rv != 0) { in _pam_xdg_open()
113 rv = fstatat(rt_dir_prefix, user, &sb, 0); in _pam_xdg_open()
126 if ((sb.st_mode & 0x1FF) != RUNTIME_DIR_MODE) { in _pam_xdg_open()
135 if (rv < 0) { in _pam_xdg_open()
[all...]
/freebsd-src/sys/dev/qat/qat_hw/qat_4xxx/
H A Dadf_4xxx_hw_data.h8 #define DEFAULT_4XXX_ASYM_AE_MASK 0x03
9 #define DEFAULT_401XX_ASYM_AE_MASK 0x3F
12 #define ADF_4XXX_SRAM_BAR 0
16 #define ADF_4XXX_TX_RINGS_MASK 0x1
19 #define ADF_4XXX_BAR_MASK (BIT(0) | BIT(2) | BIT(4))
26 #define ADF_4XXX_FUSECTL0_OFFSET (0x2C8)
27 #define ADF_4XXX_FUSECTL1_OFFSET (0x2CC)
28 #define ADF_4XXX_FUSECTL2_OFFSET (0x2D0)
29 #define ADF_4XXX_FUSECTL3_OFFSET (0x2D4)
30 #define ADF_4XXX_FUSECTL4_OFFSET (0x2D8)
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/usb/
H A Domap-usb.txt12 interface between the controller and the phy. It should be "0" or "1"
73 reg = <0x4a020000 0x1ff>;
74 interrupts = <0 93 4>;
/freebsd-src/sys/net80211/
H A Dieee80211_regdomain.h209 CTRY_DEBUG = 0x1ff, /* debug */
210 CTRY_DEFAULT = 0, /* default */
242 SKU_FCC = 0x10, /* FCC, aka United States */
243 SKU_CA = 0x20, /* North America, aka Canada */
244 SKU_ETSI = 0x30, /* Europe */
245 SKU_ETSI2 = 0x32, /* Europe w/o HT40 in 5GHz */
246 SKU_ETSI3 = 0x33, /* Europe - channel 36 */
247 SKU_FCC3 = 0x3a, /* FCC w/5470 band, 11h, DFS */
248 SKU_JAPAN = 0x40,
249 SKU_KOREA = 0x45,
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/intel/ixp/
H A Dintel-ixp42x-adi-coyote.dts19 memory@0 {
22 reg = <0x00000000 0x01000000>;
38 flash@0,0 {
42 * 32 MB of Flash in 128 0x20000 sized blocks
45 reg = <0 0x00000000 0x2000000>;
53 fis-index-block = <0x1ff>;
67 interrupt-map-mask = <0xf800 0 0 7>;
70 <0x0800 0 0 1 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 6 */
71 <0x0800 0 0 2 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT B on slot 1 is irq 6 */
72 <0x0800 0 0 3 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT C on slot 1 is irq 6 */
[all …]
/freebsd-src/contrib/tcpdump/
H A Dprint-brcmtag.c37 #define BRCM_OPCODE_MASK 0x7
41 #define BRCM_IG_TC_MASK 0x7
42 #define BRCM_IG_TE_MASK 0x3
44 #define BRCM_IG_DSTMAP_MASK 0x1ff
47 #define BRCM_EG_CID_MASK 0xff
48 #define BRCM_EG_RC_MASK 0xff
55 #define BRCM_EG_RC_MIRROR (1 << 0)
57 #define BRCM_EG_TC_MASK 0x7
58 #define BRCM_EG_PID_MASK 0x1
[all...]
/freebsd-src/sys/dev/qat/include/common/
H A Dadf_transport_access_macros.h7 #define ADF_BANK_INT_SRC_SEL_MASK_0 0x4444444CUL
8 #define ADF_BANK_INT_SRC_SEL_MASK_X 0x44444444UL
9 #define ADF_BANK_INT_FLAG_CLEAR_MASK 0xFFFF
10 #define ADF_RING_CSR_RING_CONFIG 0x000
11 #define ADF_RING_CSR_RING_LBASE 0x040
12 #define ADF_RING_CSR_RING_UBASE 0x080
13 #define ADF_RING_CSR_RING_HEAD 0x0C0
14 #define ADF_RING_CSR_RING_TAIL 0x100
15 #define ADF_RING_CSR_E_STAT 0x14C
16 #define ADF_RING_CSR_INT_FLAG 0x170
[all …]
/freebsd-src/sys/arm64/nvidia/tegra210/
H A Dtegra210_car.h39 #define RST_SOURCE 0x000
40 #define RST_DEVICES_L 0x004
41 #define RST_DEVICES_H 0x008
42 #define RST_DEVICES_U 0x00C
43 #define CLK_OUT_ENB_L 0x010
44 #define CLK_OUT_ENB_H 0x014
45 #define CLK_OUT_ENB_U 0x018
46 #define SUPER_CCLK_DIVIDER 0x024
47 #define SCLK_BURST_POLICY 0x028
48 #define SUPER_SCLK_DIVIDER 0x02c
[all …]

12345678