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/llvm-project/llvm/test/tools/llvm-cvtres/
H A Dmachine.test34 X86: Machine: IMAGE_FILE_MACHINE_I386 (0x14C)
37 X86-NEXT: 0x1E8 IMAGE_REL_I386_DIR32NB $R000000
38 X86-NEXT: 0x198 IMAGE_REL_I386_DIR32NB $R000001
39 X86-NEXT: 0x1A8 IMAGE_REL_I386_DIR32NB $R000002
40 X86-NEXT: 0x1C8 IMAGE_REL_I386_DIR32NB $R000003
41 X86-NEXT: 0x1D8 IMAGE_REL_I386_DIR32NB $R000004
42 X86-NEXT: 0x1F8 IMAGE_REL_I386_DIR32NB $R000005
43 X86-NEXT: 0x1B8 IMAGE_REL_I386_DIR32NB $R000006
44 X86-NEXT: 0x188 IMAGE_REL_I386_DIR32NB $R000007
46 X64: Machine: IMAGE_FILE_MACHINE_AMD64 (0x8664)
[all …]
H A Dobject.test18 CHECK-NEXT: Table Offset: 0x38
20 CHECK-NEXT: Number of ID Entries: 0
22 CHECK-NEXT: Table Offset: 0xC8
23 CHECK-NEXT: Number of String Entries: 0
26 CHECK-NEXT: Entry Offset: 0x188
27 CHECK-NEXT: Time/Date Stamp: 1970-01-01 00:00:00 (0x0)
28 CHECK-NEXT: Major Version: 0
29 CHECK-NEXT: Minor Version: 0
30 CHECK-NEXT: Characteristics: 0
32 CHECK-NEXT: DataRVA: 0x0
[all …]
/llvm-project/llvm/test/DebugInfo/X86/
H A Dundef-fragment.ll27 ; CHECK: DW_AT_location (0x00000000
28 … {{0x[0-9a-f]+}}, [[ADDR1:0x[0-9a-f]+]]): DW_OP_constu 0x7b, DW_OP_stack_value, DW_OP_piece 0x4, D…
29 ; CHECK-NEXT: [[ADDR1]], [[ADDR2:0x[0-9a-f]+]]): DW_OP_piece 0x4, DW_OP_constu 0x1c8, DW_OP_stack_v…
30 … [[ADDR2]], {{0x[0-9a-f]+}}): DW_OP_constu 0x315, DW_OP_stack_value, DW_OP_piece 0x4, DW_OP_constu…
36 …value(metadata i32 123, metadata !12, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 32)), !dbg !18
40 …lue(metadata i32 undef, metadata !12, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 32)), !dbg !18
42 …value(metadata i32 789, metadata !12, metadata !DIExpression(DW_OP_LLVM_fragment, 0, 32)), !dbg !18
49 declare void @llvm.dbg.value(metadata, metadata, metadata) #0
51 attributes #0 = { nounwind readnone speculatable }
53 !llvm.dbg.cu = !{!0}
[all …]
/llvm-project/lldb/test/Shell/ObjectFile/ELF/
H A Dnull-jmprel.yaml13 Entry: 0x1000
17 VAddr: 0x40
18 Align: 0x8
23 Align: 0x1000
28 VAddr: 0x1000
29 Align: 0x1000
34 VAddr: 0x2000
35 Align: 0x1000
40 VAddr: 0x2000
41 Align: 0x8
[all …]
/llvm-project/llvm/test/tools/llvm-objcopy/ELF/
H A Ddynamic.test7 #CHECK-NEXT: 0x0000000000000006 SYMTAB 0x1C8
8 #CHECK-NEXT: 0x000000000000000B SYMENT 24
9 #CHECK-NEXT: 0x0000000000000005 STRTAB 0x210
10 #CHECK-NEXT: 0x000000000000000A STRSZ 5
11 #CHECK-NEXT: 0x0000000000000004 HASH 0x1F8
12 #CHECK-NEXT: 0x0000000000000000 NULL 0x0
/llvm-project/bolt/test/runtime/X86/
H A Dinterp-overwrite-bug.s15 # RUN: llvm-bolt %t.exe -o %t.exe.bolt --relocs=0 --lite=0 \
28 and $0x3,%rdi
31 movl $0x1,%eax
34 movl $0x2,%eax
37 movl $0x3,%eax
40 movl $0x4,%eax
47 # being corrupt. Typically .interp will be at offset 0x1c8, so the jump table
/llvm-project/lld/test/MachO/Inputs/
H A Ddouble-unwind-info.yaml3 magic: 0xFEEDFACF
4 cputype: 0x1000007
5 cpusubtype: 0x3
6 filetype: 0x1
9 flags: 0x2000
10 reserved: 0x0
15 vmaddr: 0
22 flags: 0
26 addr: 0x0
28 offset: 0x1C0
[all …]
/llvm-project/llvm/test/ExecutionEngine/JITLink/x86-64/
H A DMachO_subtractor_single_block.yaml11 magic: 0xFEEDFACF
12 cputype: 0x1000007
13 cpusubtype: 0x3
14 filetype: 0x1
17 flags: 0x0
18 reserved: 0x0
23 vmaddr: 0
30 flags: 0
34 addr: 0x0
36 offset: 0x1C0
[all …]
/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Dpack.v2i16.ll7 define amdgpu_kernel void @s_pack_v2i16(ptr addrspace(4) %in0, ptr addrspace(4) %in1) #0 {
9 ; GFX9: ; %bb.0:
10 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0
11 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
12 ; GFX9-NEXT: s_load_dword s4, s[0:1], 0x0
13 ; GFX9-NEXT: s_load_dword s5, s[2:3], 0x0
14 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
22 ; GFX803: ; %bb.0
[all...]
H A Dmerge-stores.ll1 …ple=amdgcn -mcpu=tahiti -verify-machineinstrs -amdgpu-load-store-vectorizer=0 < %s | FileCheck -ch…
2 …le=amdgcn -mcpu=bonaire -verify-machineinstrs -amdgpu-load-store-vectorizer=0 < %s | FileCheck -ch…
15 define amdgpu_kernel void @merge_global_store_2_constants_i8(ptr addrspace(1) %out) #0 {
27 …ine amdgpu_kernel void @merge_global_store_2_constants_i8_natural_align(ptr addrspace(1) %out) #0 {
37 define amdgpu_kernel void @merge_global_store_2_constants_i16(ptr addrspace(1) %out) #0 {
47 define amdgpu_kernel void @merge_global_store_2_constants_0_i16(ptr addrspace(1) %out) #0 {
50 store i16 0, ptr addrspace(1) %out.gep.1
51 store i16 0, ptr addrspace(1) %out, align 4
59 …ne amdgpu_kernel void @merge_global_store_2_constants_i16_natural_align(ptr addrspace(1) %out) #0 {
68 ; GCN-DAG: v_mov_b32_e32 v[[LO:[0-9]+]], 0x1c8
[all …]
H A Dadd.v2i16.ll11 ; VI: ; %bb.0:
12 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
13 ; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x34
15 ; VI-NEXT: s_waitcnt lgkmcnt(0)
18 ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
21 ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
22 ; VI-NEXT: flat_load_dword v4, v[0:1] glc
23 ; VI-NEXT: s_waitcnt vmcnt(0)
25 ; VI-NEXT: s_waitcnt vmcnt(0)
[all...]
H A Dds_write2.ll9 define amdgpu_kernel void @simple_write2_one_val_f32(ptr addrspace(1) %C, ptr addrspace(1) %in) #0 {
11 ; CI: ; %bb.0:
12 ; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
13 ; CI-NEXT: s_mov_b32 s3, 0xf000
14 ; CI-NEXT: s_mov_b32 s2, 0
16 ; CI-NEXT: v_mov_b32_e32 v1, 0
17 ; CI-NEXT: s_waitcnt lgkmcnt(0)
18 ; CI-NEXT: buffer_load_dword v1, v[0:1], s[0
[all...]
/llvm-project/lld/test/ELF/
H A Dbasic-systemz.s17 # CHECK-NEXT: ABI Version: 0
20 # CHECK-NEXT: Version: 0x1
21 # CHECK-NEXT: Entry point address: 0x0
24 # CHECK-NEXT: Flags: 0x0
34 # CHECK-NEXT: [ 0] NULL 0000000000000000 000000 000000 00 0 0 …
36 # CHECK-NEXT: [ 2] .hash HASH 00000000000001e0 0001e0 000010 04 A 1 0 …
37 # CHECK-NEXT: [ 3] .dynstr STRTAB 00000000000001f0 0001f0 000001 00 A 0 0 …
38 # CHECK-NEXT: [ 4] .text PROGBITS 00000000000011f4 0001f4 000006 00 AX 0 0 …
39 # CHECK-NEXT: [ 5] .dynamic DYNAMIC 0000000000002200 000200 000060 10 WA 3 0 …
40 # CHECK-NEXT: [ 6] .relro_padding NOBITS 0000000000002260 000260 000da0 00 WA 0 0 …
[all …]
/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dlocalizer.ll9 ; GFX9: ; %bb.0: ; %entry
10 ; GFX9-NEXT: s_load_dword s1, s[8:9], 0x0
12 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
15 ; GFX9-NEXT: s_cmp_lg_u32 s1, 0
18 ; GFX9-NEXT: v_mov_b32_e32 v0, 0x5be6
19 ; GFX9-NEXT: global_store_dword v[0:1], v0, off
20 ; GFX9-NEXT: s_waitcnt vmcnt(0)
21 ; GFX9-NEXT: v_mov_b32_e32 v0, 0x1c7
22 ; GFX9-NEXT: global_store_dword v[0:1], v0, off
23 ; GFX9-NEXT: s_waitcnt vmcnt(0)
[all...]
/llvm-project/llvm/test/tools/llvm-objdump/MachO/AArch64/
H A Dmacho-relative-method-lists.test7 CHK32: baseMethods 0x660 (struct method_list_t *)
10 CHK32-NEXT: name 0x144 (0x{{[0-9a-f]*}}) instance_method_00
11 CHK32-NEXT: types 0x91 (0x{{[0-9a-f]*}}) v8@0:4
12 CHK32-NEXT: imp 0xffffff18 (0x{{[0-9a-f]*}}) -[MyClass instance_method_00]
13 CHK32-NEXT: name 0x13c (0x{{[0-9a-f]*}}) instance_method_01
14 CHK32-NEXT: types 0x85 (0x{{[0-9a-f]*}}) v8@0:4
15 CHK32-NEXT: imp 0xffffff28 (0x{{[0-9a-f]*}}) -[MyClass instance_method_01]
16 CHK32-NEXT: name 0x134 (0x{{[0-9a-f]*}}) instance_method_02
17 CHK32-NEXT: types 0x79 (0x{{[0-9a-f]*}}) v8@0:4
18 CHK32-NEXT: imp 0xffffff38 (0x{{[0-9a-f]*}}) -[MyClass instance_method_02]
[all …]
/llvm-project/lld/test/MachO/
H A Dcompact-unwind-both-local-and-dylib-personality.s39 …ms --indirect-symbols --bind %t/a.out | FileCheck %s --check-prefixes=A,CHECK -D#%x,OFF=0x100000000
40 …s --indirect-symbols --bind %t/b.out | FileCheck %s --check-prefixes=BC,CHECK -D#%x,OFF=0x100000000
41 …fo --syms --indirect-symbols --bind %t/c.out | FileCheck %s --check-prefixes=BC,C,CHECK -D#%x,OFF=0
43 …irect-symbols --unwind-info --bind %t/d.out | FileCheck %s --check-prefixes=D -D#%x,OFF=0x100000000
47 # A: 0x[[#%x,GXX_PERSONALITY_LO:]] [[#]] ___gxx_personality_v0
48 # A: 0x[[#%x,PERSONALITY_1:]] LOCAL
49 # A: 0x[[#%x,PERSONALITY_2:]] LOCAL
50 # A: 0x[[#%x,GXX_PERSONALITY_HI:]] LOCAL
54 # BC: 0x[[#%x,GXX_PERSONALITY_LO:]] LOCAL
55 # C: 0x[[#%x,GXX_PERSONALITY_HI:]] LOCAL
[all …]
/llvm-project/llvm/test/MC/AMDGPU/
H A Dvop3-literal.s6 v_bfe_u32 v0, 0x3039, v1, s1
7 // GFX10: v_bfe_u32 v0, 0x3039, v1, s1 ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x06,0x0
[all...]
/llvm-project/llvm/test/CodeGen/X86/
H A Dstores-merging.ll15 ; CHECK: # %bb.0:
16 ; CHECK-NEXT: movabsq $1958505086977, %rax # imm = 0x1C800000001
19 store i32 1, ptr getelementptr inbounds (%structTy, ptr @e, i64 0, i32 1), align 4
20 store i32 123, ptr getelementptr inbounds (%structTy, ptr @e, i64 0, i32 2), align 4
21 store i32 456, ptr getelementptr inbounds (%structTy, ptr @e, i64 0, i32 2), align 4
28 ; CHECK: # %bb.0:
29 ; CHECK-NEXT: movabsq $528280977409, %rax # imm = 0x7B00000001
31 ; CHECK-NEXT: movl $456, e+8(%rip) # imm = 0x1C8
33 store i32 123, ptr getelementptr inbounds (%structTy, ptr @e, i64 0, i32 2), align 4
34 store i32 456, ptr getelementptr inbounds (%structTy, ptr @e, i64 0, i32 2), align 4
[all …]
H A Dvector-interleaved-store-i64-stride-2.ll20 ; SSE: # %bb.0:
24 ; SSE-NEXT: movlhps {{.*#+}} xmm2 = xmm2[0],xmm1[0]
31 ; AVX: # %bb.0:
32 ; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
33 ; AVX-NEXT: vbroadcastf128 {{.*#+}} ymm1 = mem[0,1,0,1]
34 ; AVX-NEXT: vshufpd {{.*#+}} ymm0 = ymm1[0],ymm0[0],ymm
[all...]
H A Dvector-interleaved-store-i32-stride-6.ll20 ; SSE: # %bb.0:
21 ; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
22 ; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
23 ; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
24 ; SSE-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
25 ; SSE-NEXT: movsd {{.*#+}} xmm3 = mem[0],zero
27 ; SSE-NEXT: movlhps {{.*#+}} xmm4 = xmm4[0],xmm1[0]
29 ; SSE-NEXT: movlhps {{.*#+}} xmm5 = xmm5[0],xmm3[0]
[all...]
H A Dvector-interleaved-load-i32-stride-4.ll20 ; SSE: # %bb.0:
24 ; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
35 ; AVX: # %bb.0:
38 ; AVX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
40 ; AVX-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm1[2,3],xmm3[4,5,6,7]
49 ; AVX2: # %bb.0:
52 ; AVX2-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm0[0],xmm1[0],xmm
[all...]
H A Dvector-interleaved-load-i32-stride-8.ll20 ; SSE: # %bb.0:
21 ; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
22 ; SSE-NEXT: movq {{[0-9]+}}(%rsp), %r10
23 ; SSE-NEXT: movq {{[0-9]+}}(%rsp), %r11
29 ; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1]
34 ; SSE-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1]
49 ; AVX: # %bb.0:
50 ; AVX-NEXT: movq {{[0
[all...]
H A Dvector-interleaved-load-i16-stride-6.ll20 ; SSE: # %bb.0:
21 ; SSE-NEXT: movq {{[0-9]+}}(%rsp), %rax
24 ; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,3,2,3]
25 ; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm2[0,2,2,3,4,5,6,7]
28 ; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3]
30 ; SSE-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm1[0],xmm5[1],xmm1[1],xmm5[2],xmm1[2],xmm5[3],xmm1[3]
32 ; SSE-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[0,3,2,3,4,5,6,7]
35 ; SSE-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm
[all...]
/llvm-project/llvm/test/tools/llvm-readtapi/Inputs/
H A Dmixed-swift-objc.yaml3 magic: 0xFEEDFACF
4 cputype: 0x1000007
5 cpusubtype: 0x3
6 filetype: 0x6
9 flags: 0x110085
10 reserved: 0x0
15 vmaddr: 0
17 fileoff: 0
22 flags: 0
26 addr: 0x1B30
[all …]
/llvm-project/llvm/lib/Target/AMDGPU/
H A DVOP3Instructions.td3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
17 let HasExtVOP3DPP = 0;
18 let HasExtDPP = 0;
31 let HasExtVOP3DPP = 0;
32 let HasExtDPP = 0;
47 let HasExtVOP3DPP = 0;
48 let HasExtDPP = 0;
52 let HasExtVOP3DPP = 0;
53 let HasExtDPP = 0;
63 let mayRaiseFPException = 0;
[all...]

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