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/freebsd-src/sys/contrib/device-tree/Bindings/pinctrl/
H A Dpinctrl-mt8192.yaml148 reg = <0x10005000 0x1000>,
149 <0x11c20000 0x1000>,
150 <0x11d10000 0x1000>,
151 <0x11d30000 0x1000>,
152 <0x11d40000 0x1000>,
153 <0x11e20000 0x1000>,
154 <0x11e70000 0x1000>,
155 <0x11ea0000 0x1000>,
156 <0x11f20000 0x1000>,
157 <0x11f30000 0x1000>,
[all …]
H A Dmediatek,mt8192-pinctrl.yaml149 reg = <0x10005000 0x1000>,
150 <0x11c20000 0x1000>,
151 <0x11d10000 0x1000>,
152 <0x11d30000 0x1000>,
153 <0x11d40000 0x1000>,
154 <0x11e20000 0x1000>,
155 <0x11e70000 0x1000>,
156 <0x11ea0000 0x1000>,
157 <0x11f20000 0x1000>,
158 <0x11f30000 0x1000>,
[all …]
H A Dpinctrl-mt8183.txt53 Valid arguments are from 0 to 3.
57 are from 0 to 15.
60 are from 0 to 63.
75 driving setup property. "XXX" means the value of E1E0EN. EN is 0 or 1.
78 When E1=0/E0=0, the strength is 0.125mA.
79 When E1=0/E0=1, the strength is 0.25mA.
80 When E1=1/E0=0, the strength is 0.5mA.
82 So the valid arguments of "mediatek,drive-strength-adv" are from 0 to 7.
92 reg = <0 0x10005000 0 0x1000>,
93 <0 0x11f20000 0 0x1000>,
[all …]
H A Dmediatek,mt6779-pinctrl.yaml114 '-[0-9]*$':
158 enum: [0, 1]
165 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
166 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
167 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
170 enum: [0, 1, 2, 3]
177 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
178 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
179 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
182 enum: [0, 1, 2, 3]
[all …]
H A Dmediatek,mt8183-pinctrl.yaml126 When E1=0/E0=0, the strength is 0.125mA.
127 When E1=0/E0=1, the strength is 0.25mA.
128 When E1=1/E0=0, the strength is 0.5mA.
132 0: (E1, E0, EN) = (0, 0, 0)
133 1: (E1, E0, EN) = (0, 0, 1)
134 2: (E1, E0, EN) = (0, 1, 0)
135 3: (E1, E0, EN) = (0, 1, 1)
136 4: (E1, E0, EN) = (1, 0, 0)
137 5: (E1, E0, EN) = (1, 0, 1)
138 6: (E1, E0, EN) = (1, 1, 0)
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt6779.dtsi26 #size-cells = <0>;
28 cpu0: cpu@0 {
32 reg = <0x000>;
39 reg = <0x100>;
46 reg = <0x200>;
53 reg = <0x300>;
60 reg = <0x400>;
67 reg = <0x500>;
74 reg = <0x600>;
81 reg = <0x700>;
[all …]
H A Dmt8192.dtsi36 #clock-cells = <0>;
45 #clock-cells = <0>;
52 #clock-cells = <0>;
59 #size-cells = <0>;
61 cpu0: cpu@0 {
64 reg = <0x000>;
75 performance-domains = <&performance 0>;
83 reg = <0x100>;
94 performance-domains = <&performance 0>;
102 reg = <0x20
[all...]
H A Dmt8183.dtsi293 #size-cells = <0>;
327 cpu0: cpu@0 {
330 reg = <0x000>;
353 reg = <0x001>;
376 reg = <0x002>;
399 reg = <0x003>;
422 reg = <0x100>;
445 reg = <0x101>;
468 reg = <0x102>;
491 reg = <0x10
[all...]
/freebsd-src/sys/contrib/dev/mediatek/mt76/mt7915/
H A Dsoc.c18 #define MT7981_CON_INFRA_VERSION 0x02090000
19 #define MT7986_CON_INFRA_VERSION 0x02070000
22 #define MT_INFRACFG_CONN2AP_SLPPROT 0x0d0
23 #define MT_INFRACFG_AP2CONN_SLPPROT 0x0d4
27 #define MT_INFRACFG_TX_EN_MASK BIT(0)
30 #define MT_TOP_POS_FAST_CTRL 0x114
33 #define MT_TOP_POS_SKU 0x21c
56 mt76_wr(dev, MT_TOP_SPI_WRITE_DATA_CR(adie), 0); in mt76_wmac_spi_read()
66 return 0; in mt76_wmac_spi_read()
118 ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_EFUSE2_CTRL, BIT(30), 0x0); in mt7986_wmac_adie_efuse_read()
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5250.dtsi47 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
80 cpu0_opp_table: opp-table-0 {
176 reg = <0x02020000 0x30000>;
179 ranges = <0 0x02020000 0x30000>;
181 smp-sram@0 {
[all...]
H A Dexynos5420.dtsi153 cluster_a15_opp_table: opp-table-0 {
270 reg = <0x10d20000 0x1000>;
271 ranges = <0x0 0x10d20000 0x6000>;
276 reg = <0x4000 0x1000>;
281 reg = <0x5000 0x100
[all...]
/freebsd-src/tools/test/iconv/ref/
H A DUTF-32BE-rev1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]