| /llvm-project/llvm/test/tools/llvm-objcopy/MachO/ |
| H A D | lc-thread.test | 15 magic: 0xFEEDFACF
16 cputype: 0x1000007
17 cpusubtype: 0x3
18 filetype: 0x2
21 flags: 0x18085
22 reserved: 0x0
26 PayloadBytes: [ 0x4, 0x0, 0x0, 0x0, 0x2A, 0x0, 0x0, 0x0, 0x0, 0x0,
27 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
28 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
29 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
[all …]
|
| H A D | linkedit-order-2.test | 63 magic: 0xFEEDFACF
64 cputype: 0x1000007
65 cpusubtype: 0x3
66 filetype: 0x2
69 flags: 0x210085
70 reserved: 0x0
75 vmaddr: 0
77 fileoff: 0
78 filesize: 0
79 maxprot: 0
[all …]
|
| /llvm-project/llvm/test/CodeGen/AArch64/ |
| H A D | ldst-opt-mte-with-dbg.mir | 2 …tr=+mte -run-pass mir-strip-debug,aarch64-ldst-opt -mir-strip-debugify-only=0 -verify-machineinstr…
5 …tr=+mte -run-pass aarch64-ldst-opt,mir-strip-debug -mir-strip-debugify-only=0 -verify-machineinstr…
11 # CHECK: STGPostIndex $x0, $x0, 7
14 bb.0.entry:
15 liveins: $x0
17 STGi $x0, $x0, 0
18 DBG_VALUE $x0, 0
19 DBG_VALUE $x0, 0
20 $x0 = ADDXri $x0, 112, 0
21 DBG_VALUE $x0, 0
[all …]
|
| H A D | ldst-opt-mte.mir | 8 # CHECK: STGPostIndex $x0, $x0, 7
11 bb.0.entry:
12 liveins: $x0
14 STGi $x0, $x0, 0
15 $x0 = ADDXri $x0, 112, 0
16 RET_ReallyLR implicit $x0
20 # CHECK: STGPostIndex $x1, $x0, 7
23 bb.0.entry:
24 liveins: $x0, $x1
26 STGi $x1, $x0, 0
[all …]
|
| H A D | arm64-ldst-unscaled-pre-post.mir | 4 # CHECK: LDRSpost $x0, -4
7 bb.0.entry:
8 liveins: $x0
10 $s0 = LDURSi $x0, 0
11 $x0 = SUBXri $x0, 4, 0
12 RET_ReallyLR implicit $x0
15 # CHECK: LDRDpost $x0, -4
18 bb.0.entry:
19 liveins: $x0
21 $d0 = LDURDi $x0, 0
[all …]
|
| H A D | zero-call-used-regs.ll | 9 @result = dso_local global i32 0, align 4
11 define dso_local i32 @skip(i32 noundef %a, i32 noundef %b, i32 noundef %c) local_unnamed_addr #0 "zero-call-used-regs"="skip" {
13 ; CHECK: // %bb.0: // %entry
24 define dso_local i32 @used_gpr_arg(i32 noundef %a, i32 noundef %b, i32 noundef %c) local_unnamed_addr #0 noinline optnone "zero-call-used-regs"="used-gpr-arg" {
26 ; CHECK: // %bb.0: // %entry
29 ; CHECK-NEXT: mov x1, #0 // =0x0
30 ; CHECK-NEXT: mov x2, #0 // =0x
[all...] |
| /llvm-project/llvm/test/MC/AArch64/ |
| H A D | rprfm.s | 1 // RPRFM is now a v8.0a optional instruction, and overlaps with PRFM. This test
14 rprfm #0, x0, [x0]
15 // CHECK-INST: rprfm pldkeep, x0, [x0]
16 // CHECK-ENCODING: [0x18,0x48,0xa0,0xf8]
18 rprfm #1, x0, [x0]
19 // CHECK-INST: rprfm pstkeep, x0, [x0]
20 // CHECK-ENCODING: [0x19,0x48,0xa0,0xf8]
22 rprfm #2, x0, [x0]
23 // CHECK-INST: rprfm #2, x0, [x0]
24 // CHECK-ENCODING: [0x1a,0x48,0xa0,0xf8]
[all …]
|
| H A D | armv8.4a-actmon.s | 9 msr AMCR_EL0, x0
10 msr AMCFGR_EL0, x0
11 msr AMCGCR_EL0, x0
12 msr AMUSERENR_EL0, x0
13 msr AMCNTENCLR0_EL0, x0
14 msr AMCNTENSET0_EL0, x0
15 msr AMEVCNTR00_EL0, x0
16 msr AMEVCNTR01_EL0, x0
17 msr AMEVCNTR02_EL0, x0
18 msr AMEVCNTR03_EL0, x0
[all …]
|
| H A D | armv8.6a-amvs.s | 5 mrs x0, AMCG1IDR_EL0
6 msr AMEVCNTVOFF00_EL2, x0
7 msr AMEVCNTVOFF01_EL2, x0
8 msr AMEVCNTVOFF02_EL2, x0
9 msr AMEVCNTVOFF03_EL2, x0
10 msr AMEVCNTVOFF04_EL2, x0
11 msr AMEVCNTVOFF05_EL2, x0
12 msr AMEVCNTVOFF06_EL2, x0
13 msr AMEVCNTVOFF07_EL2, x0
14 msr AMEVCNTVOFF08_EL2, x0
[all...] |
| H A D | armv8.5a-mte-error.s | 4 irg x0
5 irg q0, x0
6 irg w0, x0
7 irg x0, q0
8 irg x0, w0
9 irg x0, x1, q0
10 irg x0, x1, w0
11 irg x0, x1, sp
12 irg x0, x1, #1
13 irg x0, #1, x1
[all …]
|
| H A D | armv8r-sysreg.s | 6 mrs x0, VSCTLR_EL2
7 mrs x0, MPUIR_EL1
8 mrs x0, MPUIR_EL2
9 mrs x0, PRENR_EL1
10 mrs x0, PRENR_EL2
11 mrs x0, PRSELR_EL1
12 mrs x0, PRSELR_EL2
13 mrs x0, PRBAR_EL1
14 mrs x0, PRBAR_EL2
15 mrs x0, PRLAR_EL1
[all …]
|
| H A D | armv8.4a-mpam.s | 9 msr MPAM0_EL1, x0
10 msr MPAM1_EL1, x0
11 msr MPAM2_EL2, x0
12 msr MPAM3_EL3, x0
13 msr MPAM1_EL12, x0
14 msr MPAMHCR_EL2, x0
15 msr MPAMVPMV_EL2, x0
16 msr MPAMVPM0_EL2, x0
17 msr MPAMVPM1_EL2, x0
18 msr MPAMVPM2_EL2, x0
[all …]
|
| H A D | armv8.3a-signed-pointer.s | 9 mrs x0, apiakeylo_el1
10 mrs x0, apiakeyhi_el1
11 mrs x0, apibkeylo_el1
12 mrs x0, apibkeyhi_el1
13 mrs x0, apdakeylo_el1
14 mrs x0, apdakeyhi_el1
15 mrs x0, apdbkeylo_el1
16 mrs x0, apdbkeyhi_el1
17 mrs x0, apgakeylo_el1
18 mrs x0, apgakeyhi_el
[all...] |
| /llvm-project/llvm/test/ObjectYAML/MachO/ |
| H A D | chained-fixups.yaml | 3 magic: 0xFEEDFACF
4 cputype: 0x1000007
5 cpusubtype: 0x3
6 filetype: 0x2
9 flags: 0x200085
10 reserved: 0x0
15 vmaddr: 0
17 fileoff: 0
18 filesize: 0
19 maxprot: 0
[all …]
|
| H A D | export_trie_lc_dyld_exports_trie.yaml | 7 magic: 0xFEEDFACF
8 cputype: 0x01000007
9 cpusubtype: 0x80000003
10 filetype: 0x00000002
13 flags: 0x00218085
14 reserved: 0x00000000
19 vmaddr: 0
21 fileoff: 0
22 filesize: 0
23 maxprot: 0
[all …]
|
| /llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| H A D | armv8.4a-actmon.txt | 4 [0x00,0xd2,0x1b,0xd5]
5 [0x60,0xd2,0x1b,0xd5]
6 [0x80,0xd2,0x1b,0xd5]
7 [0xa0,0xd2,0x1b,0xd5]
8 [0x00,0xd4,0x1b,0xd5]
9 [0x20,0xd4,0x1b,0xd5]
10 [0x40,0xd4,0x1b,0xd5]
11 [0x60,0xd4,0x1b,0xd5]
12 [0x00,0xd3,0x1b,0xd5]
13 [0x20,0xd3,0x1b,0xd5]
[all …]
|
| H A D | armv8.4a-mpam.txt | 4 [0x20,0xa5,0x18,0xd5]
5 [0x00,0xa5,0x18,0xd5]
6 [0x00,0xa5,0x1c,0xd5]
7 [0x00,0xa5,0x1e,0xd5]
8 [0x00,0xa5,0x1d,0xd5]
9 [0x00,0xa4,0x1c,0xd5]
10 [0x20,0xa4,0x1c,0xd5]
11 [0x00,0xa6,0x1c,0xd5]
12 [0x20,0xa6,0x1c,0xd5]
13 [0x40,0xa6,0x1c,0xd5]
[all …]
|
| H A D | armv8.2a-statistical-profiling.txt | 4 [0x3f,0x22,0x03,0xd5]
8 [0x00,0x9a,0x18,0xd5]
9 [0x20,0x9a,0x18,0xd5]
10 [0x60,0x9a,0x18,0xd5]
11 [0xe0,0x9a,0x18,0xd5]
12 [0x00,0x99,0x1c,0xd5]
13 [0x00,0x99,0x1d,0xd5]
14 [0x00,0x99,0x18,0xd5]
15 [0x40,0x99,0x18,0xd5]
16 [0x60,0x99,0x18,0xd5]
[all …]
|
| /llvm-project/llvm/test/ObjectYAML/DXContainer/ |
| H A D | DomainMaskVectors.yaml | 4 Hash: [ 0x0, 0x0, 0x0, 0x0, 0x0,
[all...] |
| H A D | GeometryMaskVectors.yaml | 4 Hash: [ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
5 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 ]
8 Minor: 0
60 OutputPositionPresent: 0
61 MinimumWaveLaneCount: 0
66 SigOutputVectors: [ 1, 1, 0, 0 ]
67 NumThreadsX: 0
68 NumThreadsY: 0
69 NumThreadsZ: 0
74 Indices: [ 0 ]
[all …]
|
| /llvm-project/llvm/test/tools/llvm-objdump/MachO/ |
| H A D | atom-info.yaml | 13 magic: 0xFEEDFACF
14 cputype: 0x100000C
15 cpusubtype: 0x0
16 filetype: 0x6
19 flags: 0x100085
20 reserved: 0x0
25 vmaddr: 0
27 fileoff: 0
32 flags: 0
36 addr: 0x3FB8
[all …]
|
| /llvm-project/llvm/test/MC/AMDGPU/ |
| H A D | gfx10_asm_dpp16.s | 6 v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7 // GFX10: [0xfa,0x02,0x0a,0x7e,0x0
[all...] |
| /llvm-project/llvm/test/MC/MachO/ |
| H A D | x86_64-sections.s | 47 // CHECK: Magic: Magic64 (0xFEEDFACF)
48 // CHECK: CpuType: X86-64 (0x1000007)
49 // CHECK: CpuSubType: CPU_SUBTYPE_X86_64_ALL (0x3)
50 // CHECK: FileType: Relocatable (0x1)
53 // CHECK: Flags [ (0x2000)
54 // CHECK: MH_SUBSECTIONS_VIA_SYMBOLS (0x2000)
56 // CHECK: Reserved: 0x0
60 // CHECK: Index: 0
63 // CHECK: Address: 0x0
64 // CHECK: Size: 0x0
[all …]
|
| H A D | x86_32-symbols.s | 129 // CHECK: Magic: Magic (0xFEEDFACE)
130 // CHECK: CpuType: X86 (0x7)
131 // CHECK: CpuSubType: CPU_SUBTYPE_I386_ALL (0x3)
132 // CHECK: FileType: Relocatable (0x1)
135 // CHECK: Flags [ (0x0)
140 // CHECK: Index: 0
143 // CHECK: Address: 0x0
144 // CHECK: Size: 0x0
146 // CHECK: Alignment: 0
147 // CHECK: RelocationOffset: 0x0
[all …]
|
| /llvm-project/llvm/test/tools/llvm-readtapi/Inputs/ |
| H A D | mixed-swift-objc.yaml | 3 magic: 0xFEEDFACF
4 cputype: 0x1000007
5 cpusubtype: 0x3
6 filetype: 0x6
9 flags: 0x110085
10 reserved: 0x0
15 vmaddr: 0
17 fileoff: 0
22 flags: 0
26 addr: 0x1B30
[all …]
|