1 typedef struct Asm Asm; 2 typedef struct Fxsave Fxsave; 3 typedef struct ISAConf ISAConf; 4 typedef struct Label Label; 5 typedef struct Lock Lock; 6 typedef struct MCPU MCPU; 7 typedef struct MFPU MFPU; 8 typedef struct MMMU MMMU; 9 typedef struct Mach Mach; 10 typedef u64int Mpl; 11 typedef Mpl Mreg; /* GAK */ 12 typedef struct Page Page; 13 typedef struct Pcidev Pcidev; 14 typedef struct PFPU PFPU; 15 typedef struct PMMU PMMU; 16 typedef struct PNOTIFY PNOTIFY; 17 typedef u64int PTE; 18 typedef struct Proc Proc; 19 typedef struct Sys Sys; 20 typedef u64int uintmem; /* horrible name */ 21 typedef vlong Tval; 22 typedef struct Ureg Ureg; 23 typedef struct Vctl Vctl; 24 25 #pragma incomplete Ureg 26 27 #define MAXSYSARG 5 /* for mount(fd, afd, mpt, flag, arg) */ 28 29 /* 30 * parameters for sysproc.c 31 */ 32 #define AOUT_MAGIC (S_MAGIC) 33 34 /* 35 * machine dependent definitions used by ../port/portdat.h 36 */ 37 struct Lock 38 { 39 u32int key; 40 int isilock; 41 union { /* GAK */ 42 Mpl pl; 43 Mreg sr; 44 }; 45 uintptr pc; 46 Proc* p; 47 Mach* m; 48 }; 49 50 struct Label 51 { 52 uintptr sp; 53 uintptr pc; 54 }; 55 56 struct Fxsave { 57 u16int fcw; /* x87 control word */ 58 u16int fsw; /* x87 status word */ 59 u8int ftw; /* x87 tag word */ 60 u8int zero; /* 0 */ 61 u16int fop; /* last x87 opcode */ 62 u64int rip; /* last x87 instruction pointer */ 63 u64int rdp; /* last x87 data pointer */ 64 u32int mxcsr; /* MMX control and status */ 65 u32int mxcsrmask; /* supported MMX feature bits */ 66 uchar st[128]; /* shared 64-bit media and x87 regs */ 67 uchar xmm[256]; /* 128-bit media regs */ 68 uchar ign[96]; /* reserved, ignored */ 69 }; 70 71 /* 72 * FPU stuff in Proc 73 */ 74 struct PFPU { 75 int fpustate; 76 uchar fxsave[sizeof(Fxsave)+15]; 77 void* fpusave; 78 }; 79 80 /* 81 * MMU stuff in Proc 82 */ 83 #define NCOLOR 8 84 struct PMMU 85 { 86 Page* mmuptp[4]; /* page table pages for each level */ 87 }; 88 89 /* 90 * things saved in the Proc structure during a notify 91 */ 92 struct PNOTIFY 93 { 94 void emptiness; 95 }; 96 97 /* 98 * Address Space Map. 99 * Low duty cycle. 100 */ 101 struct Asm 102 { 103 uintmem addr; 104 uintmem size; 105 int type; 106 int location; 107 Asm* next; 108 uintmem base; /* used by port; ROUNDUP(addr, PGSZ) */ 109 uintmem limit; /* used by port; ROUNDDN(addr+size, PGSZ) */ 110 uintptr kbase; /* used by port; kernel for base, used by devproc */ 111 }; 112 extern Asm* asmlist; 113 114 #include "../port/portdat.h" 115 116 /* 117 * CPU stuff in Mach. 118 */ 119 struct MCPU { 120 u32int cpuinfo[2][4]; /* CPUID instruction output E[ABCD]X */ 121 int ncpuinfos; /* number of standard entries */ 122 int ncpuinfoe; /* number of extended entries */ 123 int isintelcpu; /* */ 124 }; 125 126 /* 127 * FPU stuff in Mach. 128 */ 129 struct MFPU { 130 u16int fcw; /* x87 control word */ 131 u32int mxcsr; /* MMX control and status */ 132 u32int mxcsrmask; /* supported MMX feature bits */ 133 }; 134 135 /* 136 * MMU stuff in Mach. 137 */ 138 enum 139 { 140 NPGSZ = 4 141 }; 142 143 struct MMMU 144 { 145 Page* pml4; /* pml4 for this processor */ 146 PTE* pmap; /* unused as of yet */ 147 148 uint pgszlg2[NPGSZ]; /* per Mach or per Sys? */ 149 uintmem pgszmask[NPGSZ]; 150 uint pgsz[NPGSZ]; 151 int npgsz; 152 153 Page pml4kludge; /* GAK: we need a page */ 154 }; 155 156 /* 157 * Per processor information. 158 * 159 * The offsets of the first few elements may be known 160 * to low-level assembly code, so do not re-order: 161 * machno - no dependency, convention 162 * splpc - splhi, spllo, splx 163 * proc - syscallentry 164 */ 165 struct Mach 166 { 167 int machno; /* physical id of processor */ 168 uintptr splpc; /* pc of last caller to splhi */ 169 170 Proc* proc; /* current process on this processor */ 171 172 int apicno; 173 int online; 174 int mode; /* fold into online? GAK */ 175 176 MMMU; 177 178 uintptr stack; 179 uchar* vsvm; 180 void* gdt; 181 void* tss; 182 183 ulong ticks; /* of the clock since boot time */ 184 Label sched; /* scheduler wakeup */ 185 Lock alarmlock; /* access to alarm list */ 186 void* alarm; /* alarms bound to this clock */ 187 int inclockintr; 188 189 Proc* readied; /* for runproc */ 190 ulong schedticks; /* next forced context switch */ 191 192 int color; 193 194 int tlbfault; 195 int tlbpurge; 196 int pfault; 197 int cs; 198 int syscall; 199 int load; 200 int intr; 201 int mmuflush; /* make current proc flush it's mmu state */ 202 int ilockdepth; 203 uintptr ilockpc; 204 Perf perf; /* performance counters */ 205 206 int lastintr; 207 208 Lock apictimerlock; 209 uvlong cyclefreq; /* Frequency of user readable cycle counter */ 210 vlong cpuhz; 211 int cpumhz; 212 u64int rdtsc; 213 214 MFPU; 215 MCPU; 216 }; 217 218 /* 219 * This is the low memory map, between 0x100000 and 0x110000. 220 * It is located there to allow fundamental datastructures to be 221 * created and used before knowing where free memory begins 222 * (e.g. there may be modules located after the kernel BSS end). 223 * The layout is known in the bootstrap code in l32p.s. 224 * It is logically two parts: the per processor data structures 225 * for the bootstrap processor (stack, Mach, vsvm, and page tables), 226 * and the global information about the system (syspage, ptrpage). 227 * Some of the elements must be aligned on page boundaries, hence 228 * the unions. 229 */ 230 struct Sys { 231 uchar machstk[MACHSTKSZ]; 232 233 PTE pml4[PTSZ/sizeof(PTE)]; /* */ 234 PTE pdp[PTSZ/sizeof(PTE)]; 235 PTE pd[PTSZ/sizeof(PTE)]; 236 PTE pt[PTSZ/sizeof(PTE)]; 237 238 uchar vsvmpage[4*KiB]; 239 240 union { 241 Mach mach; 242 uchar machpage[MACHSZ]; 243 }; 244 245 union { 246 struct { 247 u64int pmstart; /* physical memory */ 248 u64int pmoccupied; /* how much is occupied */ 249 u64int pmend; /* total span */ 250 u64int pmpaged; /* how much assigned to page pool */ 251 252 uintptr vmstart; /* base address for malloc */ 253 uintptr vmunused; /* 1st unused va */ 254 uintptr vmunmapped; /* 1st unmapped va */ 255 uintptr vmend; /* 1st unusable va */ 256 257 u64int epoch; /* crude time synchronisation */ 258 int nmach; /* how many machs */ 259 int nonline; /* how many machs are online */ 260 uint ticks; /* since boot (type?) */ 261 uint copymode; /* 0 is COW, 1 is copy on ref */ 262 }; 263 uchar syspage[4*KiB]; 264 }; 265 266 union { 267 Mach* machptr[MACHMAX]; 268 uchar ptrpage[4*KiB]; 269 }; 270 271 uchar _57344_[2][4*KiB]; /* unused */ 272 }; 273 274 extern Sys* sys; 275 276 /* 277 * KMap 278 */ 279 typedef void KMap; 280 extern KMap* kmap(Page*); 281 282 #define kunmap(k) 283 #define VA(k) PTR2UINT(k) 284 285 struct 286 { 287 Lock; 288 uint machs; /* bitmap of active CPUs */ 289 int exiting; /* shutdown */ 290 int ispanic; /* shutdown in response to a panic */ 291 int thunderbirdsarego; /* F.A.B. */ 292 }active; 293 294 /* 295 * a parsed plan9.ini line 296 */ 297 #define NISAOPT 8 298 299 struct ISAConf { 300 char *type; 301 uintptr port; 302 int irq; 303 ulong dma; 304 uintptr mem; 305 usize size; 306 ulong freq; 307 308 int nopt; 309 char *opt[NISAOPT]; 310 }; 311 312 /* 313 * The Mach structures must be available via the per-processor 314 * MMU information array machptr, mainly for disambiguation and access to 315 * the clock which is only maintained by the bootstrap processor (0). 316 */ 317 extern register Mach* m; /* R15 */ 318 extern register Proc* up; /* R14 */ 319 320 extern uintptr kseg0; 321 322 /* 323 * Horrid. 324 */ 325 #ifdef _DBGC_ 326 #define DBGFLG (dbgflg[_DBGC_]) 327 #else 328 #define DBGFLG (0) 329 #endif /* _DBGC_ */ 330 331 #define DBG(...) if(!DBGFLG){}else dbgprint(__VA_ARGS__) 332 333 extern char dbgflg[256]; 334 335 #define dbgprint print /* for now */ 336 337 #pragma varargck type "P" uintmem /* GAK */ 338