1 /* $NetBSD: arm_machdep.c,v 1.68 2023/10/04 20:28:05 ad Exp $ */
2
3 /*
4 * Copyright (c) 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (c) 1994-1998 Mark Brinicombe.
40 * Copyright (c) 1994 Brini.
41 * All rights reserved.
42 *
43 * This code is derived from software written for Brini by Mark Brinicombe
44 *
45 * Redistribution and use in source and binary forms, with or without
46 * modification, are permitted provided that the following conditions
47 * are met:
48 * 1. Redistributions of source code must retain the above copyright
49 * notice, this list of conditions and the following disclaimer.
50 * 2. Redistributions in binary form must reproduce the above copyright
51 * notice, this list of conditions and the following disclaimer in the
52 * documentation and/or other materials provided with the distribution.
53 * 3. All advertising materials mentioning features or use of this software
54 * must display the following acknowledgement:
55 * This product includes software developed by Mark Brinicombe
56 * for the NetBSD Project.
57 * 4. The name of the company nor the name of the author may be used to
58 * endorse or promote products derived from this software without specific
59 * prior written permission.
60 *
61 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
62 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
63 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
64 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
65 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
66 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
67 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
68 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
69 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
70 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
71 * SUCH DAMAGE.
72 */
73
74 #include "opt_arm_debug.h"
75 #include "opt_cpuoptions.h"
76 #include "opt_cputypes.h"
77 #include "opt_execfmt.h"
78 #include "opt_modular.h"
79 #include "opt_multiprocessor.h"
80
81 #include <sys/param.h>
82
83 __KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.68 2023/10/04 20:28:05 ad Exp $");
84
85 #include <sys/atomic.h>
86 #include <sys/cpu.h>
87 #include <sys/evcnt.h>
88 #include <sys/exec.h>
89 #include <sys/kcpuset.h>
90 #include <sys/kmem.h>
91 #include <sys/proc.h>
92 #include <sys/systm.h>
93 #include <sys/ucontext.h>
94
95 #ifdef EXEC_AOUT
96 #include <sys/exec_aout.h>
97 #endif
98
99 #include <arm/locore.h>
100
101 #include <machine/vmparam.h>
102
103 /* the following is used externally (sysctl_hw) */
104 char machine[] = MACHINE; /* from <machine/param.h> */
105 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */
106
107 extern const uint32_t undefinedinstruction_bounce[];
108
109 #ifdef MULTIPROCESSOR
110 #define NCPUINFO MAXCPUS
111 #else
112 #define NCPUINFO 1
113 #endif
114
115 /* Our exported CPU info; we can have only one. */
116 struct cpu_info cpu_info_store[NCPUINFO] = {
117 [0] = {
118 .ci_cpl = IPL_HIGH,
119 .ci_curlwp = &lwp0,
120 .ci_undefsave[2] = (register_t) undefinedinstruction_bounce,
121 #if defined(ARM_MMU_EXTENDED) && KERNEL_PID != 0
122 .ci_pmap_asid_cur = KERNEL_PID,
123 #endif
124 }
125 };
126
127 const pcu_ops_t * const pcu_ops_md_defs[PCU_UNIT_COUNT] = {
128 #if defined(FPU_VFP)
129 [PCU_FPU] = &arm_vfp_ops,
130 #endif
131 };
132
133 /*
134 * The ARM architecture places the vector page at address 0.
135 * Later ARM architecture versions, however, allow it to be
136 * relocated to a high address (0xffff0000). This is primarily
137 * to support the Fast Context Switch Extension.
138 *
139 * This variable contains the address of the vector page. It
140 * defaults to 0; it only needs to be initialized if we enable
141 * relocated vectors.
142 */
143 vaddr_t vector_page;
144
145 #if defined(ARM_LOCK_CAS_DEBUG)
146 /*
147 * Event counters for tracking activity of the RAS-based _lock_cas()
148 * routine.
149 */
150 struct evcnt _lock_cas_restart =
151 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "_lock_cas", "restart");
152 EVCNT_ATTACH_STATIC(_lock_cas_restart);
153
154 struct evcnt _lock_cas_success =
155 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "_lock_cas", "success");
156 EVCNT_ATTACH_STATIC(_lock_cas_success);
157
158 struct evcnt _lock_cas_fail =
159 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "_lock_cas", "fail");
160 EVCNT_ATTACH_STATIC(_lock_cas_fail);
161 #endif /* ARM_LOCK_CAS_DEBUG */
162
163 /*
164 * Clear registers on exec
165 */
166
167 void
setregs(struct lwp * l,struct exec_package * pack,vaddr_t stack)168 setregs(struct lwp *l, struct exec_package *pack, vaddr_t stack)
169 {
170 struct trapframe * const tf = lwp_trapframe(l);
171
172 memset(tf, 0, sizeof(*tf));
173 tf->tf_r0 = l->l_proc->p_psstrp;
174 tf->tf_r12 = stack; /* needed by pre 1.4 crt0.c */
175 tf->tf_usr_sp = stack;
176 tf->tf_usr_lr = pack->ep_entry;
177 tf->tf_svc_lr = 0x77777777; /* Something we can see */
178 tf->tf_pc = pack->ep_entry;
179 tf->tf_spsr = PSR_USR32_MODE;
180 #ifdef _ARM_ARCH_BE8
181 /*
182 * If we are running on BE8 mode, we need to set the E bit to
183 * force programs to start as big endian.
184 */
185 tf->tf_spsr |= PSR_E_BIT;
186 #endif
187
188 #ifdef THUMB_CODE
189 if (pack->ep_entry & 1)
190 tf->tf_spsr |= PSR_T_bit;
191 #endif
192
193 l->l_md.md_flags = 0;
194 #ifdef EXEC_AOUT
195 if (pack->ep_esch->es_makecmds == exec_aout_makecmds)
196 l->l_md.md_flags |= MDLWP_NOALIGNFLT;
197 #endif
198 #ifdef FPU_VFP
199 vfp_discardcontext(l, false);
200 #endif
201 }
202
203 /*
204 * startlwp:
205 *
206 * Start a new LWP.
207 */
208 void
startlwp(void * arg)209 startlwp(void *arg)
210 {
211 ucontext_t *uc = (ucontext_t *)arg;
212 lwp_t *l = curlwp;
213 int error __diagused;
214
215 error = cpu_setmcontext(l, &uc->uc_mcontext, uc->uc_flags);
216 KASSERT(error == 0);
217
218 kmem_free(uc, sizeof(ucontext_t));
219 userret(l);
220 }
221
222 void
cpu_need_resched(struct cpu_info * ci,struct lwp * l,int flags)223 cpu_need_resched(struct cpu_info *ci, struct lwp *l, int flags)
224 {
225
226 KASSERT(kpreempt_disabled());
227
228 if (flags & RESCHED_IDLE) {
229 #ifdef MULTIPROCESSOR
230 /*
231 * If the other CPU is idling, it must be waiting for an
232 * event. So give it one.
233 */
234 if (flags & RESCHED_REMOTE) {
235 intr_ipi_send(ci->ci_kcpuset, IPI_NOP);
236 }
237 #endif
238 return;
239 }
240 if (flags & RESCHED_KPREEMPT) {
241 #ifdef __HAVE_PREEMPTION
242 if (flags & RESCHED_REMOTE) {
243 intr_ipi_send(ci->ci_kcpuset, IPI_KPREEMPT);
244 } else {
245 l->l_md.md_astpending |= __BIT(1);
246 }
247 #endif /* __HAVE_PREEMPTION */
248 return;
249 }
250
251 KASSERT((flags & RESCHED_UPREEMPT) != 0);
252 if (flags & RESCHED_REMOTE) {
253 #ifdef MULTIPROCESSOR
254 intr_ipi_send(ci->ci_kcpuset, IPI_AST);
255 #endif /* MULTIPROCESSOR */
256 } else {
257 l->l_md.md_astpending |= __BIT(0);
258 }
259 }
260
261
262 /*
263 * Notify the current lwp (l) that it has a signal pending,
264 * process as soon as possible.
265 */
266 void
cpu_signotify(struct lwp * l)267 cpu_signotify(struct lwp *l)
268 {
269
270 KASSERT(kpreempt_disabled());
271
272 if (l->l_cpu != curcpu()) {
273 #ifdef MULTIPROCESSOR
274 intr_ipi_send(l->l_cpu->ci_kcpuset, IPI_AST);
275 #endif
276 } else {
277 l->l_md.md_astpending |= __BIT(0);
278 }
279 }
280
281 bool
cpu_intr_p(void)282 cpu_intr_p(void)
283 {
284 #ifdef __HAVE_PIC_FAST_SOFTINTS
285 int cpl;
286 #endif
287 int idepth;
288 long pctr;
289 lwp_t *l;
290
291 l = curlwp;
292 do {
293 pctr = lwp_pctr();
294 idepth = l->l_cpu->ci_intr_depth;
295 #ifdef __HAVE_PIC_FAST_SOFTINTS
296 cpl = l->l_cpu->ci_cpl;
297 #endif
298 } while (__predict_false(pctr != lwp_pctr()));
299
300 #ifdef __HAVE_PIC_FAST_SOFTINTS
301 if (cpl < IPL_VM)
302 return false;
303 #endif
304 return idepth != 0;
305 }
306
307 #ifdef MODULAR
308 struct lwp *
arm_curlwp(void)309 arm_curlwp(void)
310 {
311
312 return curlwp;
313 }
314
315 struct cpu_info *
arm_curcpu(void)316 arm_curcpu(void)
317 {
318
319 return curcpu();
320 }
321 #endif
322
323 #ifdef __HAVE_PREEMPTION
324 bool
cpu_kpreempt_enter(uintptr_t where,int s)325 cpu_kpreempt_enter(uintptr_t where, int s)
326 {
327
328 KASSERT(kpreempt_disabled());
329
330 return s == IPL_NONE;
331 }
332
333 void
cpu_kpreempt_exit(uintptr_t where)334 cpu_kpreempt_exit(uintptr_t where)
335 {
336
337 /* do nothing */
338 }
339
340 bool
cpu_kpreempt_disabled(void)341 cpu_kpreempt_disabled(void)
342 {
343
344 return curcpu()->ci_cpl != IPL_NONE;
345 }
346 #endif /* __HAVE_PREEMPTION */
347