1 /* $NetBSD: vega10_pptable.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $ */ 2 3 /* 4 * Copyright 2016 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 */ 25 #ifndef _VEGA10_PPTABLE_H_ 26 #define _VEGA10_PPTABLE_H_ 27 28 #pragma pack(push, 1) 29 30 #define ATOM_VEGA10_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f 31 #define ATOM_VEGA10_PP_FANPARAMETERS_NOFAN 0x80 32 33 #define ATOM_VEGA10_PP_THERMALCONTROLLER_NONE 0 34 #define ATOM_VEGA10_PP_THERMALCONTROLLER_LM96163 17 35 #define ATOM_VEGA10_PP_THERMALCONTROLLER_VEGA10 24 36 37 #define ATOM_VEGA10_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 38 #define ATOM_VEGA10_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL 0x8D 39 40 #define ATOM_VEGA10_PP_PLATFORM_CAP_POWERPLAY 0x1 41 #define ATOM_VEGA10_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 0x2 42 #define ATOM_VEGA10_PP_PLATFORM_CAP_HARDWAREDC 0x4 43 #define ATOM_VEGA10_PP_PLATFORM_CAP_BACO 0x8 44 #define ATOM_VEGA10_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL 0x10 45 46 47 /* ATOM_PPLIB_NONCLOCK_INFO::usClassification */ 48 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007 49 #define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT 0 50 #define ATOM_PPLIB_CLASSIFICATION_UI_NONE 0 51 #define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY 1 52 #define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED 3 53 #define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE 5 54 /* 2, 4, 6, 7 are reserved */ 55 56 #define ATOM_PPLIB_CLASSIFICATION_BOOT 0x0008 57 #define ATOM_PPLIB_CLASSIFICATION_THERMAL 0x0010 58 #define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE 0x0020 59 #define ATOM_PPLIB_CLASSIFICATION_REST 0x0040 60 #define ATOM_PPLIB_CLASSIFICATION_FORCED 0x0080 61 #define ATOM_PPLIB_CLASSIFICATION_ACPI 0x1000 62 63 /* ATOM_PPLIB_NONCLOCK_INFO::usClassification2 */ 64 #define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001 65 66 #define ATOM_Vega10_DISALLOW_ON_DC 0x00004000 67 #define ATOM_Vega10_ENABLE_VARIBRIGHT 0x00008000 68 69 #define ATOM_Vega10_TABLE_REVISION_VEGA10 8 70 71 #define ATOM_Vega10_VoltageMode_AVFS_Interpolate 0 72 #define ATOM_Vega10_VoltageMode_AVFS_WorstCase 1 73 #define ATOM_Vega10_VoltageMode_Static 2 74 75 typedef struct _ATOM_Vega10_POWERPLAYTABLE { 76 struct atom_common_table_header sHeader; 77 UCHAR ucTableRevision; 78 USHORT usTableSize; /* the size of header structure */ 79 ULONG ulGoldenPPID; /* PPGen use only */ 80 ULONG ulGoldenRevision; /* PPGen use only */ 81 USHORT usFormatID; /* PPGen use only */ 82 ULONG ulPlatformCaps; /* See ATOM_Vega10_CAPS_* */ 83 ULONG ulMaxODEngineClock; /* For Overdrive. */ 84 ULONG ulMaxODMemoryClock; /* For Overdrive. */ 85 USHORT usPowerControlLimit; 86 USHORT usUlvVoltageOffset; /* in mv units */ 87 USHORT usUlvSmnclkDid; 88 USHORT usUlvMp1clkDid; 89 USHORT usUlvGfxclkBypass; 90 USHORT usGfxclkSlewRate; 91 UCHAR ucGfxVoltageMode; 92 UCHAR ucSocVoltageMode; 93 UCHAR ucUclkVoltageMode; 94 UCHAR ucUvdVoltageMode; 95 UCHAR ucVceVoltageMode; 96 UCHAR ucMp0VoltageMode; 97 UCHAR ucDcefVoltageMode; 98 USHORT usStateArrayOffset; /* points to ATOM_Vega10_State_Array */ 99 USHORT usFanTableOffset; /* points to ATOM_Vega10_Fan_Table */ 100 USHORT usThermalControllerOffset; /* points to ATOM_Vega10_Thermal_Controller */ 101 USHORT usSocclkDependencyTableOffset; /* points to ATOM_Vega10_SOCCLK_Dependency_Table */ 102 USHORT usMclkDependencyTableOffset; /* points to ATOM_Vega10_MCLK_Dependency_Table */ 103 USHORT usGfxclkDependencyTableOffset; /* points to ATOM_Vega10_GFXCLK_Dependency_Table */ 104 USHORT usDcefclkDependencyTableOffset; /* points to ATOM_Vega10_DCEFCLK_Dependency_Table */ 105 USHORT usVddcLookupTableOffset; /* points to ATOM_Vega10_Voltage_Lookup_Table */ 106 USHORT usVddmemLookupTableOffset; /* points to ATOM_Vega10_Voltage_Lookup_Table */ 107 USHORT usMMDependencyTableOffset; /* points to ATOM_Vega10_MM_Dependency_Table */ 108 USHORT usVCEStateTableOffset; /* points to ATOM_Vega10_VCE_State_Table */ 109 USHORT usReserve; /* No PPM Support for Vega10 */ 110 USHORT usPowerTuneTableOffset; /* points to ATOM_Vega10_PowerTune_Table */ 111 USHORT usHardLimitTableOffset; /* points to ATOM_Vega10_Hard_Limit_Table */ 112 USHORT usVddciLookupTableOffset; /* points to ATOM_Vega10_Voltage_Lookup_Table */ 113 USHORT usPCIETableOffset; /* points to ATOM_Vega10_PCIE_Table */ 114 USHORT usPixclkDependencyTableOffset; /* points to ATOM_Vega10_PIXCLK_Dependency_Table */ 115 USHORT usDispClkDependencyTableOffset; /* points to ATOM_Vega10_DISPCLK_Dependency_Table */ 116 USHORT usPhyClkDependencyTableOffset; /* points to ATOM_Vega10_PHYCLK_Dependency_Table */ 117 } ATOM_Vega10_POWERPLAYTABLE; 118 119 typedef struct _ATOM_Vega10_State { 120 UCHAR ucSocClockIndexHigh; 121 UCHAR ucSocClockIndexLow; 122 UCHAR ucGfxClockIndexHigh; 123 UCHAR ucGfxClockIndexLow; 124 UCHAR ucMemClockIndexHigh; 125 UCHAR ucMemClockIndexLow; 126 USHORT usClassification; 127 ULONG ulCapsAndSettings; 128 USHORT usClassification2; 129 } ATOM_Vega10_State; 130 131 typedef struct _ATOM_Vega10_State_Array { 132 UCHAR ucRevId; 133 UCHAR ucNumEntries; /* Number of entries. */ 134 ATOM_Vega10_State states[1]; /* Dynamically allocate entries. */ 135 } ATOM_Vega10_State_Array; 136 137 typedef struct _ATOM_Vega10_CLK_Dependency_Record { 138 ULONG ulClk; /* Frequency of Clock */ 139 UCHAR ucVddInd; /* Base voltage */ 140 } ATOM_Vega10_CLK_Dependency_Record; 141 142 typedef struct _ATOM_Vega10_GFXCLK_Dependency_Record { 143 ULONG ulClk; /* Clock Frequency */ 144 UCHAR ucVddInd; /* SOC_VDD index */ 145 USHORT usCKSVOffsetandDisable; /* Bits 0~30: Voltage offset for CKS, Bit 31: Disable/enable for the GFXCLK level. */ 146 USHORT usAVFSOffset; /* AVFS Voltage offset */ 147 } ATOM_Vega10_GFXCLK_Dependency_Record; 148 149 typedef struct _ATOM_Vega10_GFXCLK_Dependency_Record_V2 { 150 ULONG ulClk; 151 UCHAR ucVddInd; 152 USHORT usCKSVOffsetandDisable; 153 USHORT usAVFSOffset; 154 UCHAR ucACGEnable; 155 UCHAR ucReserved[3]; 156 } ATOM_Vega10_GFXCLK_Dependency_Record_V2; 157 158 typedef struct _ATOM_Vega10_MCLK_Dependency_Record { 159 ULONG ulMemClk; /* Clock Frequency */ 160 UCHAR ucVddInd; /* SOC_VDD index */ 161 UCHAR ucVddMemInd; /* MEM_VDD - only non zero for MCLK record */ 162 UCHAR ucVddciInd; /* VDDCI = only non zero for MCLK record */ 163 } ATOM_Vega10_MCLK_Dependency_Record; 164 165 typedef struct _ATOM_Vega10_GFXCLK_Dependency_Table { 166 UCHAR ucRevId; 167 UCHAR ucNumEntries; /* Number of entries. */ 168 ATOM_Vega10_GFXCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ 169 } ATOM_Vega10_GFXCLK_Dependency_Table; 170 171 typedef struct _ATOM_Vega10_MCLK_Dependency_Table { 172 UCHAR ucRevId; 173 UCHAR ucNumEntries; /* Number of entries. */ 174 ATOM_Vega10_MCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ 175 } ATOM_Vega10_MCLK_Dependency_Table; 176 177 typedef struct _ATOM_Vega10_SOCCLK_Dependency_Table { 178 UCHAR ucRevId; 179 UCHAR ucNumEntries; /* Number of entries. */ 180 ATOM_Vega10_CLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ 181 } ATOM_Vega10_SOCCLK_Dependency_Table; 182 183 typedef struct _ATOM_Vega10_DCEFCLK_Dependency_Table { 184 UCHAR ucRevId; 185 UCHAR ucNumEntries; /* Number of entries. */ 186 ATOM_Vega10_CLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ 187 } ATOM_Vega10_DCEFCLK_Dependency_Table; 188 189 typedef struct _ATOM_Vega10_PIXCLK_Dependency_Table { 190 UCHAR ucRevId; 191 UCHAR ucNumEntries; /* Number of entries. */ 192 ATOM_Vega10_CLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ 193 } ATOM_Vega10_PIXCLK_Dependency_Table; 194 195 typedef struct _ATOM_Vega10_DISPCLK_Dependency_Table { 196 UCHAR ucRevId; 197 UCHAR ucNumEntries; /* Number of entries.*/ 198 ATOM_Vega10_CLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ 199 } ATOM_Vega10_DISPCLK_Dependency_Table; 200 201 typedef struct _ATOM_Vega10_PHYCLK_Dependency_Table { 202 UCHAR ucRevId; 203 UCHAR ucNumEntries; /* Number of entries. */ 204 ATOM_Vega10_CLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */ 205 } ATOM_Vega10_PHYCLK_Dependency_Table; 206 207 typedef struct _ATOM_Vega10_MM_Dependency_Record { 208 UCHAR ucVddcInd; /* SOC_VDD voltage */ 209 ULONG ulDClk; /* UVD D-clock */ 210 ULONG ulVClk; /* UVD V-clock */ 211 ULONG ulEClk; /* VCE clock */ 212 ULONG ulPSPClk; /* PSP clock */ 213 } ATOM_Vega10_MM_Dependency_Record; 214 215 typedef struct _ATOM_Vega10_MM_Dependency_Table { 216 UCHAR ucRevId; 217 UCHAR ucNumEntries; /* Number of entries */ 218 ATOM_Vega10_MM_Dependency_Record entries[1]; /* Dynamically allocate entries */ 219 } ATOM_Vega10_MM_Dependency_Table; 220 221 typedef struct _ATOM_Vega10_PCIE_Record { 222 ULONG ulLCLK; /* LClock */ 223 UCHAR ucPCIEGenSpeed; /* PCIE Speed */ 224 UCHAR ucPCIELaneWidth; /* PCIE Lane Width */ 225 } ATOM_Vega10_PCIE_Record; 226 227 typedef struct _ATOM_Vega10_PCIE_Table { 228 UCHAR ucRevId; 229 UCHAR ucNumEntries; /* Number of entries */ 230 ATOM_Vega10_PCIE_Record entries[1]; /* Dynamically allocate entries. */ 231 } ATOM_Vega10_PCIE_Table; 232 233 typedef struct _ATOM_Vega10_Voltage_Lookup_Record { 234 USHORT usVdd; /* Base voltage */ 235 } ATOM_Vega10_Voltage_Lookup_Record; 236 237 typedef struct _ATOM_Vega10_Voltage_Lookup_Table { 238 UCHAR ucRevId; 239 UCHAR ucNumEntries; /* Number of entries */ 240 ATOM_Vega10_Voltage_Lookup_Record entries[1]; /* Dynamically allocate entries */ 241 } ATOM_Vega10_Voltage_Lookup_Table; 242 243 typedef struct _ATOM_Vega10_Fan_Table { 244 UCHAR ucRevId; /* Change this if the table format changes or version changes so that the other fields are not the same. */ 245 USHORT usFanOutputSensitivity; /* Sensitivity of fan reaction to temepature changes. */ 246 USHORT usFanRPMMax; /* The default value in RPM. */ 247 USHORT usThrottlingRPM; 248 USHORT usFanAcousticLimit; /* Minimum Fan Controller Frequency Acoustic Limit. */ 249 USHORT usTargetTemperature; /* The default ideal temperature in Celcius. */ 250 USHORT usMinimumPWMLimit; /* The minimum PWM that the advanced fan controller can set. */ 251 USHORT usTargetGfxClk; /* The ideal Fan Controller GFXCLK Frequency Acoustic Limit. */ 252 USHORT usFanGainEdge; 253 USHORT usFanGainHotspot; 254 USHORT usFanGainLiquid; 255 USHORT usFanGainVrVddc; 256 USHORT usFanGainVrMvdd; 257 USHORT usFanGainPlx; 258 USHORT usFanGainHbm; 259 UCHAR ucEnableZeroRPM; 260 USHORT usFanStopTemperature; 261 USHORT usFanStartTemperature; 262 } ATOM_Vega10_Fan_Table; 263 264 typedef struct _ATOM_Vega10_Fan_Table_V2 { 265 UCHAR ucRevId; 266 USHORT usFanOutputSensitivity; 267 USHORT usFanAcousticLimitRpm; 268 USHORT usThrottlingRPM; 269 USHORT usTargetTemperature; 270 USHORT usMinimumPWMLimit; 271 USHORT usTargetGfxClk; 272 USHORT usFanGainEdge; 273 USHORT usFanGainHotspot; 274 USHORT usFanGainLiquid; 275 USHORT usFanGainVrVddc; 276 USHORT usFanGainVrMvdd; 277 USHORT usFanGainPlx; 278 USHORT usFanGainHbm; 279 UCHAR ucEnableZeroRPM; 280 USHORT usFanStopTemperature; 281 USHORT usFanStartTemperature; 282 UCHAR ucFanParameters; 283 UCHAR ucFanMinRPM; 284 UCHAR ucFanMaxRPM; 285 } ATOM_Vega10_Fan_Table_V2; 286 287 typedef struct _ATOM_Vega10_Fan_Table_V3 { 288 UCHAR ucRevId; 289 USHORT usFanOutputSensitivity; 290 USHORT usFanAcousticLimitRpm; 291 USHORT usThrottlingRPM; 292 USHORT usTargetTemperature; 293 USHORT usMinimumPWMLimit; 294 USHORT usTargetGfxClk; 295 USHORT usFanGainEdge; 296 USHORT usFanGainHotspot; 297 USHORT usFanGainLiquid; 298 USHORT usFanGainVrVddc; 299 USHORT usFanGainVrMvdd; 300 USHORT usFanGainPlx; 301 USHORT usFanGainHbm; 302 UCHAR ucEnableZeroRPM; 303 USHORT usFanStopTemperature; 304 USHORT usFanStartTemperature; 305 UCHAR ucFanParameters; 306 UCHAR ucFanMinRPM; 307 UCHAR ucFanMaxRPM; 308 USHORT usMGpuThrottlingRPM; 309 } ATOM_Vega10_Fan_Table_V3; 310 311 typedef struct _ATOM_Vega10_Thermal_Controller { 312 UCHAR ucRevId; 313 UCHAR ucType; /* one of ATOM_VEGA10_PP_THERMALCONTROLLER_*/ 314 UCHAR ucI2cLine; /* as interpreted by DAL I2C */ 315 UCHAR ucI2cAddress; 316 UCHAR ucFanParameters; /* Fan Control Parameters. */ 317 UCHAR ucFanMinRPM; /* Fan Minimum RPM (hundreds) -- for display purposes only.*/ 318 UCHAR ucFanMaxRPM; /* Fan Maximum RPM (hundreds) -- for display purposes only.*/ 319 UCHAR ucFlags; /* to be defined */ 320 } ATOM_Vega10_Thermal_Controller; 321 322 typedef struct _ATOM_Vega10_VCE_State_Record 323 { 324 UCHAR ucVCEClockIndex; /*index into usVCEDependencyTableOffset of 'ATOM_Vega10_MM_Dependency_Table' type */ 325 UCHAR ucFlag; /* 2 bits indicates memory p-states */ 326 UCHAR ucSCLKIndex; /* index into ATOM_Vega10_SCLK_Dependency_Table */ 327 UCHAR ucMCLKIndex; /* index into ATOM_Vega10_MCLK_Dependency_Table */ 328 } ATOM_Vega10_VCE_State_Record; 329 330 typedef struct _ATOM_Vega10_VCE_State_Table 331 { 332 UCHAR ucRevId; 333 UCHAR ucNumEntries; 334 ATOM_Vega10_VCE_State_Record entries[1]; 335 } ATOM_Vega10_VCE_State_Table; 336 337 typedef struct _ATOM_Vega10_PowerTune_Table { 338 UCHAR ucRevId; 339 USHORT usSocketPowerLimit; 340 USHORT usBatteryPowerLimit; 341 USHORT usSmallPowerLimit; 342 USHORT usTdcLimit; 343 USHORT usEdcLimit; 344 USHORT usSoftwareShutdownTemp; 345 USHORT usTemperatureLimitHotSpot; 346 USHORT usTemperatureLimitLiquid1; 347 USHORT usTemperatureLimitLiquid2; 348 USHORT usTemperatureLimitHBM; 349 USHORT usTemperatureLimitVrSoc; 350 USHORT usTemperatureLimitVrMem; 351 USHORT usTemperatureLimitPlx; 352 USHORT usLoadLineResistance; 353 UCHAR ucLiquid1_I2C_address; 354 UCHAR ucLiquid2_I2C_address; 355 UCHAR ucVr_I2C_address; 356 UCHAR ucPlx_I2C_address; 357 UCHAR ucLiquid_I2C_LineSCL; 358 UCHAR ucLiquid_I2C_LineSDA; 359 UCHAR ucVr_I2C_LineSCL; 360 UCHAR ucVr_I2C_LineSDA; 361 UCHAR ucPlx_I2C_LineSCL; 362 UCHAR ucPlx_I2C_LineSDA; 363 USHORT usTemperatureLimitTedge; 364 } ATOM_Vega10_PowerTune_Table; 365 366 typedef struct _ATOM_Vega10_PowerTune_Table_V2 367 { 368 UCHAR ucRevId; 369 USHORT usSocketPowerLimit; 370 USHORT usBatteryPowerLimit; 371 USHORT usSmallPowerLimit; 372 USHORT usTdcLimit; 373 USHORT usEdcLimit; 374 USHORT usSoftwareShutdownTemp; 375 USHORT usTemperatureLimitHotSpot; 376 USHORT usTemperatureLimitLiquid1; 377 USHORT usTemperatureLimitLiquid2; 378 USHORT usTemperatureLimitHBM; 379 USHORT usTemperatureLimitVrSoc; 380 USHORT usTemperatureLimitVrMem; 381 USHORT usTemperatureLimitPlx; 382 USHORT usLoadLineResistance; 383 UCHAR ucLiquid1_I2C_address; 384 UCHAR ucLiquid2_I2C_address; 385 UCHAR ucLiquid_I2C_Line; 386 UCHAR ucVr_I2C_address; 387 UCHAR ucVr_I2C_Line; 388 UCHAR ucPlx_I2C_address; 389 UCHAR ucPlx_I2C_Line; 390 USHORT usTemperatureLimitTedge; 391 } ATOM_Vega10_PowerTune_Table_V2; 392 393 typedef struct _ATOM_Vega10_PowerTune_Table_V3 394 { 395 UCHAR ucRevId; 396 USHORT usSocketPowerLimit; 397 USHORT usBatteryPowerLimit; 398 USHORT usSmallPowerLimit; 399 USHORT usTdcLimit; 400 USHORT usEdcLimit; 401 USHORT usSoftwareShutdownTemp; 402 USHORT usTemperatureLimitHotSpot; 403 USHORT usTemperatureLimitLiquid1; 404 USHORT usTemperatureLimitLiquid2; 405 USHORT usTemperatureLimitHBM; 406 USHORT usTemperatureLimitVrSoc; 407 USHORT usTemperatureLimitVrMem; 408 USHORT usTemperatureLimitPlx; 409 USHORT usLoadLineResistance; 410 UCHAR ucLiquid1_I2C_address; 411 UCHAR ucLiquid2_I2C_address; 412 UCHAR ucLiquid_I2C_Line; 413 UCHAR ucVr_I2C_address; 414 UCHAR ucVr_I2C_Line; 415 UCHAR ucPlx_I2C_address; 416 UCHAR ucPlx_I2C_Line; 417 USHORT usTemperatureLimitTedge; 418 USHORT usBoostStartTemperature; 419 USHORT usBoostStopTemperature; 420 ULONG ulBoostClock; 421 ULONG Reserved[2]; 422 } ATOM_Vega10_PowerTune_Table_V3; 423 424 typedef struct _ATOM_Vega10_Hard_Limit_Record { 425 ULONG ulSOCCLKLimit; 426 ULONG ulGFXCLKLimit; 427 ULONG ulMCLKLimit; 428 USHORT usVddcLimit; 429 USHORT usVddciLimit; 430 USHORT usVddMemLimit; 431 } ATOM_Vega10_Hard_Limit_Record; 432 433 typedef struct _ATOM_Vega10_Hard_Limit_Table 434 { 435 UCHAR ucRevId; 436 UCHAR ucNumEntries; 437 ATOM_Vega10_Hard_Limit_Record entries[1]; 438 } ATOM_Vega10_Hard_Limit_Table; 439 440 typedef struct _Vega10_PPTable_Generic_SubTable_Header 441 { 442 UCHAR ucRevId; 443 } Vega10_PPTable_Generic_SubTable_Header; 444 445 #pragma pack(pop) 446 447 #endif 448