xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/vega20_pptable.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: vega20_pptable.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $	*/
2 
3 /*
4  * Copyright 2018 Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  */
25 #ifndef _VEGA20_PPTABLE_H_
26 #define _VEGA20_PPTABLE_H_
27 
28 #pragma pack(push, 1)
29 
30 #define ATOM_VEGA20_PP_THERMALCONTROLLER_NONE           0
31 #define ATOM_VEGA20_PP_THERMALCONTROLLER_VEGA20     26
32 
33 #define ATOM_VEGA20_PP_PLATFORM_CAP_POWERPLAY                   0x1
34 #define ATOM_VEGA20_PP_PLATFORM_CAP_SBIOSPOWERSOURCE            0x2
35 #define ATOM_VEGA20_PP_PLATFORM_CAP_HARDWAREDC                  0x4
36 #define ATOM_VEGA20_PP_PLATFORM_CAP_BACO                        0x8
37 #define ATOM_VEGA20_PP_PLATFORM_CAP_BAMACO                      0x10
38 #define ATOM_VEGA20_PP_PLATFORM_CAP_ENABLESHADOWPSTATE          0x20
39 
40 #define ATOM_VEGA20_TABLE_REVISION_VEGA20         11
41 #define ATOM_VEGA20_ODFEATURE_MAX_COUNT         32
42 #define ATOM_VEGA20_ODSETTING_MAX_COUNT         32
43 #define ATOM_VEGA20_PPCLOCK_MAX_COUNT           16
44 
45 enum ATOM_VEGA20_ODFEATURE_ID {
46   ATOM_VEGA20_ODFEATURE_GFXCLK_LIMITS = 0,
47   ATOM_VEGA20_ODFEATURE_GFXCLK_CURVE,
48   ATOM_VEGA20_ODFEATURE_UCLK_MAX,
49   ATOM_VEGA20_ODFEATURE_POWER_LIMIT,
50   ATOM_VEGA20_ODFEATURE_FAN_ACOUSTIC_LIMIT,    //FanMaximumRpm
51   ATOM_VEGA20_ODFEATURE_FAN_SPEED_MIN,         //FanMinimumPwm
52   ATOM_VEGA20_ODFEATURE_TEMPERATURE_FAN,       //FanTargetTemperature
53   ATOM_VEGA20_ODFEATURE_TEMPERATURE_SYSTEM,    //MaxOpTemp
54   ATOM_VEGA20_ODFEATURE_MEMORY_TIMING_TUNE,
55   ATOM_VEGA20_ODFEATURE_FAN_ZERO_RPM_CONTROL,
56   ATOM_VEGA20_ODFEATURE_COUNT,
57 };
58 
59 enum ATOM_VEGA20_ODSETTING_ID {
60   ATOM_VEGA20_ODSETTING_GFXCLKFMAX = 0,
61   ATOM_VEGA20_ODSETTING_GFXCLKFMIN,
62   ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P1,
63   ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P1,
64   ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P2,
65   ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P2,
66   ATOM_VEGA20_ODSETTING_VDDGFXCURVEFREQ_P3,
67   ATOM_VEGA20_ODSETTING_VDDGFXCURVEVOLTAGEOFFSET_P3,
68   ATOM_VEGA20_ODSETTING_UCLKFMAX,
69   ATOM_VEGA20_ODSETTING_POWERPERCENTAGE,
70   ATOM_VEGA20_ODSETTING_FANRPMMIN,
71   ATOM_VEGA20_ODSETTING_FANRPMACOUSTICLIMIT,
72   ATOM_VEGA20_ODSETTING_FANTARGETTEMPERATURE,
73   ATOM_VEGA20_ODSETTING_OPERATINGTEMPMAX,
74   ATOM_VEGA20_ODSETTING_COUNT,
75 };
76 typedef enum ATOM_VEGA20_ODSETTING_ID ATOM_VEGA20_ODSETTING_ID;
77 
78 typedef struct _ATOM_VEGA20_OVERDRIVE8_RECORD
79 {
80   UCHAR ucODTableRevision;
81   ULONG ODFeatureCount;
82   UCHAR ODFeatureCapabilities [ATOM_VEGA20_ODFEATURE_MAX_COUNT];   //OD feature support flags
83   ULONG ODSettingCount;
84   ULONG ODSettingsMax [ATOM_VEGA20_ODSETTING_MAX_COUNT];           //Upper Limit for each OD Setting
85   ULONG ODSettingsMin [ATOM_VEGA20_ODSETTING_MAX_COUNT];           //Lower Limit for each OD Setting
86 } ATOM_VEGA20_OVERDRIVE8_RECORD;
87 
88 enum ATOM_VEGA20_PPCLOCK_ID {
89   ATOM_VEGA20_PPCLOCK_GFXCLK = 0,
90   ATOM_VEGA20_PPCLOCK_VCLK,
91   ATOM_VEGA20_PPCLOCK_DCLK,
92   ATOM_VEGA20_PPCLOCK_ECLK,
93   ATOM_VEGA20_PPCLOCK_SOCCLK,
94   ATOM_VEGA20_PPCLOCK_UCLK,
95   ATOM_VEGA20_PPCLOCK_FCLK,
96   ATOM_VEGA20_PPCLOCK_DCEFCLK,
97   ATOM_VEGA20_PPCLOCK_DISPCLK,
98   ATOM_VEGA20_PPCLOCK_PIXCLK,
99   ATOM_VEGA20_PPCLOCK_PHYCLK,
100   ATOM_VEGA20_PPCLOCK_COUNT,
101 };
102 typedef enum ATOM_VEGA20_PPCLOCK_ID ATOM_VEGA20_PPCLOCK_ID;
103 
104 typedef struct _ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD
105 {
106   UCHAR ucTableRevision;
107   ULONG PowerSavingClockCount;                                 // Count of PowerSavingClock Mode
108   ULONG PowerSavingClockMax  [ATOM_VEGA20_PPCLOCK_MAX_COUNT];      // PowerSavingClock Mode Clock Maximum array In MHz
109   ULONG PowerSavingClockMin  [ATOM_VEGA20_PPCLOCK_MAX_COUNT];      // PowerSavingClock Mode Clock Minimum array In MHz
110 } ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD;
111 
112 typedef struct _ATOM_VEGA20_POWERPLAYTABLE
113 {
114       struct atom_common_table_header sHeader;
115       UCHAR  ucTableRevision;
116       USHORT usTableSize;
117       ULONG  ulGoldenPPID;
118       ULONG  ulGoldenRevision;
119       USHORT usFormatID;
120 
121       ULONG  ulPlatformCaps;
122 
123       UCHAR  ucThermalControllerType;
124 
125       USHORT usSmallPowerLimit1;
126       USHORT usSmallPowerLimit2;
127       USHORT usBoostPowerLimit;
128       USHORT usODTurboPowerLimit;
129       USHORT usODPowerSavePowerLimit;
130       USHORT usSoftwareShutdownTemp;
131 
132       ATOM_VEGA20_POWER_SAVING_CLOCK_RECORD PowerSavingClockTable;    //PowerSavingClock Mode Clock Min/Max array
133 
134       ATOM_VEGA20_OVERDRIVE8_RECORD OverDrive8Table;       //OverDrive8 Feature capabilities and Settings Range (Max and Min)
135 
136       USHORT usReserve[5];
137 
138       PPTable_t smcPPTable;
139 
140 } ATOM_Vega20_POWERPLAYTABLE;
141 
142 #pragma pack(pop)
143 
144 #endif
145