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Searched defs:simm5 (Results 1 – 6 of 6) sorted by relevance

/llvm-project/clang/lib/Headers/
H A Dsifive_vector.h49 #define __riscv_sf_vc_i_se_u8mf4(p27_26, p24_20, p11_7, simm5, vl) \ argument
51 #define __riscv_sf_vc_i_se_u8mf2(p27_26, p24_20, p11_7, simm5, vl) \ argument
53 #define __riscv_sf_vc_i_se_u8m1(p27_26, p24_20, p11_7, simm5, vl) \ argument
55 #define __riscv_sf_vc_i_se_u8m2(p27_26, p24_20, p11_7, simm5, vl) \ argument
57 #define __riscv_sf_vc_i_se_u8m4(p27_26, p24_20, p11_7, simm5, vl) \ argument
59 #define __riscv_sf_vc_i_se_u8m8(p27_26, p24_20, p11_7, simm5, vl) \ argument
62 #define __riscv_sf_vc_i_se_u16mf2(p27_26, p24_20, p11_7, simm5, vl) \ argument
64 #define __riscv_sf_vc_i_se_u16m1(p27_26, p24_20, p11_7, simm5, vl) \ argument
66 #define __riscv_sf_vc_i_se_u16m2(p27_26, p24_20, p11_7, simm5, vl) \ argument
68 #define __riscv_sf_vc_i_se_u16m4(p27_26, p24_20, p11_7, simm5, vl) \ argument
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/llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/
H A Dxsfvcp-x.c11 #define simm5 (10) macro
H A Dxsfvcp-xvw.c10 #define simm5 (10) macro
H A Dxsfvcp-xv.c11 #define simm5 (10) macro
H A Dxsfvcp-xvv.c10 #define simm5 (10) macro
/llvm-project/clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/
H A Dxsfvcp-index-out-of-range.c14 #define simm5 (15) macro