xref: /dpdk/lib/hash/rte_hash_crc.c (revision 97433132c2edda70ff69843b8f9273853cac984c)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2014 Intel Corporation
3  */
4 
5 #include <rte_cpuflags.h>
6 #include <rte_log.h>
7 
8 #include "rte_hash_crc.h"
9 
10 RTE_LOG_REGISTER_SUFFIX(hash_crc_logtype, crc, INFO);
11 #define RTE_LOGTYPE_HASH_CRC hash_crc_logtype
12 #define HASH_CRC_LOG(level, ...) \
13 	RTE_LOG_LINE(level, HASH_CRC, "" __VA_ARGS__)
14 
15 uint8_t rte_hash_crc32_alg = CRC32_SW;
16 
17 /**
18  * Allow or disallow use of SSE4.2/ARMv8 intrinsics for CRC32 hash
19  * calculation.
20  *
21  * @param alg
22  *   An OR of following flags:
23  *   - (CRC32_SW) Don't use SSE4.2/ARMv8 intrinsics (default non-[x86/ARMv8])
24  *   - (CRC32_SSE42) Use SSE4.2 intrinsics if available
25  *   - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default x86)
26  *   - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8)
27  *
28  */
29 void
rte_hash_crc_set_alg(uint8_t alg)30 rte_hash_crc_set_alg(uint8_t alg)
31 {
32 	rte_hash_crc32_alg = CRC32_SW;
33 
34 	if (alg == CRC32_SW)
35 		return;
36 
37 #if defined RTE_ARCH_X86
38 	if (!(alg & CRC32_SSE42_x64))
39 		HASH_CRC_LOG(WARNING,
40 			"Unsupported CRC32 algorithm requested using CRC32_x64/CRC32_SSE42");
41 	if (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T) || alg == CRC32_SSE42)
42 		rte_hash_crc32_alg = CRC32_SSE42;
43 	else
44 		rte_hash_crc32_alg = CRC32_SSE42_x64;
45 #endif
46 
47 #if defined RTE_ARCH_ARM64
48 	if (!(alg & CRC32_ARM64))
49 		HASH_CRC_LOG(WARNING,
50 			"Unsupported CRC32 algorithm requested using CRC32_ARM64");
51 	if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32))
52 		rte_hash_crc32_alg = CRC32_ARM64;
53 #endif
54 
55 	if (rte_hash_crc32_alg == CRC32_SW)
56 		HASH_CRC_LOG(WARNING,
57 			"Unsupported CRC32 algorithm requested using CRC32_SW");
58 }
59 
60 /* Setting the best available algorithm */
RTE_INIT(rte_hash_crc_init_alg)61 RTE_INIT(rte_hash_crc_init_alg)
62 {
63 #if defined(RTE_ARCH_X86)
64 	rte_hash_crc_set_alg(CRC32_SSE42_x64);
65 #elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)
66 	rte_hash_crc_set_alg(CRC32_ARM64);
67 #else
68 	rte_hash_crc_set_alg(CRC32_SW);
69 #endif
70 }
71