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Searched defs:reg_offset (Results 1 – 25 of 71) sorted by relevance

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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dmmsch_v1_0.h65 uint32_t reg_offset : 28; member
70 uint32_t reg_offset : 20; member
103 uint32_t reg_offset, in mmsch_v1_0_insert_direct_wt()
113 uint32_t reg_offset, in mmsch_v1_0_insert_direct_rd_mod_wt()
125 uint32_t reg_offset, in mmsch_v1_0_insert_direct_poll()
H A Damdgpu_jpeg_v1_0.c41 …_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_offset, uint32_t v… in jpeg_v1_0_decode_ring_patch_wreg()
60 uint32_t reg, reg_offset, val, mask, i; in jpeg_v1_0_decode_ring_set_patch_ring() local
350 uint32_t reg_offset = (reg << 2); in jpeg_v1_0_decode_ring_emit_reg_wait() local
394 uint32_t reg_offset = (reg << 2); in jpeg_v1_0_decode_ring_emit_wreg() local
H A Dsoc15.h51 uint32_t reg_offset; member
61 uint32_t reg_offset; member
70 uint32_t reg_offset; member
H A Damdgpu_nv.c216 u32 sh_num, u32 reg_offset) in nv_read_indexed_register()
234 u32 sh_num, u32 reg_offset) in nv_get_register_value()
246 u32 sh_num, u32 reg_offset, u32 *value) in nv_read_register()
H A Damdgpu_jpeg_v2_0.c605 uint32_t reg_offset = (reg << 2); in jpeg_v2_0_dec_ring_emit_reg_wait() local
646 uint32_t reg_offset = (reg << 2); in jpeg_v2_0_dec_ring_emit_wreg() local
H A Damdgpu_soc15.c364 u32 sh_num, u32 reg_offset) in soc15_read_indexed_register()
382 u32 sh_num, u32 reg_offset) in soc15_get_register_value()
396 u32 sh_num, u32 reg_offset, u32 *value) in soc15_read_register()
H A Damdgpu_si.c1037 u32 sh_num, u32 reg_offset) in si_get_register_value()
1111 u32 sh_num, u32 reg_offset, u32 *value) in si_read_register()
H A Damdgpu_cik.c1055 u32 sh_num, u32 reg_offset) in cik_get_register_value()
1150 u32 sh_num, u32 reg_offset, u32 *value) in cik_read_register()
H A Damdgpu_vi.c560 u32 sh_num, u32 reg_offset) in vi_get_register_value()
655 u32 sh_num, u32 reg_offset, u32 *value) in vi_read_register()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Dcommon_baco.h40 uint32_t reg_offset; member
52 uint32_t reg_offset; member
/netbsd-src/sys/dev/isa/
H A Dnca_isa.c123 nca_isa_test(bus_space_tag_t iot, bus_space_handle_t ioh, bus_size_t reg_offset) in nca_isa_test()
179 bus_size_t base_offset, reg_offset = 0; in nca_isa_find() local
/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_cik_sdma.c257 u32 rb_cntl, reg_offset; in cik_sdma_gfx_stop() local
311 uint32_t reg_offset, value; in cik_sdma_ctx_switch_enable() local
338 u32 me_cntl, reg_offset; in cik_sdma_enable() local
375 u32 reg_offset, wb_offset; in cik_sdma_gfx_resume() local
H A Dradeon_ni_dma.c197 u32 reg_offset, wb_offset; in cayman_dma_resume() local
/netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/mips/
H A Dlinux-unwind.h51 _Unwind_Ptr new_cfa, reg_offset; in mips_fallback_frame_state() local
/netbsd-src/external/gpl3/gcc/dist/libgcc/config/mips/
H A Dlinux-unwind.h51 _Unwind_Ptr new_cfa, reg_offset; in mips_fallback_frame_state() local
/netbsd-src/usr.bin/scmdctl/
H A Dcommon.c221 uint8_t reg, reg_index = 0, reg_offset = 0; in common_invert_motor() local
263 uint8_t reg, reg_index = 0, reg_offset = 0; in common_bridge_motor() local
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/i386/
H A Dwinnt.c854 HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER]; member
1075 HOST_WIDE_INT reg_offset = 0; in seh_cfa_adjust_cfa() local
1123 HOST_WIDE_INT reg_offset; in seh_cfa_offset() local
/netbsd-src/external/gpl3/gcc/dist/gcc/config/i386/
H A Dwinnt.cc853 HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER]; member
1074 HOST_WIDE_INT reg_offset = 0; in seh_cfa_adjust_cfa() local
1122 HOST_WIDE_INT reg_offset; in seh_cfa_offset() local
/netbsd-src/sys/arch/macppc/dev/
H A Dplatinumfb.c300 int reg_offset, uint8_t val) in platinumfb_write_cmap_reg()
306 platinumfb_read_cmap_reg(struct platinumfb_softc *sc, int reg_offset) in platinumfb_read_cmap_reg()
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/nds32/
H A Dnds32.h184 #define NDS32_AVAILABLE_REGNUM_FOR_GPR_ARG(reg_offset, mode, type) \ argument
191 #define NDS32_AVAILABLE_REGNUM_FOR_FPR_ARG(reg_offset, mode, type) \ argument
200 #define NDS32_ARG_ENTIRE_IN_GPR_REG_P(reg_offset, mode, type) \ argument
206 #define NDS32_ARG_ENTIRE_IN_FPR_REG_P(reg_offset, mode, type) \ argument
215 #define NDS32_ARG_PARTIAL_IN_GPR_REG_P(reg_offset, mode, type) \ argument
219 #define NDS32_ARG_PARTIAL_IN_FPR_REG_P(reg_offset, mode, type) \ argument
/netbsd-src/external/gpl3/gcc/dist/gcc/config/nds32/
H A Dnds32.h184 #define NDS32_AVAILABLE_REGNUM_FOR_GPR_ARG(reg_offset, mode, type) \ argument
191 #define NDS32_AVAILABLE_REGNUM_FOR_FPR_ARG(reg_offset, mode, type) \ argument
200 #define NDS32_ARG_ENTIRE_IN_GPR_REG_P(reg_offset, mode, type) \ argument
206 #define NDS32_ARG_ENTIRE_IN_FPR_REG_P(reg_offset, mode, type) \ argument
215 #define NDS32_ARG_PARTIAL_IN_GPR_REG_P(reg_offset, mode, type) \ argument
219 #define NDS32_ARG_PARTIAL_IN_FPR_REG_P(reg_offset, mode, type) \ argument
/netbsd-src/sys/arch/mac68k/obio/
H A Desp.c183 unsigned long reg_offset; in espattach() local
/netbsd-src/external/gpl3/binutils/dist/gas/config/
H A Dtc-tic6x.h64 offsetT reg_offset[TIC6X_NUM_UNWIND_REGS]; member
/netbsd-src/external/gpl3/binutils.old/dist/gas/config/
H A Dtc-tic6x.h64 offsetT reg_offset[TIC6X_NUM_UNWIND_REGS]; member
/netbsd-src/external/gpl3/gcc/dist/gcc/config/or1k/
H A Dor1k.cc214 HOST_WIDE_INT reg_offset, this_offset; in or1k_expand_prologue() local
324 HOST_WIDE_INT reg_offset, sp_offset; in or1k_expand_epilogue() local

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