1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements the SelectionDAG::dump method and friends.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "llvm/ADT/APFloat.h"
14 #include "llvm/ADT/APInt.h"
15 #include "llvm/ADT/None.h"
16 #include "llvm/ADT/SmallPtrSet.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/CodeGen/ISDOpcodes.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineMemOperand.h"
22 #include "llvm/CodeGen/SelectionDAG.h"
23 #include "llvm/CodeGen/SelectionDAGNodes.h"
24 #include "llvm/CodeGen/TargetInstrInfo.h"
25 #include "llvm/CodeGen/TargetLowering.h"
26 #include "llvm/CodeGen/TargetRegisterInfo.h"
27 #include "llvm/CodeGen/TargetSubtargetInfo.h"
28 #include "llvm/CodeGen/ValueTypes.h"
29 #include "llvm/Config/llvm-config.h"
30 #include "llvm/IR/BasicBlock.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DebugInfoMetadata.h"
33 #include "llvm/IR/DebugLoc.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/Intrinsics.h"
36 #include "llvm/IR/ModuleSlotTracker.h"
37 #include "llvm/IR/Value.h"
38 #include "llvm/Support/Casting.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Compiler.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/MachineValueType.h"
44 #include "llvm/Support/Printable.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Target/TargetIntrinsicInfo.h"
47 #include "llvm/Target/TargetMachine.h"
48 #include "SDNodeDbgValue.h"
49 #include <cstdint>
50 #include <iterator>
51
52 using namespace llvm;
53
54 static cl::opt<bool>
55 VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
56 cl::desc("Display more information when dumping selection "
57 "DAG nodes."));
58
getOperationName(const SelectionDAG * G) const59 std::string SDNode::getOperationName(const SelectionDAG *G) const {
60 switch (getOpcode()) {
61 default:
62 if (getOpcode() < ISD::BUILTIN_OP_END)
63 return "<<Unknown DAG Node>>";
64 if (isMachineOpcode()) {
65 if (G)
66 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
67 if (getMachineOpcode() < TII->getNumOpcodes())
68 return std::string(TII->getName(getMachineOpcode()));
69 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
70 }
71 if (G) {
72 const TargetLowering &TLI = G->getTargetLoweringInfo();
73 const char *Name = TLI.getTargetNodeName(getOpcode());
74 if (Name) return Name;
75 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
76 }
77 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
78
79 #ifndef NDEBUG
80 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
81 #endif
82 case ISD::PREFETCH: return "Prefetch";
83 case ISD::ATOMIC_FENCE: return "AtomicFence";
84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
86 case ISD::ATOMIC_SWAP: return "AtomicSwap";
87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
99 case ISD::ATOMIC_LOAD: return "AtomicLoad";
100 case ISD::ATOMIC_STORE: return "AtomicStore";
101 case ISD::PCMARKER: return "PCMarker";
102 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
103 case ISD::SRCVALUE: return "SrcValue";
104 case ISD::MDNODE_SDNODE: return "MDNode";
105 case ISD::EntryToken: return "EntryToken";
106 case ISD::TokenFactor: return "TokenFactor";
107 case ISD::AssertSext: return "AssertSext";
108 case ISD::AssertZext: return "AssertZext";
109 case ISD::AssertAlign: return "AssertAlign";
110
111 case ISD::BasicBlock: return "BasicBlock";
112 case ISD::VALUETYPE: return "ValueType";
113 case ISD::Register: return "Register";
114 case ISD::RegisterMask: return "RegisterMask";
115 case ISD::Constant:
116 if (cast<ConstantSDNode>(this)->isOpaque())
117 return "OpaqueConstant";
118 return "Constant";
119 case ISD::ConstantFP: return "ConstantFP";
120 case ISD::GlobalAddress: return "GlobalAddress";
121 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
122 case ISD::FrameIndex: return "FrameIndex";
123 case ISD::JumpTable: return "JumpTable";
124 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
125 case ISD::RETURNADDR: return "RETURNADDR";
126 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
127 case ISD::FRAMEADDR: return "FRAMEADDR";
128 case ISD::SPONENTRY: return "SPONENTRY";
129 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
130 case ISD::READ_REGISTER: return "READ_REGISTER";
131 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
132 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
133 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
134 case ISD::EH_RETURN: return "EH_RETURN";
135 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
136 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
137 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
138 case ISD::ConstantPool: return "ConstantPool";
139 case ISD::TargetIndex: return "TargetIndex";
140 case ISD::ExternalSymbol: return "ExternalSymbol";
141 case ISD::BlockAddress: return "BlockAddress";
142 case ISD::INTRINSIC_WO_CHAIN:
143 case ISD::INTRINSIC_VOID:
144 case ISD::INTRINSIC_W_CHAIN: {
145 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
146 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
147 if (IID < Intrinsic::num_intrinsics)
148 return Intrinsic::getName((Intrinsic::ID)IID, None);
149 else if (!G)
150 return "Unknown intrinsic";
151 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
152 return TII->getName(IID);
153 llvm_unreachable("Invalid intrinsic ID");
154 }
155
156 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
157 case ISD::TargetConstant:
158 if (cast<ConstantSDNode>(this)->isOpaque())
159 return "OpaqueTargetConstant";
160 return "TargetConstant";
161 case ISD::TargetConstantFP: return "TargetConstantFP";
162 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
163 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
164 case ISD::TargetFrameIndex: return "TargetFrameIndex";
165 case ISD::TargetJumpTable: return "TargetJumpTable";
166 case ISD::TargetConstantPool: return "TargetConstantPool";
167 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
168 case ISD::MCSymbol: return "MCSymbol";
169 case ISD::TargetBlockAddress: return "TargetBlockAddress";
170
171 case ISD::CopyToReg: return "CopyToReg";
172 case ISD::CopyFromReg: return "CopyFromReg";
173 case ISD::UNDEF: return "undef";
174 case ISD::VSCALE: return "vscale";
175 case ISD::MERGE_VALUES: return "merge_values";
176 case ISD::INLINEASM: return "inlineasm";
177 case ISD::INLINEASM_BR: return "inlineasm_br";
178 case ISD::EH_LABEL: return "eh_label";
179 case ISD::ANNOTATION_LABEL: return "annotation_label";
180 case ISD::HANDLENODE: return "handlenode";
181
182 // Unary operators
183 case ISD::FABS: return "fabs";
184 case ISD::FMINNUM: return "fminnum";
185 case ISD::STRICT_FMINNUM: return "strict_fminnum";
186 case ISD::FMAXNUM: return "fmaxnum";
187 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
188 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
189 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
190 case ISD::FMINIMUM: return "fminimum";
191 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
192 case ISD::FMAXIMUM: return "fmaximum";
193 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
194 case ISD::FNEG: return "fneg";
195 case ISD::FSQRT: return "fsqrt";
196 case ISD::STRICT_FSQRT: return "strict_fsqrt";
197 case ISD::FCBRT: return "fcbrt";
198 case ISD::FSIN: return "fsin";
199 case ISD::STRICT_FSIN: return "strict_fsin";
200 case ISD::FCOS: return "fcos";
201 case ISD::STRICT_FCOS: return "strict_fcos";
202 case ISD::FSINCOS: return "fsincos";
203 case ISD::FTRUNC: return "ftrunc";
204 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
205 case ISD::FFLOOR: return "ffloor";
206 case ISD::STRICT_FFLOOR: return "strict_ffloor";
207 case ISD::FCEIL: return "fceil";
208 case ISD::STRICT_FCEIL: return "strict_fceil";
209 case ISD::FRINT: return "frint";
210 case ISD::STRICT_FRINT: return "strict_frint";
211 case ISD::FNEARBYINT: return "fnearbyint";
212 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
213 case ISD::FROUND: return "fround";
214 case ISD::STRICT_FROUND: return "strict_fround";
215 case ISD::FROUNDEVEN: return "froundeven";
216 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
217 case ISD::FEXP: return "fexp";
218 case ISD::STRICT_FEXP: return "strict_fexp";
219 case ISD::FEXP2: return "fexp2";
220 case ISD::STRICT_FEXP2: return "strict_fexp2";
221 case ISD::FLOG: return "flog";
222 case ISD::STRICT_FLOG: return "strict_flog";
223 case ISD::FLOG2: return "flog2";
224 case ISD::STRICT_FLOG2: return "strict_flog2";
225 case ISD::FLOG10: return "flog10";
226 case ISD::STRICT_FLOG10: return "strict_flog10";
227
228 // Binary operators
229 case ISD::ADD: return "add";
230 case ISD::SUB: return "sub";
231 case ISD::MUL: return "mul";
232 case ISD::MULHU: return "mulhu";
233 case ISD::MULHS: return "mulhs";
234 case ISD::SDIV: return "sdiv";
235 case ISD::UDIV: return "udiv";
236 case ISD::SREM: return "srem";
237 case ISD::UREM: return "urem";
238 case ISD::SMUL_LOHI: return "smul_lohi";
239 case ISD::UMUL_LOHI: return "umul_lohi";
240 case ISD::SDIVREM: return "sdivrem";
241 case ISD::UDIVREM: return "udivrem";
242 case ISD::AND: return "and";
243 case ISD::OR: return "or";
244 case ISD::XOR: return "xor";
245 case ISD::SHL: return "shl";
246 case ISD::SRA: return "sra";
247 case ISD::SRL: return "srl";
248 case ISD::ROTL: return "rotl";
249 case ISD::ROTR: return "rotr";
250 case ISD::FSHL: return "fshl";
251 case ISD::FSHR: return "fshr";
252 case ISD::FADD: return "fadd";
253 case ISD::STRICT_FADD: return "strict_fadd";
254 case ISD::FSUB: return "fsub";
255 case ISD::STRICT_FSUB: return "strict_fsub";
256 case ISD::FMUL: return "fmul";
257 case ISD::STRICT_FMUL: return "strict_fmul";
258 case ISD::FDIV: return "fdiv";
259 case ISD::STRICT_FDIV: return "strict_fdiv";
260 case ISD::FMA: return "fma";
261 case ISD::STRICT_FMA: return "strict_fma";
262 case ISD::FMAD: return "fmad";
263 case ISD::FREM: return "frem";
264 case ISD::STRICT_FREM: return "strict_frem";
265 case ISD::FCOPYSIGN: return "fcopysign";
266 case ISD::FGETSIGN: return "fgetsign";
267 case ISD::FCANONICALIZE: return "fcanonicalize";
268 case ISD::FPOW: return "fpow";
269 case ISD::STRICT_FPOW: return "strict_fpow";
270 case ISD::SMIN: return "smin";
271 case ISD::SMAX: return "smax";
272 case ISD::UMIN: return "umin";
273 case ISD::UMAX: return "umax";
274
275 case ISD::FPOWI: return "fpowi";
276 case ISD::STRICT_FPOWI: return "strict_fpowi";
277 case ISD::SETCC: return "setcc";
278 case ISD::SETCCCARRY: return "setcccarry";
279 case ISD::STRICT_FSETCC: return "strict_fsetcc";
280 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
281 case ISD::SELECT: return "select";
282 case ISD::VSELECT: return "vselect";
283 case ISD::SELECT_CC: return "select_cc";
284 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
285 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
286 case ISD::CONCAT_VECTORS: return "concat_vectors";
287 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
288 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
289 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
290 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
291 case ISD::VECTOR_SPLICE: return "vector_splice";
292 case ISD::SPLAT_VECTOR: return "splat_vector";
293 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
294 case ISD::VECTOR_REVERSE: return "vector_reverse";
295 case ISD::STEP_VECTOR: return "step_vector";
296 case ISD::CARRY_FALSE: return "carry_false";
297 case ISD::ADDC: return "addc";
298 case ISD::ADDE: return "adde";
299 case ISD::ADDCARRY: return "addcarry";
300 case ISD::SADDO_CARRY: return "saddo_carry";
301 case ISD::SADDO: return "saddo";
302 case ISD::UADDO: return "uaddo";
303 case ISD::SSUBO: return "ssubo";
304 case ISD::USUBO: return "usubo";
305 case ISD::SMULO: return "smulo";
306 case ISD::UMULO: return "umulo";
307 case ISD::SUBC: return "subc";
308 case ISD::SUBE: return "sube";
309 case ISD::SUBCARRY: return "subcarry";
310 case ISD::SSUBO_CARRY: return "ssubo_carry";
311 case ISD::SHL_PARTS: return "shl_parts";
312 case ISD::SRA_PARTS: return "sra_parts";
313 case ISD::SRL_PARTS: return "srl_parts";
314
315 case ISD::SADDSAT: return "saddsat";
316 case ISD::UADDSAT: return "uaddsat";
317 case ISD::SSUBSAT: return "ssubsat";
318 case ISD::USUBSAT: return "usubsat";
319 case ISD::SSHLSAT: return "sshlsat";
320 case ISD::USHLSAT: return "ushlsat";
321
322 case ISD::SMULFIX: return "smulfix";
323 case ISD::SMULFIXSAT: return "smulfixsat";
324 case ISD::UMULFIX: return "umulfix";
325 case ISD::UMULFIXSAT: return "umulfixsat";
326
327 case ISD::SDIVFIX: return "sdivfix";
328 case ISD::SDIVFIXSAT: return "sdivfixsat";
329 case ISD::UDIVFIX: return "udivfix";
330 case ISD::UDIVFIXSAT: return "udivfixsat";
331
332 // Conversion operators.
333 case ISD::SIGN_EXTEND: return "sign_extend";
334 case ISD::ZERO_EXTEND: return "zero_extend";
335 case ISD::ANY_EXTEND: return "any_extend";
336 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
337 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
338 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
339 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
340 case ISD::TRUNCATE: return "truncate";
341 case ISD::FP_ROUND: return "fp_round";
342 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
343 case ISD::FP_EXTEND: return "fp_extend";
344 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
345
346 case ISD::SINT_TO_FP: return "sint_to_fp";
347 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
348 case ISD::UINT_TO_FP: return "uint_to_fp";
349 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
350 case ISD::FP_TO_SINT: return "fp_to_sint";
351 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
352 case ISD::FP_TO_UINT: return "fp_to_uint";
353 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
354 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
355 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
356 case ISD::BITCAST: return "bitcast";
357 case ISD::ADDRSPACECAST: return "addrspacecast";
358 case ISD::FP16_TO_FP: return "fp16_to_fp";
359 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
360 case ISD::FP_TO_FP16: return "fp_to_fp16";
361 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
362 case ISD::LROUND: return "lround";
363 case ISD::STRICT_LROUND: return "strict_lround";
364 case ISD::LLROUND: return "llround";
365 case ISD::STRICT_LLROUND: return "strict_llround";
366 case ISD::LRINT: return "lrint";
367 case ISD::STRICT_LRINT: return "strict_lrint";
368 case ISD::LLRINT: return "llrint";
369 case ISD::STRICT_LLRINT: return "strict_llrint";
370
371 // Control flow instructions
372 case ISD::BR: return "br";
373 case ISD::BRIND: return "brind";
374 case ISD::BR_JT: return "br_jt";
375 case ISD::BRCOND: return "brcond";
376 case ISD::BR_CC: return "br_cc";
377 case ISD::CALLSEQ_START: return "callseq_start";
378 case ISD::CALLSEQ_END: return "callseq_end";
379
380 // EH instructions
381 case ISD::CATCHRET: return "catchret";
382 case ISD::CLEANUPRET: return "cleanupret";
383
384 // Other operators
385 case ISD::LOAD: return "load";
386 case ISD::STORE: return "store";
387 case ISD::MLOAD: return "masked_load";
388 case ISD::MSTORE: return "masked_store";
389 case ISD::MGATHER: return "masked_gather";
390 case ISD::MSCATTER: return "masked_scatter";
391 case ISD::VAARG: return "vaarg";
392 case ISD::VACOPY: return "vacopy";
393 case ISD::VAEND: return "vaend";
394 case ISD::VASTART: return "vastart";
395 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
396 case ISD::EXTRACT_ELEMENT: return "extract_element";
397 case ISD::BUILD_PAIR: return "build_pair";
398 case ISD::STACKSAVE: return "stacksave";
399 case ISD::STACKRESTORE: return "stackrestore";
400 case ISD::TRAP: return "trap";
401 case ISD::DEBUGTRAP: return "debugtrap";
402 case ISD::UBSANTRAP: return "ubsantrap";
403 case ISD::LIFETIME_START: return "lifetime.start";
404 case ISD::LIFETIME_END: return "lifetime.end";
405 case ISD::PSEUDO_PROBE:
406 return "pseudoprobe";
407 case ISD::GC_TRANSITION_START: return "gc_transition.start";
408 case ISD::GC_TRANSITION_END: return "gc_transition.end";
409 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
410 case ISD::FREEZE: return "freeze";
411 case ISD::PREALLOCATED_SETUP:
412 return "call_setup";
413 case ISD::PREALLOCATED_ARG:
414 return "call_alloc";
415
416 // Floating point environment manipulation
417 case ISD::FLT_ROUNDS_: return "flt_rounds";
418 case ISD::SET_ROUNDING: return "set_rounding";
419
420 // Bit manipulation
421 case ISD::ABS: return "abs";
422 case ISD::BITREVERSE: return "bitreverse";
423 case ISD::BSWAP: return "bswap";
424 case ISD::CTPOP: return "ctpop";
425 case ISD::CTTZ: return "cttz";
426 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
427 case ISD::CTLZ: return "ctlz";
428 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
429 case ISD::PARITY: return "parity";
430
431 // Trampolines
432 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
433 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
434
435 case ISD::CONDCODE:
436 switch (cast<CondCodeSDNode>(this)->get()) {
437 default: llvm_unreachable("Unknown setcc condition!");
438 case ISD::SETOEQ: return "setoeq";
439 case ISD::SETOGT: return "setogt";
440 case ISD::SETOGE: return "setoge";
441 case ISD::SETOLT: return "setolt";
442 case ISD::SETOLE: return "setole";
443 case ISD::SETONE: return "setone";
444
445 case ISD::SETO: return "seto";
446 case ISD::SETUO: return "setuo";
447 case ISD::SETUEQ: return "setueq";
448 case ISD::SETUGT: return "setugt";
449 case ISD::SETUGE: return "setuge";
450 case ISD::SETULT: return "setult";
451 case ISD::SETULE: return "setule";
452 case ISD::SETUNE: return "setune";
453
454 case ISD::SETEQ: return "seteq";
455 case ISD::SETGT: return "setgt";
456 case ISD::SETGE: return "setge";
457 case ISD::SETLT: return "setlt";
458 case ISD::SETLE: return "setle";
459 case ISD::SETNE: return "setne";
460
461 case ISD::SETTRUE: return "settrue";
462 case ISD::SETTRUE2: return "settrue2";
463 case ISD::SETFALSE: return "setfalse";
464 case ISD::SETFALSE2: return "setfalse2";
465 }
466 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
467 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
468 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
469 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
470 case ISD::VECREDUCE_ADD: return "vecreduce_add";
471 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
472 case ISD::VECREDUCE_AND: return "vecreduce_and";
473 case ISD::VECREDUCE_OR: return "vecreduce_or";
474 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
475 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
476 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
477 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
478 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
479 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
480 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
481
482 // Vector Predication
483 #define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
484 case ISD::SDID: \
485 return #NAME;
486 #include "llvm/IR/VPIntrinsics.def"
487 }
488 }
489
getIndexedModeName(ISD::MemIndexedMode AM)490 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
491 switch (AM) {
492 default: return "";
493 case ISD::PRE_INC: return "<pre-inc>";
494 case ISD::PRE_DEC: return "<pre-dec>";
495 case ISD::POST_INC: return "<post-inc>";
496 case ISD::POST_DEC: return "<post-dec>";
497 }
498 }
499
PrintNodeId(const SDNode & Node)500 static Printable PrintNodeId(const SDNode &Node) {
501 return Printable([&Node](raw_ostream &OS) {
502 #ifndef NDEBUG
503 OS << 't' << Node.PersistentId;
504 #else
505 OS << (const void*)&Node;
506 #endif
507 });
508 }
509
510 // Print the MMO with more information from the SelectionDAG.
printMemOperand(raw_ostream & OS,const MachineMemOperand & MMO,const MachineFunction * MF,const Module * M,const MachineFrameInfo * MFI,const TargetInstrInfo * TII,LLVMContext & Ctx)511 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
512 const MachineFunction *MF, const Module *M,
513 const MachineFrameInfo *MFI,
514 const TargetInstrInfo *TII, LLVMContext &Ctx) {
515 ModuleSlotTracker MST(M);
516 if (MF)
517 MST.incorporateFunction(MF->getFunction());
518 SmallVector<StringRef, 0> SSNs;
519 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
520 }
521
printMemOperand(raw_ostream & OS,const MachineMemOperand & MMO,const SelectionDAG * G)522 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
523 const SelectionDAG *G) {
524 if (G) {
525 const MachineFunction *MF = &G->getMachineFunction();
526 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
527 &MF->getFrameInfo(), G->getSubtarget().getInstrInfo(),
528 *G->getContext());
529 } else {
530 LLVMContext Ctx;
531 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
532 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
533 }
534 }
535
536 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
dump() const537 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
538
dump(const SelectionDAG * G) const539 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
540 print(dbgs(), G);
541 dbgs() << '\n';
542 }
543 #endif
544
print_types(raw_ostream & OS,const SelectionDAG * G) const545 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
546 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
547 if (i) OS << ",";
548 if (getValueType(i) == MVT::Other)
549 OS << "ch";
550 else
551 OS << getValueType(i).getEVTString();
552 }
553 }
554
print_details(raw_ostream & OS,const SelectionDAG * G) const555 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
556 if (getFlags().hasNoUnsignedWrap())
557 OS << " nuw";
558
559 if (getFlags().hasNoSignedWrap())
560 OS << " nsw";
561
562 if (getFlags().hasExact())
563 OS << " exact";
564
565 if (getFlags().hasNoNaNs())
566 OS << " nnan";
567
568 if (getFlags().hasNoInfs())
569 OS << " ninf";
570
571 if (getFlags().hasNoSignedZeros())
572 OS << " nsz";
573
574 if (getFlags().hasAllowReciprocal())
575 OS << " arcp";
576
577 if (getFlags().hasAllowContract())
578 OS << " contract";
579
580 if (getFlags().hasApproximateFuncs())
581 OS << " afn";
582
583 if (getFlags().hasAllowReassociation())
584 OS << " reassoc";
585
586 if (getFlags().hasNoFPExcept())
587 OS << " nofpexcept";
588
589 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
590 if (!MN->memoperands_empty()) {
591 OS << "<";
592 OS << "Mem:";
593 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
594 e = MN->memoperands_end(); i != e; ++i) {
595 printMemOperand(OS, **i, G);
596 if (std::next(i) != e)
597 OS << " ";
598 }
599 OS << ">";
600 }
601 } else if (const ShuffleVectorSDNode *SVN =
602 dyn_cast<ShuffleVectorSDNode>(this)) {
603 OS << "<";
604 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
605 int Idx = SVN->getMaskElt(i);
606 if (i) OS << ",";
607 if (Idx < 0)
608 OS << "u";
609 else
610 OS << Idx;
611 }
612 OS << ">";
613 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
614 OS << '<' << CSDN->getAPIntValue() << '>';
615 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
616 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
617 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
618 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
619 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
620 else {
621 OS << "<APFloat(";
622 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
623 OS << ")>";
624 }
625 } else if (const GlobalAddressSDNode *GADN =
626 dyn_cast<GlobalAddressSDNode>(this)) {
627 int64_t offset = GADN->getOffset();
628 OS << '<';
629 GADN->getGlobal()->printAsOperand(OS);
630 OS << '>';
631 if (offset > 0)
632 OS << " + " << offset;
633 else
634 OS << " " << offset;
635 if (unsigned int TF = GADN->getTargetFlags())
636 OS << " [TF=" << TF << ']';
637 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
638 OS << "<" << FIDN->getIndex() << ">";
639 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
640 OS << "<" << JTDN->getIndex() << ">";
641 if (unsigned int TF = JTDN->getTargetFlags())
642 OS << " [TF=" << TF << ']';
643 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
644 int offset = CP->getOffset();
645 if (CP->isMachineConstantPoolEntry())
646 OS << "<" << *CP->getMachineCPVal() << ">";
647 else
648 OS << "<" << *CP->getConstVal() << ">";
649 if (offset > 0)
650 OS << " + " << offset;
651 else
652 OS << " " << offset;
653 if (unsigned int TF = CP->getTargetFlags())
654 OS << " [TF=" << TF << ']';
655 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
656 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
657 if (unsigned TF = TI->getTargetFlags())
658 OS << " [TF=" << TF << ']';
659 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
660 OS << "<";
661 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
662 if (LBB)
663 OS << LBB->getName() << " ";
664 OS << (const void*)BBDN->getBasicBlock() << ">";
665 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
666 OS << ' ' << printReg(R->getReg(),
667 G ? G->getSubtarget().getRegisterInfo() : nullptr);
668 } else if (const ExternalSymbolSDNode *ES =
669 dyn_cast<ExternalSymbolSDNode>(this)) {
670 OS << "'" << ES->getSymbol() << "'";
671 if (unsigned int TF = ES->getTargetFlags())
672 OS << " [TF=" << TF << ']';
673 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
674 if (M->getValue())
675 OS << "<" << M->getValue() << ">";
676 else
677 OS << "<null>";
678 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
679 if (MD->getMD())
680 OS << "<" << MD->getMD() << ">";
681 else
682 OS << "<null>";
683 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
684 OS << ":" << N->getVT().getEVTString();
685 }
686 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
687 OS << "<";
688
689 printMemOperand(OS, *LD->getMemOperand(), G);
690
691 bool doExt = true;
692 switch (LD->getExtensionType()) {
693 default: doExt = false; break;
694 case ISD::EXTLOAD: OS << ", anyext"; break;
695 case ISD::SEXTLOAD: OS << ", sext"; break;
696 case ISD::ZEXTLOAD: OS << ", zext"; break;
697 }
698 if (doExt)
699 OS << " from " << LD->getMemoryVT().getEVTString();
700
701 const char *AM = getIndexedModeName(LD->getAddressingMode());
702 if (*AM)
703 OS << ", " << AM;
704
705 OS << ">";
706 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
707 OS << "<";
708 printMemOperand(OS, *ST->getMemOperand(), G);
709
710 if (ST->isTruncatingStore())
711 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
712
713 const char *AM = getIndexedModeName(ST->getAddressingMode());
714 if (*AM)
715 OS << ", " << AM;
716
717 OS << ">";
718 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
719 OS << "<";
720
721 printMemOperand(OS, *MLd->getMemOperand(), G);
722
723 bool doExt = true;
724 switch (MLd->getExtensionType()) {
725 default: doExt = false; break;
726 case ISD::EXTLOAD: OS << ", anyext"; break;
727 case ISD::SEXTLOAD: OS << ", sext"; break;
728 case ISD::ZEXTLOAD: OS << ", zext"; break;
729 }
730 if (doExt)
731 OS << " from " << MLd->getMemoryVT().getEVTString();
732
733 const char *AM = getIndexedModeName(MLd->getAddressingMode());
734 if (*AM)
735 OS << ", " << AM;
736
737 if (MLd->isExpandingLoad())
738 OS << ", expanding";
739
740 OS << ">";
741 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
742 OS << "<";
743 printMemOperand(OS, *MSt->getMemOperand(), G);
744
745 if (MSt->isTruncatingStore())
746 OS << ", trunc to " << MSt->getMemoryVT().getEVTString();
747
748 const char *AM = getIndexedModeName(MSt->getAddressingMode());
749 if (*AM)
750 OS << ", " << AM;
751
752 if (MSt->isCompressingStore())
753 OS << ", compressing";
754
755 OS << ">";
756 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
757 OS << "<";
758 printMemOperand(OS, *MGather->getMemOperand(), G);
759
760 bool doExt = true;
761 switch (MGather->getExtensionType()) {
762 default: doExt = false; break;
763 case ISD::EXTLOAD: OS << ", anyext"; break;
764 case ISD::SEXTLOAD: OS << ", sext"; break;
765 case ISD::ZEXTLOAD: OS << ", zext"; break;
766 }
767 if (doExt)
768 OS << " from " << MGather->getMemoryVT().getEVTString();
769
770 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
771 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
772 OS << ", " << Signed << " " << Scaled << " offset";
773
774 OS << ">";
775 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
776 OS << "<";
777 printMemOperand(OS, *MScatter->getMemOperand(), G);
778
779 if (MScatter->isTruncatingStore())
780 OS << ", trunc to " << MScatter->getMemoryVT().getEVTString();
781
782 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
783 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
784 OS << ", " << Signed << " " << Scaled << " offset";
785
786 OS << ">";
787 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
788 OS << "<";
789 printMemOperand(OS, *M->getMemOperand(), G);
790 OS << ">";
791 } else if (const BlockAddressSDNode *BA =
792 dyn_cast<BlockAddressSDNode>(this)) {
793 int64_t offset = BA->getOffset();
794 OS << "<";
795 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
796 OS << ", ";
797 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
798 OS << ">";
799 if (offset > 0)
800 OS << " + " << offset;
801 else
802 OS << " " << offset;
803 if (unsigned int TF = BA->getTargetFlags())
804 OS << " [TF=" << TF << ']';
805 } else if (const AddrSpaceCastSDNode *ASC =
806 dyn_cast<AddrSpaceCastSDNode>(this)) {
807 OS << '['
808 << ASC->getSrcAddressSpace()
809 << " -> "
810 << ASC->getDestAddressSpace()
811 << ']';
812 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
813 if (LN->hasOffset())
814 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
815 }
816
817 if (VerboseDAGDumping) {
818 if (unsigned Order = getIROrder())
819 OS << " [ORD=" << Order << ']';
820
821 if (getNodeId() != -1)
822 OS << " [ID=" << getNodeId() << ']';
823 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
824 OS << " # D:" << isDivergent();
825
826 if (G && !G->GetDbgValues(this).empty()) {
827 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
828 for (SDDbgValue *Dbg : G->GetDbgValues(this))
829 if (!Dbg->isInvalidated())
830 Dbg->print(OS);
831 } else if (getHasDebugValue())
832 OS << " [NoOfDbgValues>0]";
833 }
834 }
835
print(raw_ostream & OS) const836 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
837 OS << " DbgVal(Order=" << getOrder() << ')';
838 if (isInvalidated())
839 OS << "(Invalidated)";
840 if (isEmitted())
841 OS << "(Emitted)";
842 OS << "(";
843 bool Comma = false;
844 for (const SDDbgOperand &Op : getLocationOps()) {
845 if (Comma)
846 OS << ", ";
847 switch (Op.getKind()) {
848 case SDDbgOperand::SDNODE:
849 if (Op.getSDNode())
850 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
851 else
852 OS << "SDNODE";
853 break;
854 case SDDbgOperand::CONST:
855 OS << "CONST";
856 break;
857 case SDDbgOperand::FRAMEIX:
858 OS << "FRAMEIX=" << Op.getFrameIx();
859 break;
860 case SDDbgOperand::VREG:
861 OS << "VREG=" << Op.getVReg();
862 break;
863 }
864 Comma = true;
865 }
866 OS << ")";
867 if (isIndirect()) OS << "(Indirect)";
868 if (isVariadic())
869 OS << "(Variadic)";
870 OS << ":\"" << Var->getName() << '"';
871 #ifndef NDEBUG
872 if (Expr->getNumElements())
873 Expr->dump();
874 #endif
875 }
876
877 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
dump() const878 LLVM_DUMP_METHOD void SDDbgValue::dump() const {
879 if (isInvalidated())
880 return;
881 print(dbgs());
882 dbgs() << "\n";
883 }
884 #endif
885
886 /// Return true if this node is so simple that we should just print it inline
887 /// if it appears as an operand.
shouldPrintInline(const SDNode & Node,const SelectionDAG * G)888 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
889 // Avoid lots of cluttering when inline printing nodes with associated
890 // DbgValues in verbose mode.
891 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
892 return false;
893 if (Node.getOpcode() == ISD::EntryToken)
894 return false;
895 return Node.getNumOperands() == 0;
896 }
897
898 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
DumpNodes(const SDNode * N,unsigned indent,const SelectionDAG * G)899 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
900 for (const SDValue &Op : N->op_values()) {
901 if (shouldPrintInline(*Op.getNode(), G))
902 continue;
903 if (Op.getNode()->hasOneUse())
904 DumpNodes(Op.getNode(), indent+2, G);
905 }
906
907 dbgs().indent(indent);
908 N->dump(G);
909 }
910
dump() const911 LLVM_DUMP_METHOD void SelectionDAG::dump() const {
912 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
913
914 for (const SDNode &N : allnodes()) {
915 if (!N.hasOneUse() && &N != getRoot().getNode() &&
916 (!shouldPrintInline(N, this) || N.use_empty()))
917 DumpNodes(&N, 2, this);
918 }
919
920 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
921 dbgs() << "\n";
922
923 if (VerboseDAGDumping) {
924 if (DbgBegin() != DbgEnd())
925 dbgs() << "SDDbgValues:\n";
926 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
927 Dbg->dump();
928 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
929 dbgs() << "Byval SDDbgValues:\n";
930 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
931 Dbg->dump();
932 }
933 dbgs() << "\n";
934 }
935 #endif
936
printr(raw_ostream & OS,const SelectionDAG * G) const937 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
938 OS << PrintNodeId(*this) << ": ";
939 print_types(OS, G);
940 OS << " = " << getOperationName(G);
941 print_details(OS, G);
942 }
943
printOperand(raw_ostream & OS,const SelectionDAG * G,const SDValue Value)944 static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
945 const SDValue Value) {
946 if (!Value.getNode()) {
947 OS << "<null>";
948 return false;
949 } else if (shouldPrintInline(*Value.getNode(), G)) {
950 OS << Value->getOperationName(G) << ':';
951 Value->print_types(OS, G);
952 Value->print_details(OS, G);
953 return true;
954 } else {
955 OS << PrintNodeId(*Value.getNode());
956 if (unsigned RN = Value.getResNo())
957 OS << ':' << RN;
958 return false;
959 }
960 }
961
962 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
963 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
964
DumpNodesr(raw_ostream & OS,const SDNode * N,unsigned indent,const SelectionDAG * G,VisitedSDNodeSet & once)965 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
966 const SelectionDAG *G, VisitedSDNodeSet &once) {
967 if (!once.insert(N).second) // If we've been here before, return now.
968 return;
969
970 // Dump the current SDNode, but don't end the line yet.
971 OS.indent(indent);
972 N->printr(OS, G);
973
974 // Having printed this SDNode, walk the children:
975 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
976 if (i) OS << ",";
977 OS << " ";
978
979 const SDValue Op = N->getOperand(i);
980 bool printedInline = printOperand(OS, G, Op);
981 if (printedInline)
982 once.insert(Op.getNode());
983 }
984
985 OS << "\n";
986
987 // Dump children that have grandchildren on their own line(s).
988 for (const SDValue &Op : N->op_values())
989 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
990 }
991
dumpr() const992 LLVM_DUMP_METHOD void SDNode::dumpr() const {
993 VisitedSDNodeSet once;
994 DumpNodesr(dbgs(), this, 0, nullptr, once);
995 }
996
dumpr(const SelectionDAG * G) const997 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
998 VisitedSDNodeSet once;
999 DumpNodesr(dbgs(), this, 0, G, once);
1000 }
1001 #endif
1002
printrWithDepthHelper(raw_ostream & OS,const SDNode * N,const SelectionDAG * G,unsigned depth,unsigned indent)1003 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1004 const SelectionDAG *G, unsigned depth,
1005 unsigned indent) {
1006 if (depth == 0)
1007 return;
1008
1009 OS.indent(indent);
1010
1011 N->print(OS, G);
1012
1013 if (depth < 1)
1014 return;
1015
1016 for (const SDValue &Op : N->op_values()) {
1017 // Don't follow chain operands.
1018 if (Op.getValueType() == MVT::Other)
1019 continue;
1020 OS << '\n';
1021 printrWithDepthHelper(OS, Op.getNode(), G, depth-1, indent+2);
1022 }
1023 }
1024
printrWithDepth(raw_ostream & OS,const SelectionDAG * G,unsigned depth) const1025 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1026 unsigned depth) const {
1027 printrWithDepthHelper(OS, this, G, depth, 0);
1028 }
1029
printrFull(raw_ostream & OS,const SelectionDAG * G) const1030 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1031 // Don't print impossibly deep things.
1032 printrWithDepth(OS, G, 10);
1033 }
1034
1035 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1036 LLVM_DUMP_METHOD
dumprWithDepth(const SelectionDAG * G,unsigned depth) const1037 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1038 printrWithDepth(dbgs(), G, depth);
1039 }
1040
dumprFull(const SelectionDAG * G) const1041 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1042 // Don't print impossibly deep things.
1043 dumprWithDepth(G, 10);
1044 }
1045 #endif
1046
print(raw_ostream & OS,const SelectionDAG * G) const1047 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1048 printr(OS, G);
1049 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1050 if (i) OS << ", "; else OS << " ";
1051 printOperand(OS, G, getOperand(i));
1052 }
1053 if (DebugLoc DL = getDebugLoc()) {
1054 OS << ", ";
1055 DL.print(OS);
1056 }
1057 }
1058